jh.chun/VesiScan-Basic-firmware-test
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Piezo TX/RX Active 전 딜레이 3ms -> 10ms

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- ch0 데이터 안정화를 위함
This commit is contained in:
jhchun
2026-04-20 14:22:13 +09:00
parent 93a11b7519
commit 009897a7d8
1 changed files with 3 additions and 2 deletions
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5
project/ble_peripheral/ble_app_bladder_patch/measurement/piezo/dr_piezo.c
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@@ -194,7 +194,7 @@ void dr_piezo_power_on(void)
nrf_gpio_pin_set(DR_PIEZO_PWR_EN); nrf_gpio_pin_set(DR_PIEZO_PWR_EN);
/* Wait for power stabilization */ /* Wait for power stabilization */
nrf_delay_ms(3); nrf_delay_ms(10);
m_power_enabled = true; m_power_enabled = true;
@@ -544,6 +544,7 @@ void dr_piezo_mux_init(void)
NRF_GPIO_PIN_H0H1, /* High drive */ NRF_GPIO_PIN_H0H1, /* High drive */
NRF_GPIO_PIN_NOSENSE NRF_GPIO_PIN_NOSENSE
); );
nrf_gpio_cfg( nrf_gpio_cfg(
DR_PIEZO_MUX_SEL1, DR_PIEZO_MUX_SEL1,
NRF_GPIO_PIN_DIR_OUTPUT, NRF_GPIO_PIN_DIR_OUTPUT,
@@ -553,7 +554,7 @@ void dr_piezo_mux_init(void)
NRF_GPIO_PIN_NOSENSE NRF_GPIO_PIN_NOSENSE
); );
/* GPIO PIN Setting jhChun 0129 */ /* GPIO PIN Setting */
nrf_gpio_cfg( nrf_gpio_cfg(
DR_PIEZO_EN_MUXA, // PIN DR_PIEZO_EN_MUXA, // PIN
NRF_GPIO_PIN_DIR_OUTPUT, // DIR : OUTPUT NRF_GPIO_PIN_DIR_OUTPUT, // DIR : OUTPUT