diff --git a/project/ble_peripheral/ble_app_bladder_patch/VesiScan.code-workspace b/project/ble_peripheral/ble_app_bladder_patch/VesiScan.code-workspace deleted file mode 100644 index 6b6e3ba..0000000 --- a/project/ble_peripheral/ble_app_bladder_patch/VesiScan.code-workspace +++ /dev/null @@ -1,11 +0,0 @@ -{ - "folders": [ - { - "path": "../../.." - }, - { - "path": "../../../../pc_firm" - } - ], - "settings": {} -} \ No newline at end of file diff --git a/project/ble_peripheral/ble_app_bladder_patch/hex/__download_bootloader.bat b/project/ble_peripheral/ble_app_bladder_patch/flash/__download_bootloader.bat similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/hex/__download_bootloader.bat rename to project/ble_peripheral/ble_app_bladder_patch/flash/__download_bootloader.bat index d24da8c..1062ef1 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/hex/__download_bootloader.bat +++ b/project/ble_peripheral/ble_app_bladder_patch/flash/__download_bootloader.bat @@ -1,22 +1,22 @@ - -set CURDIR=%cd% - - - -copy ..\pca10056\s140\arm5_no_packs\_build\nrf52840_xxaa.hex medithings_bladder_patch_0001.hex -copy ..\..\..\dfu\secure_bootloader\pca10056_s140_ble\arm5_no_packs\_build\nrf52840_xxaa_s140.hex medithings_bladder_patch_bootloader.hex - -nrfutil settings generate --family NRF52840 --application medithings_bladder_patch_0001.hex --application-version 1 --bootloader-version 1 --bl-settings-version 2 medithings_bladder_patch_bootloader_setting.hex - -mergehex.exe --merge s140_nrf52_7.2.0_softdevice.hex medithings_bladder_patch_0001.hex --output medithings_bladder_patch_merged_1.hex -mergehex.exe --merge medithings_bladder_patch_bootloader.hex medithings_bladder_patch_bootloader_setting.hex --output medithings_bladder_patch_merged_2.hex -mergehex.exe --merge medithings_bladder_patch_merged_1.hex medithings_bladder_patch_merged_2.hex --output medithings_bladder_patch_dfu_merged_all.hex - -nrfjprog --family NRF52 --recover -nrfjprog --family NRF52 --eraseall -nrfjprog --family NRF52 --program medithings_bladder_patch_dfu_merged_all.hex -nrfjprog --family NRF52 --reset -nrfjprog --family NRF52 --rbp ALL - - + +set CURDIR=%cd% + + + +copy ..\pca10056\s140\arm5_no_packs\_build\nrf52840_xxaa.hex medithings_bladder_patch_0001.hex +copy ..\..\..\dfu\secure_bootloader\pca10056_s140_ble\arm5_no_packs\_build\nrf52840_xxaa_s140.hex medithings_bladder_patch_bootloader.hex + +nrfutil settings generate --family NRF52840 --application medithings_bladder_patch_0001.hex --application-version 1 --bootloader-version 1 --bl-settings-version 2 medithings_bladder_patch_bootloader_setting.hex + +mergehex.exe --merge s140_nrf52_7.2.0_softdevice.hex medithings_bladder_patch_0001.hex --output medithings_bladder_patch_merged_1.hex +mergehex.exe --merge medithings_bladder_patch_bootloader.hex medithings_bladder_patch_bootloader_setting.hex --output medithings_bladder_patch_merged_2.hex +mergehex.exe --merge medithings_bladder_patch_merged_1.hex medithings_bladder_patch_merged_2.hex --output medithings_bladder_patch_dfu_merged_all.hex + +nrfjprog --family NRF52 --recover +nrfjprog --family NRF52 --eraseall +nrfjprog --family NRF52 --program medithings_bladder_patch_dfu_merged_all.hex +nrfjprog --family NRF52 --reset +nrfjprog --family NRF52 --rbp ALL + + pause \ No newline at end of file diff --git a/project/ble_peripheral/ble_app_bladder_patch/hex/__download_bootloader_noRPB.bat b/project/ble_peripheral/ble_app_bladder_patch/flash/__download_bootloader_noRPB.bat similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/hex/__download_bootloader_noRPB.bat rename to project/ble_peripheral/ble_app_bladder_patch/flash/__download_bootloader_noRPB.bat index 9e9cc97..2a43acb 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/hex/__download_bootloader_noRPB.bat +++ b/project/ble_peripheral/ble_app_bladder_patch/flash/__download_bootloader_noRPB.bat @@ -1,21 +1,21 @@ - -set CURDIR=%cd% - - - -copy ..\pca10056\s140\arm5_no_packs\_build\nrf52840_xxaa.hex medithings_bladder_patch_0001.hex -copy ..\..\..\dfu\secure_bootloader\pca10056_s140_ble\arm5_no_packs\_build\nrf52840_xxaa_s140.hex medithings_bladder_patch_bootloader.hex - -nrfutil settings generate --family NRF52840 --application medithings_bladder_patch_0001.hex --application-version 1 --bootloader-version 1 --bl-settings-version 2 medithings_bladder_patch_bootloader_setting.hex - -mergehex.exe --merge s140_nrf52_7.2.0_softdevice.hex medithings_bladder_patch_0001.hex --output medithings_bladder_patch_merged_1.hex -mergehex.exe --merge medithings_bladder_patch_bootloader.hex medithings_bladder_patch_bootloader_setting.hex --output medithings_bladder_patch_merged_2.hex -mergehex.exe --merge medithings_bladder_patch_merged_1.hex medithings_bladder_patch_merged_2.hex --output medithings_bladder_patch_dfu_merged_all.hex - -nrfjprog --family NRF52 --recover -nrfjprog --family NRF52 --eraseall -nrfjprog --family NRF52 --program medithings_bladder_patch_dfu_merged_all.hex - - - + +set CURDIR=%cd% + + + +copy ..\pca10056\s140\arm5_no_packs\_build\nrf52840_xxaa.hex medithings_bladder_patch_0001.hex +copy ..\..\..\dfu\secure_bootloader\pca10056_s140_ble\arm5_no_packs\_build\nrf52840_xxaa_s140.hex medithings_bladder_patch_bootloader.hex + +nrfutil settings generate --family NRF52840 --application medithings_bladder_patch_0001.hex --application-version 1 --bootloader-version 1 --bl-settings-version 2 medithings_bladder_patch_bootloader_setting.hex + +mergehex.exe --merge s140_nrf52_7.2.0_softdevice.hex medithings_bladder_patch_0001.hex --output medithings_bladder_patch_merged_1.hex +mergehex.exe --merge medithings_bladder_patch_bootloader.hex medithings_bladder_patch_bootloader_setting.hex --output medithings_bladder_patch_merged_2.hex +mergehex.exe --merge medithings_bladder_patch_merged_1.hex medithings_bladder_patch_merged_2.hex --output medithings_bladder_patch_dfu_merged_all.hex + +nrfjprog --family NRF52 --recover +nrfjprog --family NRF52 --eraseall +nrfjprog --family NRF52 --program medithings_bladder_patch_dfu_merged_all.hex + + + pause \ No newline at end of file diff --git a/project/ble_peripheral/ble_app_bladder_patch/hex/__download_bootloader_noRPBYY.bat b/project/ble_peripheral/ble_app_bladder_patch/flash/__download_bootloader_noRPBYY.bat similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/hex/__download_bootloader_noRPBYY.bat rename to project/ble_peripheral/ble_app_bladder_patch/flash/__download_bootloader_noRPBYY.bat index cb01796..ade6814 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/hex/__download_bootloader_noRPBYY.bat +++ b/project/ble_peripheral/ble_app_bladder_patch/flash/__download_bootloader_noRPBYY.bat @@ -1,22 +1,22 @@ - -set CURDIR=%cd% - - - -copy ..\pca10056\s140\arm5_no_packs\_build\nrf52840_xxaa.hex medithings_bladder_patch_0001.hex -copy ..\..\..\dfu\secure_bootloader\pca10056_s140_ble\arm5_no_packs\_build\nrf52840_xxaa_s140.hex medithings_bladder_patch_bootloader.hex - -nrfutil settings generate --family NRF52840 --application medithings_bladder_patch_0001.hex --application-version 1 --bootloader-version 1 --bl-settings-version 2 medithings_bladder_patch_bootloader_setting.hex - -mergehex.exe --merge s140_nrf52_7.2.0_softdevice.hex medithings_bladder_patch_0001.hex --output medithings_bladder_patch_merged_1.hex -mergehex.exe --merge medithings_bladder_patch_bootloader.hex medithings_bladder_patch_bootloader_setting.hex --output medithings_bladder_patch_merged_2.hex -mergehex.exe --merge medithings_bladder_patch_merged_1.hex medithings_bladder_patch_merged_2.hex --output medithings_bladder_patch_dfu_merged_all.hex - - -nrfjprog --family NRF52 --eraseall -nrfjprog --family NRF52 --program medithings_bladder_patch_dfu_merged_all.hex -nrfjprog --family NRF52 --reset -nrfjprog --family NRF52 --rbp ALL - - + +set CURDIR=%cd% + + + +copy ..\pca10056\s140\arm5_no_packs\_build\nrf52840_xxaa.hex medithings_bladder_patch_0001.hex +copy ..\..\..\dfu\secure_bootloader\pca10056_s140_ble\arm5_no_packs\_build\nrf52840_xxaa_s140.hex medithings_bladder_patch_bootloader.hex + +nrfutil settings generate --family NRF52840 --application medithings_bladder_patch_0001.hex --application-version 1 --bootloader-version 1 --bl-settings-version 2 medithings_bladder_patch_bootloader_setting.hex + +mergehex.exe --merge s140_nrf52_7.2.0_softdevice.hex medithings_bladder_patch_0001.hex --output medithings_bladder_patch_merged_1.hex +mergehex.exe --merge medithings_bladder_patch_bootloader.hex medithings_bladder_patch_bootloader_setting.hex --output medithings_bladder_patch_merged_2.hex +mergehex.exe --merge medithings_bladder_patch_merged_1.hex medithings_bladder_patch_merged_2.hex --output medithings_bladder_patch_dfu_merged_all.hex + + +nrfjprog --family NRF52 --eraseall +nrfjprog --family NRF52 --program medithings_bladder_patch_dfu_merged_all.hex +nrfjprog --family NRF52 --reset +nrfjprog --family NRF52 --rbp ALL + + pause \ No newline at end of file diff --git a/project/ble_peripheral/ble_app_bladder_patch/hex/__download_bootloader_rev3.bat b/project/ble_peripheral/ble_app_bladder_patch/flash/__download_bootloader_rev3.bat similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/hex/__download_bootloader_rev3.bat rename to project/ble_peripheral/ble_app_bladder_patch/flash/__download_bootloader_rev3.bat index bee4483..07fa3db 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/hex/__download_bootloader_rev3.bat +++ b/project/ble_peripheral/ble_app_bladder_patch/flash/__download_bootloader_rev3.bat @@ -1,30 +1,30 @@ - -set CURDIR=%cd% - - - -copy ..\pca10056\s140\arm5_no_packs\_build\nrf52840_xxaa.hex medithings_bladder_patch_0001.hex -copy ..\..\..\dfu\secure_bootloader\pca10056_s140_ble\arm5_no_packs\_build\nrf52840_xxaa_s140.hex medithings_bladder_patch_bootloader.hex - -nrfutil settings generate --family NRF52840 --application medithings_bladder_patch_0001.hex --application-version 1 --bootloader-version 1 --bl-settings-version 2 medithings_bladder_patch_bootloader_setting.hex - -mergehex.exe --merge s140_nrf52_7.2.0_softdevice.hex medithings_bladder_patch_0001.hex --output medithings_bladder_patch_merged_1.hex -mergehex.exe --merge medithings_bladder_patch_bootloader.hex medithings_bladder_patch_bootloader_setting.hex --output medithings_bladder_patch_merged_2.hex -mergehex.exe --merge medithings_bladder_patch_merged_1.hex medithings_bladder_patch_merged_2.hex --output medithings_bladder_patch_dfu_merged_all.hex - - -nrfjprog --memrd 0x10001208 - - -nrfjprog --family NRF52 --recover - -nrfjprog --memrd 0x10001208 - -nrfjprog --family NRF52 --eraseall -nrfjprog --family NRF52 --program medithings_bladder_patch_dfu_merged_all.hex --verify -nrfjprog --family NRF52 --reset -nrfjprog --family NRF52 --rbp ALL -nrfjprog --memwr 0x10001208 --val 0x00 -nrfjprog --memrd 0x10001208 - + +set CURDIR=%cd% + + + +copy ..\pca10056\s140\arm5_no_packs\_build\nrf52840_xxaa.hex medithings_bladder_patch_0001.hex +copy ..\..\..\dfu\secure_bootloader\pca10056_s140_ble\arm5_no_packs\_build\nrf52840_xxaa_s140.hex medithings_bladder_patch_bootloader.hex + +nrfutil settings generate --family NRF52840 --application medithings_bladder_patch_0001.hex --application-version 1 --bootloader-version 1 --bl-settings-version 2 medithings_bladder_patch_bootloader_setting.hex + +mergehex.exe --merge s140_nrf52_7.2.0_softdevice.hex medithings_bladder_patch_0001.hex --output medithings_bladder_patch_merged_1.hex +mergehex.exe --merge medithings_bladder_patch_bootloader.hex medithings_bladder_patch_bootloader_setting.hex --output medithings_bladder_patch_merged_2.hex +mergehex.exe --merge medithings_bladder_patch_merged_1.hex medithings_bladder_patch_merged_2.hex --output medithings_bladder_patch_dfu_merged_all.hex + + +nrfjprog --memrd 0x10001208 + + +nrfjprog --family NRF52 --recover + +nrfjprog --memrd 0x10001208 + +nrfjprog --family NRF52 --eraseall +nrfjprog --family NRF52 --program medithings_bladder_patch_dfu_merged_all.hex --verify +nrfjprog --family NRF52 --reset +nrfjprog --family NRF52 --rbp ALL +nrfjprog --memwr 0x10001208 --val 0x00 +nrfjprog --memrd 0x10001208 + pause \ No newline at end of file diff --git a/project/ble_peripheral/ble_app_bladder_patch/hex/__download_nopro.bat b/project/ble_peripheral/ble_app_bladder_patch/flash/__download_nopro.bat similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/hex/__download_nopro.bat rename to project/ble_peripheral/ble_app_bladder_patch/flash/__download_nopro.bat index fe7cb31..8db8de9 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/hex/__download_nopro.bat +++ b/project/ble_peripheral/ble_app_bladder_patch/flash/__download_nopro.bat @@ -1,20 +1,20 @@ - -set CURDIR=%cd% - - - -copy ..\pca10056\s140\arm5_no_packs\_build\nrf52840_xxaa.hex medithings_bladder_patch_0001.hex -copy ..\..\..\dfu\secure_bootloader\pca10056_s140_ble\arm5_no_packs\_build\nrf52840_xxaa_s140.hex medithings_bladder_patch_bootloader.hex - -nrfutil settings generate --family NRF52840 --application medithings_bladder_patch_0001.hex --application-version 1 --bootloader-version 1 --bl-settings-version 2 medithings_bladder_patch_bootloader_setting.hex - -mergehex.exe --merge s140_nrf52_7.2.0_softdevice.hex medithings_bladder_patch_0001.hex --output medithings_bladder_patch_merged_1.hex -mergehex.exe --merge medithings_bladder_patch_bootloader.hex medithings_bladder_patch_bootloader_setting.hex --output medithings_bladder_patch_merged_2.hex -mergehex.exe --merge medithings_bladder_patch_merged_1.hex medithings_bladder_patch_merged_2.hex --output medithings_bladder_patch_dfu_merged_all.hex - -nrfjprog --family NRF52 --program medithings_bladder_patch_0001.hex -nrfjprog --family NRF52 --reset - - - + +set CURDIR=%cd% + + + +copy ..\pca10056\s140\arm5_no_packs\_build\nrf52840_xxaa.hex medithings_bladder_patch_0001.hex +copy ..\..\..\dfu\secure_bootloader\pca10056_s140_ble\arm5_no_packs\_build\nrf52840_xxaa_s140.hex medithings_bladder_patch_bootloader.hex + +nrfutil settings generate --family NRF52840 --application medithings_bladder_patch_0001.hex --application-version 1 --bootloader-version 1 --bl-settings-version 2 medithings_bladder_patch_bootloader_setting.hex + +mergehex.exe --merge s140_nrf52_7.2.0_softdevice.hex medithings_bladder_patch_0001.hex --output medithings_bladder_patch_merged_1.hex +mergehex.exe --merge medithings_bladder_patch_bootloader.hex medithings_bladder_patch_bootloader_setting.hex --output medithings_bladder_patch_merged_2.hex +mergehex.exe --merge medithings_bladder_patch_merged_1.hex medithings_bladder_patch_merged_2.hex --output medithings_bladder_patch_dfu_merged_all.hex + +nrfjprog --family NRF52 --program medithings_bladder_patch_0001.hex +nrfjprog --family NRF52 --reset + + + pause \ No newline at end of file diff --git a/project/ble_peripheral/ble_app_bladder_patch/hex/cp.bat b/project/ble_peripheral/ble_app_bladder_patch/flash/cp.bat similarity index 96% rename from project/ble_peripheral/ble_app_bladder_patch/hex/cp.bat rename to project/ble_peripheral/ble_app_bladder_patch/flash/cp.bat index 488685d..b36de80 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/hex/cp.bat +++ b/project/ble_peripheral/ble_app_bladder_patch/flash/cp.bat @@ -1,137 +1,137 @@ -@echo off -setlocal enabledelayedexpansion - -echo ========================================== -echo MEDiThings Bladder Patch Programming -echo (mergehex + nrfutil 8.x) -echo ========================================== - -REM ----------------------------------------------------- -REM Create hex output folder -REM ----------------------------------------------------- -if not exist hex mkdir hex - -REM ----------------------------------------------------- -REM 1. Copy HEX files -REM ----------------------------------------------------- -echo [1/7] Copying HEX files... -copy "..\pca10056\s140\arm5_no_packs\_build\nrf52840_xxaa.hex" hex\app.hex -copy "..\..\..\dfu\secure_bootloader\pca10056_s140_ble\arm5_no_packs\_build\nrf52840_xxaa_s140.hex" hex\boot.hex - -if %errorlevel% neq 0 ( - echo ERROR: failed copying files. - pause - exit /b 1 -) - -REM ----------------------------------------------------- -REM 2. Generate Bootloader DFU Settings -REM ----------------------------------------------------- -echo [2/7] Generating Bootloader DFU settings... -nrfutil settings generate ^ - --family NRF52840 ^ - --application hex\app.hex ^ - --application-version 1 ^ - --bootloader-version 1 ^ - --bl-settings-version 2 ^ - hex\settings.hex - -if %errorlevel% neq 0 ( - echo ERROR: nrfutil settings failed. - pause - exit /b 1 -) - -REM ----------------------------------------------------- -REM 3. Merge HEX (SoftDevice + Application) -REM ----------------------------------------------------- -echo [3/7] Merging SoftDevice + Application... -mergehex.exe --merge s140_nrf52_7.2.0_softdevice.hex hex\app.hex --output hex\part1.hex - -if %errorlevel% neq 0 ( - echo ERROR: mergehex part1 failed. - pause - exit /b 1 -) - -REM ----------------------------------------------------- -REM 4. Merge HEX (Bootloader + Settings) -REM ----------------------------------------------------- -echo [4/7] Merging Bootloader + Settings... -mergehex.exe --merge hex\boot.hex hex\settings.hex --output hex\part2.hex - -if %errorlevel% neq 0 ( - echo ERROR: mergehex part2 failed. - pause - exit /b 1 -) - -REM ----------------------------------------------------- -REM 5. Final HEX merge (Combine everything) -REM ----------------------------------------------------- -echo [5/7] Creating final combined HEX... -mergehex.exe --merge hex\part1.hex hex\part2.hex --output hex\firmware_all.hex - -if %errorlevel% neq 0 ( - echo ERROR: mergehex final merge failed. - pause - exit /b 1 -) - -echo Final merged HEX: hex\firmware_all.hex - -REM ----------------------------------------------------- -REM 6. Detect device SERIAL NUMBER -REM ----------------------------------------------------- -echo [6/7] Detecting device serial number... - -for /f %%A in (' - powershell -Command "(nrfutil device list --json | Select-String '\"type\":\"info\"' | ConvertFrom-Json).data.devices[0].serialNumber" -') do set SERIALNUMBER=%%A - -if "%SERIALNUMBER%"=="" ( - echo ERROR: No serial number found. - pause - exit /b 1 -) - -echo Using Serial Number: %SERIALNUMBER% -echo Flashing: recover → erase → program → reset - -REM recover -nrfutil device recover --serial-number %SERIALNUMBER% -if %errorlevel% neq 0 goto flash_fail - -REM erase -nrfutil device erase --serial-number %SERIALNUMBER% -if %errorlevel% neq 0 goto flash_fail - -REM program -nrfutil device program --firmware hex\firmware_all.hex --serial-number %SERIALNUMBER% -if %errorlevel% neq 0 goto flash_fail - -REM reset -nrfutil device reset --serial-number %SERIALNUMBER% -if %errorlevel% neq 0 goto flash_fail - -goto flash_success - -:flash_fail -echo ERROR: Flashing failed. -pause -exit /b 1 - -:flash_success - -REM ----------------------------------------------------- -REM 7. Set Readback Protection (RBP) -REM ----------------------------------------------------- -echo [7/7] Setting Readback Protection (ALL)... -nrfutil device protection-set ALL --serial-number %SERIALNUMBER% - -echo ========================================== -echo Programming Complete! -echo %date% %time% -echo ========================================== -pause -endlocal +@echo off +setlocal enabledelayedexpansion + +echo ========================================== +echo MEDiThings Bladder Patch Programming +echo (mergehex + nrfutil 8.x) +echo ========================================== + +REM ----------------------------------------------------- +REM Create hex output folder +REM ----------------------------------------------------- +if not exist hex mkdir hex + +REM ----------------------------------------------------- +REM 1. Copy HEX files +REM ----------------------------------------------------- +echo [1/7] Copying HEX files... +copy "..\pca10056\s140\arm5_no_packs\_build\nrf52840_xxaa.hex" hex\app.hex +copy "..\..\..\dfu\secure_bootloader\pca10056_s140_ble\arm5_no_packs\_build\nrf52840_xxaa_s140.hex" hex\boot.hex + +if %errorlevel% neq 0 ( + echo ERROR: failed copying files. + pause + exit /b 1 +) + +REM ----------------------------------------------------- +REM 2. Generate Bootloader DFU Settings +REM ----------------------------------------------------- +echo [2/7] Generating Bootloader DFU settings... +nrfutil settings generate ^ + --family NRF52840 ^ + --application hex\app.hex ^ + --application-version 1 ^ + --bootloader-version 1 ^ + --bl-settings-version 2 ^ + hex\settings.hex + +if %errorlevel% neq 0 ( + echo ERROR: nrfutil settings failed. + pause + exit /b 1 +) + +REM ----------------------------------------------------- +REM 3. Merge HEX (SoftDevice + Application) +REM ----------------------------------------------------- +echo [3/7] Merging SoftDevice + Application... +mergehex.exe --merge s140_nrf52_7.2.0_softdevice.hex hex\app.hex --output hex\part1.hex + +if %errorlevel% neq 0 ( + echo ERROR: mergehex part1 failed. + pause + exit /b 1 +) + +REM ----------------------------------------------------- +REM 4. Merge HEX (Bootloader + Settings) +REM ----------------------------------------------------- +echo [4/7] Merging Bootloader + Settings... +mergehex.exe --merge hex\boot.hex hex\settings.hex --output hex\part2.hex + +if %errorlevel% neq 0 ( + echo ERROR: mergehex part2 failed. + pause + exit /b 1 +) + +REM ----------------------------------------------------- +REM 5. Final HEX merge (Combine everything) +REM ----------------------------------------------------- +echo [5/7] Creating final combined HEX... +mergehex.exe --merge hex\part1.hex hex\part2.hex --output hex\firmware_all.hex + +if %errorlevel% neq 0 ( + echo ERROR: mergehex final merge failed. + pause + exit /b 1 +) + +echo Final merged HEX: hex\firmware_all.hex + +REM ----------------------------------------------------- +REM 6. Detect device SERIAL NUMBER +REM ----------------------------------------------------- +echo [6/7] Detecting device serial number... + +for /f %%A in (' + powershell -Command "(nrfutil device list --json | Select-String '\"type\":\"info\"' | ConvertFrom-Json).data.devices[0].serialNumber" +') do set SERIALNUMBER=%%A + +if "%SERIALNUMBER%"=="" ( + echo ERROR: No serial number found. + pause + exit /b 1 +) + +echo Using Serial Number: %SERIALNUMBER% +echo Flashing: recover → erase → program → reset + +REM recover +nrfutil device recover --serial-number %SERIALNUMBER% +if %errorlevel% neq 0 goto flash_fail + +REM erase +nrfutil device erase --serial-number %SERIALNUMBER% +if %errorlevel% neq 0 goto flash_fail + +REM program +nrfutil device program --firmware hex\firmware_all.hex --serial-number %SERIALNUMBER% +if %errorlevel% neq 0 goto flash_fail + +REM reset +nrfutil device reset --serial-number %SERIALNUMBER% +if %errorlevel% neq 0 goto flash_fail + +goto flash_success + +:flash_fail +echo ERROR: Flashing failed. +pause +exit /b 1 + +:flash_success + +REM ----------------------------------------------------- +REM 7. Set Readback Protection (RBP) +REM ----------------------------------------------------- +echo [7/7] Setting Readback Protection (ALL)... +nrfutil device protection-set ALL --serial-number %SERIALNUMBER% + +echo ========================================== +echo Programming Complete! +echo %date% %time% +echo ========================================== +pause +endlocal diff --git a/project/ble_peripheral/ble_app_bladder_patch/hex/cpd.bat b/project/ble_peripheral/ble_app_bladder_patch/flash/cpd.bat similarity index 96% rename from project/ble_peripheral/ble_app_bladder_patch/hex/cpd.bat rename to project/ble_peripheral/ble_app_bladder_patch/flash/cpd.bat index 37b77a6..20adf5e 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/hex/cpd.bat +++ b/project/ble_peripheral/ble_app_bladder_patch/flash/cpd.bat @@ -1,183 +1,183 @@ -@echo off -setlocal enabledelayedexpansion - -echo ========================================== -echo MEDiThings Bladder Patch Programming -echo (DEBUG MODE - No Readback Protection) -echo ========================================== - -REM ----------------------------------------------------- -REM Set script directory as base path -REM ----------------------------------------------------- -cd /d "%~dp0" -echo Working directory: %CD% - -REM ----------------------------------------------------- -REM Create hex output folder -REM ----------------------------------------------------- -if not exist hex mkdir hex - -REM ----------------------------------------------------- -REM 1. Copy HEX files (with verification) -REM ----------------------------------------------------- -echo [1/6] Copying HEX files... - -set "APP_SRC=..\pca10056\s140\arm5_no_packs\_build\nrf52840_xxaa.hex" -set "BOOT_SRC=..\..\..\dfu\secure_bootloader\pca10056_s140_ble\arm5_no_packs\_build\nrf52840_xxaa_s140.hex" - -REM Check source files exist -if not exist "%APP_SRC%" ( - echo ERROR: Application HEX not found: %APP_SRC% - pause - exit /b 1 -) - -if not exist "%BOOT_SRC%" ( - echo ERROR: Bootloader HEX not found: %BOOT_SRC% - pause - exit /b 1 -) - -REM Copy with /Y to overwrite without prompt -copy /Y "%APP_SRC%" hex\app.hex -if %errorlevel% neq 0 ( - echo ERROR: Failed to copy app.hex - pause - exit /b 1 -) -echo - app.hex copied OK - -copy /Y "%BOOT_SRC%" hex\boot.hex -if %errorlevel% neq 0 ( - echo ERROR: Failed to copy boot.hex - pause - exit /b 1 -) -echo - boot.hex copied OK - -REM ----------------------------------------------------- -REM 2. Generate Bootloader DFU Settings -REM ----------------------------------------------------- -echo [2/6] Generating Bootloader DFU settings... -nrfutil settings generate ^ - --family NRF52840 ^ - --application hex\app.hex ^ - --application-version 1 ^ - --bootloader-version 1 ^ - --bl-settings-version 2 ^ - hex\settings.hex - -if %errorlevel% neq 0 ( - echo ERROR: nrfutil settings failed. - pause - exit /b 1 -) - -REM ----------------------------------------------------- -REM 3. Merge HEX (SoftDevice + Application) -REM ----------------------------------------------------- -echo [3/6] Merging SoftDevice + Application... -mergehex.exe --merge s140_nrf52_7.2.0_softdevice.hex hex\app.hex --output hex\part1.hex - -if %errorlevel% neq 0 ( - echo ERROR: mergehex part1 failed. - pause - exit /b 1 -) - -REM ----------------------------------------------------- -REM 4. Merge HEX (Bootloader + Settings) -REM ----------------------------------------------------- -echo [4/6] Merging Bootloader + Settings... -mergehex.exe --merge hex\boot.hex hex\settings.hex --output hex\part2.hex - -if %errorlevel% neq 0 ( - echo ERROR: mergehex part2 failed. - pause - exit /b 1 -) - -REM ----------------------------------------------------- -REM 5. Final HEX merge (Combine everything) -REM ----------------------------------------------------- -echo [5/6] Creating final combined HEX... -mergehex.exe --merge hex\part1.hex hex\part2.hex --output hex\firmware_all.hex - -if %errorlevel% neq 0 ( - echo ERROR: mergehex final merge failed. - pause - exit /b 1 -) - -echo Final merged HEX: hex\firmware_all.hex - -REM ----------------------------------------------------- -REM 6. Detect device SERIAL NUMBER and Flash -REM ----------------------------------------------------- -echo [6/6] Detecting device serial number... - -for /f %%A in (' - powershell -Command "(nrfutil device list --json | Select-String '\"type\":\"info\"' | ConvertFrom-Json).data.devices[0].serialNumber" -') do set SERIALNUMBER=%%A - -if "%SERIALNUMBER%"=="" ( - echo ERROR: No serial number found. - pause - exit /b 1 -) - -echo Using Serial Number: %SERIALNUMBER% -echo Flashing: program → reset (NO erase, FDS preserved) - -REM recover - SKIP to preserve internal flash data -REM erase - SKIP to preserve FDS/fstorage data - -REM program (hex 데이터가 있는 영역만 erase, FDS 보존) -nrfutil device program --firmware hex\firmware_all.hex --options chip_erase_mode=ERASE_RANGES_TOUCHED_BY_FIRMWARE --serial-number %SERIALNUMBER% -if %errorlevel% neq 0 ( - echo. - echo [WARNING] Program failed - device may have Readback Protection enabled. - echo Recover will ERASE ALL flash including FDS data. - echo. - set /p RECOVER_YN="Recover and retry? (Y/N): " - if /i "!RECOVER_YN!"=="Y" ( - echo Recovering device... - nrfutil device recover --serial-number %SERIALNUMBER% - if %errorlevel% neq 0 goto flash_fail - echo Re-programming... - nrfutil device program --firmware hex\firmware_all.hex --options chip_erase_mode=ERASE_RANGES_TOUCHED_BY_FIRMWARE --serial-number %SERIALNUMBER% - if %errorlevel% neq 0 goto flash_fail - ) else ( - goto flash_fail - ) -) - -REM reset -nrfutil device reset --serial-number %SERIALNUMBER% -if %errorlevel% neq 0 goto flash_fail - -goto flash_success - -:flash_fail -echo ERROR: Flashing failed. -pause -exit /b 1 - -:flash_success - -REM ----------------------------------------------------- -REM NOTE: Readback Protection SKIPPED for debugging -REM ----------------------------------------------------- -echo ========================================== -echo Programming Complete! (DEBUG MODE) -echo No Readback Protection Applied -echo Internal Flash (FDS) Preserved -echo %date% %time% -echo ========================================== - -REM ----------------------------------------------------- -REM Open J-Link RTT Viewer for RTT debugging -REM ----------------------------------------------------- -echo Starting J-Link RTT Viewer... - -endlocal +@echo off +setlocal enabledelayedexpansion + +echo ========================================== +echo MEDiThings Bladder Patch Programming +echo (DEBUG MODE - No Readback Protection) +echo ========================================== + +REM ----------------------------------------------------- +REM Set script directory as base path +REM ----------------------------------------------------- +cd /d "%~dp0" +echo Working directory: %CD% + +REM ----------------------------------------------------- +REM Create hex output folder +REM ----------------------------------------------------- +if not exist hex mkdir hex + +REM ----------------------------------------------------- +REM 1. Copy HEX files (with verification) +REM ----------------------------------------------------- +echo [1/6] Copying HEX files... + +set "APP_SRC=..\pca10056\s140\arm5_no_packs\_build\nrf52840_xxaa.hex" +set "BOOT_SRC=..\..\..\dfu\secure_bootloader\pca10056_s140_ble\arm5_no_packs\_build\nrf52840_xxaa_s140.hex" + +REM Check source files exist +if not exist "%APP_SRC%" ( + echo ERROR: Application HEX not found: %APP_SRC% + pause + exit /b 1 +) + +if not exist "%BOOT_SRC%" ( + echo ERROR: Bootloader HEX not found: %BOOT_SRC% + pause + exit /b 1 +) + +REM Copy with /Y to overwrite without prompt +copy /Y "%APP_SRC%" hex\app.hex +if %errorlevel% neq 0 ( + echo ERROR: Failed to copy app.hex + pause + exit /b 1 +) +echo - app.hex copied OK + +copy /Y "%BOOT_SRC%" hex\boot.hex +if %errorlevel% neq 0 ( + echo ERROR: Failed to copy boot.hex + pause + exit /b 1 +) +echo - boot.hex copied OK + +REM ----------------------------------------------------- +REM 2. Generate Bootloader DFU Settings +REM ----------------------------------------------------- +echo [2/6] Generating Bootloader DFU settings... +nrfutil settings generate ^ + --family NRF52840 ^ + --application hex\app.hex ^ + --application-version 1 ^ + --bootloader-version 1 ^ + --bl-settings-version 2 ^ + hex\settings.hex + +if %errorlevel% neq 0 ( + echo ERROR: nrfutil settings failed. + pause + exit /b 1 +) + +REM ----------------------------------------------------- +REM 3. Merge HEX (SoftDevice + Application) +REM ----------------------------------------------------- +echo [3/6] Merging SoftDevice + Application... +mergehex.exe --merge s140_nrf52_7.2.0_softdevice.hex hex\app.hex --output hex\part1.hex + +if %errorlevel% neq 0 ( + echo ERROR: mergehex part1 failed. + pause + exit /b 1 +) + +REM ----------------------------------------------------- +REM 4. Merge HEX (Bootloader + Settings) +REM ----------------------------------------------------- +echo [4/6] Merging Bootloader + Settings... +mergehex.exe --merge hex\boot.hex hex\settings.hex --output hex\part2.hex + +if %errorlevel% neq 0 ( + echo ERROR: mergehex part2 failed. + pause + exit /b 1 +) + +REM ----------------------------------------------------- +REM 5. Final HEX merge (Combine everything) +REM ----------------------------------------------------- +echo [5/6] Creating final combined HEX... +mergehex.exe --merge hex\part1.hex hex\part2.hex --output hex\firmware_all.hex + +if %errorlevel% neq 0 ( + echo ERROR: mergehex final merge failed. + pause + exit /b 1 +) + +echo Final merged HEX: hex\firmware_all.hex + +REM ----------------------------------------------------- +REM 6. Detect device SERIAL NUMBER and Flash +REM ----------------------------------------------------- +echo [6/6] Detecting device serial number... + +for /f %%A in (' + powershell -Command "(nrfutil device list --json | Select-String '\"type\":\"info\"' | ConvertFrom-Json).data.devices[0].serialNumber" +') do set SERIALNUMBER=%%A + +if "%SERIALNUMBER%"=="" ( + echo ERROR: No serial number found. + pause + exit /b 1 +) + +echo Using Serial Number: %SERIALNUMBER% +echo Flashing: program → reset (NO erase, FDS preserved) + +REM recover - SKIP to preserve internal flash data +REM erase - SKIP to preserve FDS/fstorage data + +REM program (hex 데이터가 있는 영역만 erase, FDS 보존) +nrfutil device program --firmware hex\firmware_all.hex --options chip_erase_mode=ERASE_RANGES_TOUCHED_BY_FIRMWARE --serial-number %SERIALNUMBER% +if %errorlevel% neq 0 ( + echo. + echo [WARNING] Program failed - device may have Readback Protection enabled. + echo Recover will ERASE ALL flash including FDS data. + echo. + set /p RECOVER_YN="Recover and retry? (Y/N): " + if /i "!RECOVER_YN!"=="Y" ( + echo Recovering device... + nrfutil device recover --serial-number %SERIALNUMBER% + if %errorlevel% neq 0 goto flash_fail + echo Re-programming... + nrfutil device program --firmware hex\firmware_all.hex --options chip_erase_mode=ERASE_RANGES_TOUCHED_BY_FIRMWARE --serial-number %SERIALNUMBER% + if %errorlevel% neq 0 goto flash_fail + ) else ( + goto flash_fail + ) +) + +REM reset +nrfutil device reset --serial-number %SERIALNUMBER% +if %errorlevel% neq 0 goto flash_fail + +goto flash_success + +:flash_fail +echo ERROR: Flashing failed. +pause +exit /b 1 + +:flash_success + +REM ----------------------------------------------------- +REM NOTE: Readback Protection SKIPPED for debugging +REM ----------------------------------------------------- +echo ========================================== +echo Programming Complete! (DEBUG MODE) +echo No Readback Protection Applied +echo Internal Flash (FDS) Preserved +echo %date% %time% +echo ========================================== + +REM ----------------------------------------------------- +REM Open J-Link RTT Viewer for RTT debugging +REM ----------------------------------------------------- +echo Starting J-Link RTT Viewer... + +endlocal diff --git a/project/ble_peripheral/ble_app_bladder_patch/hex/cpd_eraseALL.bat b/project/ble_peripheral/ble_app_bladder_patch/flash/cpd_eraseALL.bat similarity index 100% rename from project/ble_peripheral/ble_app_bladder_patch/hex/cpd_eraseALL.bat rename to project/ble_peripheral/ble_app_bladder_patch/flash/cpd_eraseALL.bat diff --git a/project/ble_peripheral/ble_app_bladder_patch/hex/etc/__erase_all.bat b/project/ble_peripheral/ble_app_bladder_patch/flash/etc/__erase_all.bat similarity index 90% rename from project/ble_peripheral/ble_app_bladder_patch/hex/etc/__erase_all.bat rename to project/ble_peripheral/ble_app_bladder_patch/flash/etc/__erase_all.bat index 2daddc5..bb27c3f 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/hex/etc/__erase_all.bat +++ b/project/ble_peripheral/ble_app_bladder_patch/flash/etc/__erase_all.bat @@ -1,3 +1,3 @@ -nrfjprog --family NRF52 --recover -nrfjprog --family NRF52 --eraseall +nrfjprog --family NRF52 --recover +nrfjprog --family NRF52 --eraseall pause \ No newline at end of file diff --git a/project/ble_peripheral/ble_app_bladder_patch/hex/etc/__fw_protect.bat b/project/ble_peripheral/ble_app_bladder_patch/flash/etc/__fw_protect.bat similarity index 90% rename from project/ble_peripheral/ble_app_bladder_patch/hex/etc/__fw_protect.bat rename to project/ble_peripheral/ble_app_bladder_patch/flash/etc/__fw_protect.bat index 11b9ba7..853727e 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/hex/etc/__fw_protect.bat +++ b/project/ble_peripheral/ble_app_bladder_patch/flash/etc/__fw_protect.bat @@ -1,3 +1,3 @@ -nrfjprog --family NRF52 --rbp ALL -nrfjprog --family NRF52 --pinreset +nrfjprog --family NRF52 --rbp ALL +nrfjprog --family NRF52 --pinreset pause \ No newline at end of file diff --git a/project/ble_peripheral/ble_app_bladder_patch/hex/etc/__fw_unprotect.bat b/project/ble_peripheral/ble_app_bladder_patch/flash/etc/__fw_unprotect.bat similarity index 85% rename from project/ble_peripheral/ble_app_bladder_patch/hex/etc/__fw_unprotect.bat rename to project/ble_peripheral/ble_app_bladder_patch/flash/etc/__fw_unprotect.bat index 66a509d..83c0737 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/hex/etc/__fw_unprotect.bat +++ b/project/ble_peripheral/ble_app_bladder_patch/flash/etc/__fw_unprotect.bat @@ -1,2 +1,2 @@ -nrfjprog --family NRF52 --recover +nrfjprog --family NRF52 --recover pause \ No newline at end of file diff --git a/project/ble_peripheral/ble_app_bladder_patch/hex/etc/__reset.bat b/project/ble_peripheral/ble_app_bladder_patch/flash/etc/__reset.bat similarity index 85% rename from project/ble_peripheral/ble_app_bladder_patch/hex/etc/__reset.bat rename to project/ble_peripheral/ble_app_bladder_patch/flash/etc/__reset.bat index b6c51ba..3ee87d2 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/hex/etc/__reset.bat +++ b/project/ble_peripheral/ble_app_bladder_patch/flash/etc/__reset.bat @@ -1,2 +1,2 @@ -nrfjprog --family NRF52 --pinreset +nrfjprog --family NRF52 --pinreset pause \ No newline at end of file diff --git a/project/ble_peripheral/ble_app_bladder_patch/hex/generate_dfu_zip.bat b/project/ble_peripheral/ble_app_bladder_patch/flash/generate_dfu_zip.bat similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/hex/generate_dfu_zip.bat rename to project/ble_peripheral/ble_app_bladder_patch/flash/generate_dfu_zip.bat index b56bc4b..9c19497 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/hex/generate_dfu_zip.bat +++ b/project/ble_peripheral/ble_app_bladder_patch/flash/generate_dfu_zip.bat @@ -1,8 +1,8 @@ -chcp 437 -set CURDIR=%cd% - - -copy ..\pca10056\s140\arm5_no_packs\_build\nrf52840_xxaa.hex medithings_bladder_patch_0001.hex - -nrfutil pkg generate --application medithings_bladder_patch_0001.hex --application-version 1 --hw-version 52 --sd-req 0x0100 --sd-id 0x0100 --key-file private.key medithings_bladder_patch_dfu.zip -pause +chcp 437 +set CURDIR=%cd% + + +copy ..\pca10056\s140\arm5_no_packs\_build\nrf52840_xxaa.hex medithings_bladder_patch_0001.hex + +nrfutil pkg generate --application medithings_bladder_patch_0001.hex --application-version 1 --hw-version 52 --sd-req 0x0100 --sd-id 0x0100 --key-file private.key medithings_bladder_patch_dfu.zip +pause diff --git a/project/ble_peripheral/ble_app_bladder_patch/hex/log.log b/project/ble_peripheral/ble_app_bladder_patch/flash/log.log similarity index 100% rename from project/ble_peripheral/ble_app_bladder_patch/hex/log.log rename to project/ble_peripheral/ble_app_bladder_patch/flash/log.log diff --git a/project/ble_peripheral/ble_app_bladder_patch/hex/private.key b/project/ble_peripheral/ble_app_bladder_patch/flash/private.key similarity index 100% rename from project/ble_peripheral/ble_app_bladder_patch/hex/private.key rename to project/ble_peripheral/ble_app_bladder_patch/flash/private.key diff --git a/project/ble_peripheral/ble_app_bladder_patch/hex/sett.bat b/project/ble_peripheral/ble_app_bladder_patch/flash/sett.bat similarity index 89% rename from project/ble_peripheral/ble_app_bladder_patch/hex/sett.bat rename to project/ble_peripheral/ble_app_bladder_patch/flash/sett.bat index 87f456f..1efbb1a 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/hex/sett.bat +++ b/project/ble_peripheral/ble_app_bladder_patch/flash/sett.bat @@ -1,3 +1,3 @@ -set path=d:\nrfutil\bin;%path% -d: +set path=d:\nrfutil\bin;%path% +d: cd D:\mt_project\vesiscan\project\ble_peripheral\ble_app_bladder_patch\hex \ No newline at end of file diff --git a/project/ble_peripheral/ble_app_bladder_patch/fstorage.c b/project/ble_peripheral/ble_app_bladder_patch/hal/fds/fstorage.c similarity index 96% rename from project/ble_peripheral/ble_app_bladder_patch/fstorage.c rename to project/ble_peripheral/ble_app_bladder_patch/hal/fds/fstorage.c index 8de8c11..067eb01 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/fstorage.c +++ b/project/ble_peripheral/ble_app_bladder_patch/hal/fds/fstorage.c @@ -1,496 +1,496 @@ -/******************************************************************************* - TEST medi50 Dec 23 - ******************************************************************************/ - -/** - * @file fstorage.c - * @brief FDS(Flash Data Storage) 기반 설정 저장 모듈 - * - * 외부 EEPROM을 대체하여 nRF52840 내장 플래시에 장치 설정을 저장/로드한다. - * - * [레코드 관리] - * - CONFIG_FILE = 0x8010, CONFIG_REC_KEY = 0x7010 으로 단일 레코드를 관리한다. - * - * [config_data_t 구조체 필드] - * - magic(4B) : 포맷 확인용 매직 넘버 (0x20231226 -> 0x20260318(기본값 재생성을 위해 매직넘버 변경)) - * - hw_no(12B) : 하드웨어 버전 (기본값: "") - * - serial_no(12B) : 시리얼 번호 (기본값: "VB026030000") - * - passkey(6B) : BLE 페어링용 정적 패스키(기본값: "123456") - * - bond_data_delete(1B) : 본딩 데이터 삭제 플래그(기본값: 1) - * - reset_status(1B) : 리셋 상태 값(기본값: 99) - * - life_cycle(4B) : 장치 사용 횟수(기본값: 0) - * - piezo_freq_option : Piezo 송신 펄스 주파수(기본값: 1=2.1MHz) - * - piezo_cycles : Piezo 송신 펄스 사이클 수 (기본값: 7) - * - piezo_averaging : Piezo 채널당 반복 측정 횟수 (기본값: 5) - * - piezo_delay_us : Piezo 송신 펄스 출력 후 ADC 시작 시까지 대기시간(us) (기본값: 10) - * - piezo_num_samples : Piezo 측정 ADC 샘플 개수 (기본값: 100) - * - * [매직 넘버 검증] - * - 플래시에서 로드한 데이터의 magic 값이 0x20231226과 일치하는지 확인하여 - * 유효한 설정인지 판별한다. 불일치 시 기본값으로 초기화한다. - * - * [FDS 이벤트 후처리] - * - FDS 쓰기/업데이트 완료 이벤트 수신 후, 대기 중인 후처리를 수행한다: - * 전원 OFF (go_device_power_off), 슬립 진입 (go_sleep_mode_enter), - * 시스템 리셋 (go_NVIC_SystemReset) - */ - -#include "sdk_config.h" - -#include - -#include "app_error.h" -#include "boards.h" -#include "nrf_fstorage.h" -#include "nrf_soc.h" -#include "nrf_strerror.h" -#include "sdk_config.h" -#include "nrf_fstorage_sd.h" -#include "nrf_delay.h" -#include "ble_gap.h" -#include "fds.h" - -#include "nrf_log.h" -#include "nrf_log_ctrl.h" -#include "nrf_log_default_backends.h" - -#include "fstorage.h" -#include "nrf_pwr_mgmt.h" -#include "main.h" -#include "debug_print.h" - - -/* FDS 레코드 식별자: 파일 ID와 레코드 키로 단일 설정 레코드를 관리 */ - -#define CONFIG_FILE (0x8010) -#define CONFIG_REC_KEY (0x7010) - -/* 매직 넘버: 플래시에 저장된 데이터가 유효한 설정인지 판별하는 데 사용 */ -#define CONFIG_MAGIC_NUMBER_VALUE (0x20260319) - -/* 전역 설정 데이터 구조체 인스턴스 */ -config_data_t m_config; - -/* FDS 쓰기 완료 후 수행할 후처리 플래그 (main.c에서 선언) */ -extern bool go_device_power_off; /* 전원 OFF 요청 */ -extern bool go_sleep_mode_enter; /* 슬립 모드 진입 요청 */ -extern bool go_NVIC_SystemReset; /* 시스템 리셋 요청 */ - -/* FDS 초기화 완료 여부 플래그 (fds_evt_handler에서 true로 설정) */ -static bool volatile m_fds_initialized; - -/* FDS 쓰기 진행 중 플래그: true이면 쓰기 완료 대기 중 */ -bool fds_flag_write = false; - -/* FDS에 기록할 레코드 템플릿 (m_config 데이터를 가리킴) */ -static fds_record_t const m_dummy_record = -{ - .file_id = CONFIG_FILE, - .key = CONFIG_REC_KEY, - .data.p_data = (void const *)&m_config, - /* The length of a record is always expressed in 4-byte units (words). */ - .data.length_words = (sizeof(m_config) + 3) / sizeof(uint32_t), -}; - - -/* 기본 설정값 상수 */ -int8_t reset_status_dflt = 99; /* 리셋 상태 기본값 */ -uint8_t static_passkey_dflt[6] = DEFAULT_PASSKEY; /* BLE 패스키 기본값 */ - -/** - * @brief 기본 설정값 초기화 - * - * m_config 구조체의 각 필드를 공장 초기값으로 설정한다. - * 플래시에 유효한 설정이 없거나 매직 넘버가 불일치할 때 호출된다.VB0HW0000 - */ -void fds_default_value_set(void) -{ - /* HW Number - default from HARDWARE_VERSION */ - memset(m_config.hw_no, 0, 12); - memcpy(m_config.hw_no, HARDWARE_VERSION, strlen(HARDWARE_VERSION)); - - /* Serial Number - default from SERIAL_NUMBER */ - memset(m_config.serial_no, 0, 12); - memcpy(m_config.serial_no, SERIAL_NUMBER, strlen(SERIAL_NUMBER)); - - /* Static Passkey */ - memcpy(m_config.static_passkey, static_passkey_dflt, 6); - - /* Bond data delete */ - m_config.bond_data_delete = 1; - - /* Reset status */ - m_config.reset_status = reset_status_dflt; - - /* Device usage count */ - m_config.life_cycle = 0; - - /* 피에조 측정 파라미터 기본값 */ - m_config.piezo_freq_option = 1; /* 2.1MHz */ - m_config.piezo_delay_us = 10; /* 버스트 후 10us */ - m_config.piezo_num_samples = 100; /* 100샘플 */ - m_config.piezo_cycles = 7; /* 7사이클 */ - m_config.piezo_averaging = 3; /* 3회 평균화 */ -} - - -/* 마지막 FDS 이벤트 ID 저장 (디버깅용) */ -static volatile uint8_t fds_last_evt = 0xFF; - -/** - * @brief FDS 이벤트 콜백 핸들러 - * - * FDS 내부에서 비동기 작업이 완료될 때 호출된다. - * - FDS_EVT_INIT : FDS 초기화 완료 → m_fds_initialized 플래그 설정 - * - FDS_EVT_WRITE : 새 레코드 쓰기 완료 → fds_flag_write 해제 - * - FDS_EVT_UPDATE : 레코드 업데이트 완료 → fds_flag_write 해제 후 - * 대기 중인 전원 OFF / 슬립 진입 / 시스템 리셋 수행 - * - FDS_EVT_DEL_RECORD / FDS_EVT_DEL_FILE / FDS_EVT_GC : 현재 미사용 - */ -static void fds_evt_handler( fds_evt_t const *p_evt ) -{ - fds_last_evt = p_evt->id; - - switch( p_evt->id ) - { - case FDS_EVT_INIT: - if( p_evt->result == NRF_SUCCESS ) - { - m_fds_initialized = true; - } - break; - - case FDS_EVT_WRITE: - { - fds_flag_write = false; - } - break; - - case FDS_EVT_UPDATE: - { - fds_flag_write = false; - - if(go_device_power_off == true) { - /* After flash writing completed, System Power Off */ - device_power_off(); - } - if(go_sleep_mode_enter == true) { - /* After flash writing completed, System go to Sleep Mode */ - sleep_mode_enter(); - } - if(go_NVIC_SystemReset == true) { - /* After flash writing completed, System Reset */ - DBG_PRINTF("Off FDS_EVENT\r\n"); - NVIC_SystemReset(); - } - } - break; - - case FDS_EVT_DEL_RECORD: - break; - - case FDS_EVT_DEL_FILE: - break; - - case FDS_EVT_GC: - break; - - default: - break; - } -} - - -/** - * @brief FDS 초기화 완료 대기 - * - * m_fds_initialized 플래그가 true가 될 때까지 대기한다. - * 최대 3초(3000ms) 타임아웃이 설정되어 있으며, - * 타임아웃 시 에러 로그를 출력하고 반환한다. - */ -static void wait_for_fds_ready( void ) -{ - uint32_t timeout = 0; - while( !m_fds_initialized ) - { - nrf_pwr_mgmt_run(); - nrf_delay_ms(1); - timeout++; - if (timeout > 3000) /* 3 second timeout */ - { - DBG_PRINTF("[FDS] TIMEOUT!\r\n"); - break; - } - } -} - - -/** - * @brief FDS에서 설정 로드 - * - * 플래시에서 CONFIG_FILE/CONFIG_REC_KEY 레코드를 검색하여 m_config에 로드한다. - * - * 동작 흐름: - * 1. fds_record_find()로 레코드 검색 (실패 시 최대 10회 재시도, 100ms 간격) - * 2. 레코드 발견 시: - * - fds_record_open()으로 열기 (CRC 에러 시 삭제 후 기본값으로 재생성) - * - 데이터를 m_config로 복사 - * - 매직 넘버 불일치 시 기존 레코드 삭제 → 기본값 설정 → 재기록 - * 3. 레코드 미발견 시: - * - 기본값으로 새 레코드 생성 후 다시 로드 - */ -void config_load( void ) -{ - ret_code_t rc; - fds_record_desc_t desc = { 0 }; - fds_find_token_t tok = { 0 }; - uint8_t cfg_retry = 0; - uint32_t fds_wait_cnt = 0; // FDS write 대기 카운터 - - cfg_load_start: - memset((char *)&desc, 0, sizeof(desc)); - memset((char *)&tok, 0, sizeof(tok)); - rc = fds_record_find(CONFIG_FILE, CONFIG_REC_KEY, &desc, &tok); - DBG_PRINTF("[FDS] find rc=%u\r\n", rc); - - /* FDS may not be fully ready yet - retry before writing defaults */ - if (rc != NRF_SUCCESS && cfg_retry < 10) - { - cfg_retry++; - DBG_PRINTF("[FDS] retry %u/10\r\n", cfg_retry); - nrf_delay_ms(100); - goto cfg_load_start; - } - - if( rc == NRF_SUCCESS ) - { - /* A config file is in flash. Let's update it. */ - fds_flash_record_t config = { 0 }; - - /* Open the record and read its contents. */ - rc = fds_record_open(&desc, &config); - if (rc != NRF_SUCCESS) - { - /* CRC error or corrupt record - delete and use defaults */ - DBG_PRINTF("[FDS] open ERR=%u, deleting\r\n", rc); - (void)fds_record_delete(&desc); - fds_gc(); - fds_default_value_set(); - goto cfg_load_write_new; - } - - /* Copy the configuration from flash into m_config. */ - memcpy(&m_config, config.p_data, sizeof(config_data_t)); - - /* Close the record when done reading. */ - rc = fds_record_close(&desc); - APP_ERROR_CHECK(rc); - - DBG_PRINTF("[FDS] magic=0x%08X (expect 0x%08X)\r\n", m_config.magic_number, CONFIG_MAGIC_NUMBER_VALUE); - - if( m_config.magic_number != (uint32_t)CONFIG_MAGIC_NUMBER_VALUE ) - { // first init - DBG_PRINTF("[FDS] FORMAT! overwriting with defaults\r\n"); - rc = fds_record_delete(&desc); - APP_ERROR_CHECK(rc); - m_config.magic_number = CONFIG_MAGIC_NUMBER_VALUE; - - // default.... - fds_default_value_set(); - - /* Write the updated record to flash. */ - rc = fds_record_update(&desc, &m_dummy_record); - if( (rc != NRF_SUCCESS) && (rc == FDS_ERR_NO_SPACE_IN_FLASH) ) - { - rc = fds_gc(); - APP_ERROR_CHECK(rc); - } - else - { - APP_ERROR_CHECK(rc); - } - goto cfg_load_start; - } - DBG_PRINTF("[FDS] Loaded OK\r\n"); - } - else - { - cfg_load_write_new: - DBG_PRINTF("[FDS] New - writing defaults\r\n"); - /* System config not found (or corrupt); write a new one. */ - m_config.magic_number = CONFIG_MAGIC_NUMBER_VALUE; - - // default.... - fds_default_value_set(); - - fds_flag_write = true; - rc = fds_record_write(&desc, &m_dummy_record); - - if (rc != NRF_SUCCESS) - { - DBG_PRINTF("[FDS] Write ERR=%u\r\n", rc); - fds_flag_write = false; - } - - fds_wait_cnt = 0; // - - while(fds_flag_write && fds_wait_cnt < 3000) // FDS write 최대 3초 타임아웃 - { - nrf_pwr_mgmt_run(); - nrf_delay_ms(1); - fds_wait_cnt++; - } - - if(fds_flag_write) // FDS write 타임아웃 시 플래그 강제 해제 - { - DBG_PRINTF("[FDS] write TIMEOUT! forcing flag clear\r\n"); - fds_flag_write = false; - } - - if( (rc != NRF_SUCCESS) && (rc == FDS_ERR_NO_SPACE_IN_FLASH) ) - { - rc = fds_gc(); - APP_ERROR_CHECK(rc); - } - else - { - APP_ERROR_CHECK(rc); - } - - NRF_LOG_FLUSH(); - goto cfg_load_start; - } -} - - -/** - * @brief 현재 설정을 FDS에 저장 - * - * m_config의 내용을 플래시에 기록한다. - * - * 동작 흐름: - * 1. 이전 FDS 쓰기 작업이 진행 중이면 최대 3초 대기 - * 2. 매직 넘버가 올바르지 않으면 보정 - * 3. 기존 레코드가 있으면 fds_record_update()로 갱신 - * - 플래시 공간 부족 시 GC(가비지 컬렉션) 수행 후 재시도 - * 4. 기존 레코드가 없으면 fds_record_write()로 새로 생성 - * - * 참고: 쓰기 완료는 fds_evt_handler()에서 비동기로 처리되며, - * 완료 후 전원 OFF/슬립/리셋 등의 후처리가 수행될 수 있다. - */ -void config_save( void ) -{ - ret_code_t rc; - fds_record_desc_t desc = { 0 }; - fds_find_token_t tok = { 0 }; - - DBG_PRINTF("[CFG_SAVE] start\r\n"); - - /* Wait for any previous FDS operation to complete */ - if (fds_flag_write) - { - uint32_t wait_cnt = 0; - - DBG_PRINTF("[CFG_SAVE] waiting for prev FDS op...\r\n"); - while (fds_flag_write && wait_cnt < 3000) - { - nrf_pwr_mgmt_run(); - nrf_delay_ms(1); - wait_cnt++; - } - if (fds_flag_write) - { - DBG_PRINTF("[CFG_SAVE] TIMEOUT! forcing flag clear\r\n"); - fds_flag_write = false; - } - } - - if( m_config.magic_number != (uint32_t)CONFIG_MAGIC_NUMBER_VALUE ) - { - m_config.magic_number = CONFIG_MAGIC_NUMBER_VALUE; - } - - memset((char *)&desc, 0, sizeof(desc)); - memset((char *)&tok, 0, sizeof(tok)); - rc = fds_record_find(CONFIG_FILE, CONFIG_REC_KEY, &desc, &tok); - DBG_PRINTF("[CFG_SAVE] find rc=%u\r\n", rc); - - if( rc == NRF_SUCCESS ) - { - fds_flag_write = true; - rc = fds_record_update(&desc, &m_dummy_record); - DBG_PRINTF("[CFG_SAVE] update rc=%u\r\n", rc); - - if( rc == FDS_ERR_NO_SPACE_IN_FLASH ) - { - fds_flag_write = false; - rc = fds_gc(); - DBG_PRINTF("[CFG_SAVE] gc rc=%u, retry\r\n", rc); - fds_flag_write = true; - rc = fds_record_update(&desc, &m_dummy_record); - DBG_PRINTF("[CFG_SAVE] retry rc=%u\r\n", rc); - } - - if( rc != NRF_SUCCESS ) - { - DBG_PRINTF("[CFG_SAVE] FAIL rc=%u\r\n", rc); - fds_flag_write = false; - } - } - else - { - DBG_PRINTF("[CFG_SAVE] not found, writing new\r\n"); - fds_flag_write = true; - rc = fds_record_write(&desc, &m_dummy_record); - DBG_PRINTF("[CFG_SAVE] write rc=%u\r\n", rc); - - if( rc != NRF_SUCCESS ) - { - DBG_PRINTF("[CFG_SAVE] FAIL rc=%u\r\n", rc); - fds_flag_write = false; - } - } - - DBG_PRINTF("[CFG_SAVE] done\r\n"); -} - - -/** - * @brief config_load()의 래퍼 함수 - * - * 외부 모듈에서 설정 로드를 요청할 때 사용한다. - */ -void fs_set_value(void) -{ - config_load(); -} - -/** - * @brief FDS 초기화 - * - * 부팅 시 호출되어 FDS 모듈을 초기화한다. - * 1. fds_register()로 이벤트 핸들러 등록 - * 2. fds_init()로 FDS 초기화 시작 - * 3. wait_for_fds_ready()로 초기화 완료 대기 (최대 3초) - * 4. fds_stat()로 플래시 상태 확인 - */ -void fs_storage_init(void) -{ - ret_code_t rc; - - /* Register first to receive an event when initialization is complete. */ - rc = fds_register(fds_evt_handler); - APP_ERROR_CHECK(rc); - - rc = fds_init(); - APP_ERROR_CHECK(rc); - - /* Wait for fds to initialize. */ - wait_for_fds_ready(); - - fds_stat_t stat = { 0 }; - rc = fds_stat(&stat); - APP_ERROR_CHECK(rc); - - DBG_PRINTF("[FDS] OK\r\n"); -} +/******************************************************************************* + TEST medi50 Dec 23 + ******************************************************************************/ + +/** + * @file fstorage.c + * @brief FDS(Flash Data Storage) 기반 설정 저장 모듈 + * + * 외부 EEPROM을 대체하여 nRF52840 내장 플래시에 장치 설정을 저장/로드한다. + * + * [레코드 관리] + * - CONFIG_FILE = 0x8010, CONFIG_REC_KEY = 0x7010 으로 단일 레코드를 관리한다. + * + * [config_data_t 구조체 필드] + * - magic(4B) : 포맷 확인용 매직 넘버 (0x20231226 -> 0x20260318(기본값 재생성을 위해 매직넘버 변경)) + * - hw_no(12B) : 하드웨어 버전 (기본값: "") + * - serial_no(12B) : 시리얼 번호 (기본값: "VB026030000") + * - passkey(6B) : BLE 페어링용 정적 패스키(기본값: "123456") + * - bond_data_delete(1B) : 본딩 데이터 삭제 플래그(기본값: 1) + * - reset_status(1B) : 리셋 상태 값(기본값: 99) + * - life_cycle(4B) : 장치 사용 횟수(기본값: 0) + * - piezo_freq_option : Piezo 송신 펄스 주파수(기본값: 1=2.1MHz) + * - piezo_cycles : Piezo 송신 펄스 사이클 수 (기본값: 7) + * - piezo_averaging : Piezo 채널당 반복 측정 횟수 (기본값: 5) + * - piezo_delay_us : Piezo 송신 펄스 출력 후 ADC 시작 시까지 대기시간(us) (기본값: 10) + * - piezo_num_samples : Piezo 측정 ADC 샘플 개수 (기본값: 100) + * + * [매직 넘버 검증] + * - 플래시에서 로드한 데이터의 magic 값이 0x20231226과 일치하는지 확인하여 + * 유효한 설정인지 판별한다. 불일치 시 기본값으로 초기화한다. + * + * [FDS 이벤트 후처리] + * - FDS 쓰기/업데이트 완료 이벤트 수신 후, 대기 중인 후처리를 수행한다: + * 전원 OFF (go_device_power_off), 슬립 진입 (go_sleep_mode_enter), + * 시스템 리셋 (go_NVIC_SystemReset) + */ + +#include "sdk_config.h" + +#include + +#include "app_error.h" +#include "boards.h" +#include "nrf_fstorage.h" +#include "nrf_soc.h" +#include "nrf_strerror.h" +#include "sdk_config.h" +#include "nrf_fstorage_sd.h" +#include "nrf_delay.h" +#include "ble_gap.h" +#include "fds.h" + +#include "nrf_log.h" +#include "nrf_log_ctrl.h" +#include "nrf_log_default_backends.h" + +#include "fstorage.h" +#include "nrf_pwr_mgmt.h" +#include "main.h" +#include "debug_print.h" + + +/* FDS 레코드 식별자: 파일 ID와 레코드 키로 단일 설정 레코드를 관리 */ + +#define CONFIG_FILE (0x8010) +#define CONFIG_REC_KEY (0x7010) + +/* 매직 넘버: 플래시에 저장된 데이터가 유효한 설정인지 판별하는 데 사용 */ +#define CONFIG_MAGIC_NUMBER_VALUE (0x20260319) + +/* 전역 설정 데이터 구조체 인스턴스 */ +config_data_t m_config; + +/* FDS 쓰기 완료 후 수행할 후처리 플래그 (main.c에서 선언) */ +extern bool go_device_power_off; /* 전원 OFF 요청 */ +extern bool go_sleep_mode_enter; /* 슬립 모드 진입 요청 */ +extern bool go_NVIC_SystemReset; /* 시스템 리셋 요청 */ + +/* FDS 초기화 완료 여부 플래그 (fds_evt_handler에서 true로 설정) */ +static bool volatile m_fds_initialized; + +/* FDS 쓰기 진행 중 플래그: true이면 쓰기 완료 대기 중 */ +bool fds_flag_write = false; + +/* FDS에 기록할 레코드 템플릿 (m_config 데이터를 가리킴) */ +static fds_record_t const m_dummy_record = +{ + .file_id = CONFIG_FILE, + .key = CONFIG_REC_KEY, + .data.p_data = (void const *)&m_config, + /* The length of a record is always expressed in 4-byte units (words). */ + .data.length_words = (sizeof(m_config) + 3) / sizeof(uint32_t), +}; + + +/* 기본 설정값 상수 */ +int8_t reset_status_dflt = 99; /* 리셋 상태 기본값 */ +uint8_t static_passkey_dflt[6] = DEFAULT_PASSKEY; /* BLE 패스키 기본값 */ + +/** + * @brief 기본 설정값 초기화 + * + * m_config 구조체의 각 필드를 공장 초기값으로 설정한다. + * 플래시에 유효한 설정이 없거나 매직 넘버가 불일치할 때 호출된다.VB0HW0000 + */ +void fds_default_value_set(void) +{ + /* HW Number - default from HARDWARE_VERSION */ + memset(m_config.hw_no, 0, 12); + memcpy(m_config.hw_no, HARDWARE_VERSION, strlen(HARDWARE_VERSION)); + + /* Serial Number - default from SERIAL_NUMBER */ + memset(m_config.serial_no, 0, 12); + memcpy(m_config.serial_no, SERIAL_NUMBER, strlen(SERIAL_NUMBER)); + + /* Static Passkey */ + memcpy(m_config.static_passkey, static_passkey_dflt, 6); + + /* Bond data delete */ + m_config.bond_data_delete = 1; + + /* Reset status */ + m_config.reset_status = reset_status_dflt; + + /* Device usage count */ + m_config.life_cycle = 0; + + /* 피에조 측정 파라미터 기본값 */ + m_config.piezo_freq_option = 1; /* 2.1MHz */ + m_config.piezo_delay_us = 10; /* 버스트 후 10us */ + m_config.piezo_num_samples = 100; /* 100샘플 */ + m_config.piezo_cycles = 7; /* 7사이클 */ + m_config.piezo_averaging = 3; /* 3회 평균화 */ +} + + +/* 마지막 FDS 이벤트 ID 저장 (디버깅용) */ +static volatile uint8_t fds_last_evt = 0xFF; + +/** + * @brief FDS 이벤트 콜백 핸들러 + * + * FDS 내부에서 비동기 작업이 완료될 때 호출된다. + * - FDS_EVT_INIT : FDS 초기화 완료 → m_fds_initialized 플래그 설정 + * - FDS_EVT_WRITE : 새 레코드 쓰기 완료 → fds_flag_write 해제 + * - FDS_EVT_UPDATE : 레코드 업데이트 완료 → fds_flag_write 해제 후 + * 대기 중인 전원 OFF / 슬립 진입 / 시스템 리셋 수행 + * - FDS_EVT_DEL_RECORD / FDS_EVT_DEL_FILE / FDS_EVT_GC : 현재 미사용 + */ +static void fds_evt_handler( fds_evt_t const *p_evt ) +{ + fds_last_evt = p_evt->id; + + switch( p_evt->id ) + { + case FDS_EVT_INIT: + if( p_evt->result == NRF_SUCCESS ) + { + m_fds_initialized = true; + } + break; + + case FDS_EVT_WRITE: + { + fds_flag_write = false; + } + break; + + case FDS_EVT_UPDATE: + { + fds_flag_write = false; + + if(go_device_power_off == true) { + /* After flash writing completed, System Power Off */ + device_power_off(); + } + if(go_sleep_mode_enter == true) { + /* After flash writing completed, System go to Sleep Mode */ + sleep_mode_enter(); + } + if(go_NVIC_SystemReset == true) { + /* After flash writing completed, System Reset */ + DBG_PRINTF("Off FDS_EVENT\r\n"); + NVIC_SystemReset(); + } + } + break; + + case FDS_EVT_DEL_RECORD: + break; + + case FDS_EVT_DEL_FILE: + break; + + case FDS_EVT_GC: + break; + + default: + break; + } +} + + +/** + * @brief FDS 초기화 완료 대기 + * + * m_fds_initialized 플래그가 true가 될 때까지 대기한다. + * 최대 3초(3000ms) 타임아웃이 설정되어 있으며, + * 타임아웃 시 에러 로그를 출력하고 반환한다. + */ +static void wait_for_fds_ready( void ) +{ + uint32_t timeout = 0; + while( !m_fds_initialized ) + { + nrf_pwr_mgmt_run(); + nrf_delay_ms(1); + timeout++; + if (timeout > 3000) /* 3 second timeout */ + { + DBG_PRINTF("[FDS] TIMEOUT!\r\n"); + break; + } + } +} + + +/** + * @brief FDS에서 설정 로드 + * + * 플래시에서 CONFIG_FILE/CONFIG_REC_KEY 레코드를 검색하여 m_config에 로드한다. + * + * 동작 흐름: + * 1. fds_record_find()로 레코드 검색 (실패 시 최대 10회 재시도, 100ms 간격) + * 2. 레코드 발견 시: + * - fds_record_open()으로 열기 (CRC 에러 시 삭제 후 기본값으로 재생성) + * - 데이터를 m_config로 복사 + * - 매직 넘버 불일치 시 기존 레코드 삭제 → 기본값 설정 → 재기록 + * 3. 레코드 미발견 시: + * - 기본값으로 새 레코드 생성 후 다시 로드 + */ +void config_load( void ) +{ + ret_code_t rc; + fds_record_desc_t desc = { 0 }; + fds_find_token_t tok = { 0 }; + uint8_t cfg_retry = 0; + uint32_t fds_wait_cnt = 0; // FDS write 대기 카운터 + + cfg_load_start: + memset((char *)&desc, 0, sizeof(desc)); + memset((char *)&tok, 0, sizeof(tok)); + rc = fds_record_find(CONFIG_FILE, CONFIG_REC_KEY, &desc, &tok); + DBG_PRINTF("[FDS] find rc=%u\r\n", rc); + + /* FDS may not be fully ready yet - retry before writing defaults */ + if (rc != NRF_SUCCESS && cfg_retry < 10) + { + cfg_retry++; + DBG_PRINTF("[FDS] retry %u/10\r\n", cfg_retry); + nrf_delay_ms(100); + goto cfg_load_start; + } + + if( rc == NRF_SUCCESS ) + { + /* A config file is in flash. Let's update it. */ + fds_flash_record_t config = { 0 }; + + /* Open the record and read its contents. */ + rc = fds_record_open(&desc, &config); + if (rc != NRF_SUCCESS) + { + /* CRC error or corrupt record - delete and use defaults */ + DBG_PRINTF("[FDS] open ERR=%u, deleting\r\n", rc); + (void)fds_record_delete(&desc); + fds_gc(); + fds_default_value_set(); + goto cfg_load_write_new; + } + + /* Copy the configuration from flash into m_config. */ + memcpy(&m_config, config.p_data, sizeof(config_data_t)); + + /* Close the record when done reading. */ + rc = fds_record_close(&desc); + APP_ERROR_CHECK(rc); + + DBG_PRINTF("[FDS] magic=0x%08X (expect 0x%08X)\r\n", m_config.magic_number, CONFIG_MAGIC_NUMBER_VALUE); + + if( m_config.magic_number != (uint32_t)CONFIG_MAGIC_NUMBER_VALUE ) + { // first init + DBG_PRINTF("[FDS] FORMAT! overwriting with defaults\r\n"); + rc = fds_record_delete(&desc); + APP_ERROR_CHECK(rc); + m_config.magic_number = CONFIG_MAGIC_NUMBER_VALUE; + + // default.... + fds_default_value_set(); + + /* Write the updated record to flash. */ + rc = fds_record_update(&desc, &m_dummy_record); + if( (rc != NRF_SUCCESS) && (rc == FDS_ERR_NO_SPACE_IN_FLASH) ) + { + rc = fds_gc(); + APP_ERROR_CHECK(rc); + } + else + { + APP_ERROR_CHECK(rc); + } + goto cfg_load_start; + } + DBG_PRINTF("[FDS] Loaded OK\r\n"); + } + else + { + cfg_load_write_new: + DBG_PRINTF("[FDS] New - writing defaults\r\n"); + /* System config not found (or corrupt); write a new one. */ + m_config.magic_number = CONFIG_MAGIC_NUMBER_VALUE; + + // default.... + fds_default_value_set(); + + fds_flag_write = true; + rc = fds_record_write(&desc, &m_dummy_record); + + if (rc != NRF_SUCCESS) + { + DBG_PRINTF("[FDS] Write ERR=%u\r\n", rc); + fds_flag_write = false; + } + + fds_wait_cnt = 0; // + + while(fds_flag_write && fds_wait_cnt < 3000) // FDS write 최대 3초 타임아웃 + { + nrf_pwr_mgmt_run(); + nrf_delay_ms(1); + fds_wait_cnt++; + } + + if(fds_flag_write) // FDS write 타임아웃 시 플래그 강제 해제 + { + DBG_PRINTF("[FDS] write TIMEOUT! forcing flag clear\r\n"); + fds_flag_write = false; + } + + if( (rc != NRF_SUCCESS) && (rc == FDS_ERR_NO_SPACE_IN_FLASH) ) + { + rc = fds_gc(); + APP_ERROR_CHECK(rc); + } + else + { + APP_ERROR_CHECK(rc); + } + + NRF_LOG_FLUSH(); + goto cfg_load_start; + } +} + + +/** + * @brief 현재 설정을 FDS에 저장 + * + * m_config의 내용을 플래시에 기록한다. + * + * 동작 흐름: + * 1. 이전 FDS 쓰기 작업이 진행 중이면 최대 3초 대기 + * 2. 매직 넘버가 올바르지 않으면 보정 + * 3. 기존 레코드가 있으면 fds_record_update()로 갱신 + * - 플래시 공간 부족 시 GC(가비지 컬렉션) 수행 후 재시도 + * 4. 기존 레코드가 없으면 fds_record_write()로 새로 생성 + * + * 참고: 쓰기 완료는 fds_evt_handler()에서 비동기로 처리되며, + * 완료 후 전원 OFF/슬립/리셋 등의 후처리가 수행될 수 있다. + */ +void config_save( void ) +{ + ret_code_t rc; + fds_record_desc_t desc = { 0 }; + fds_find_token_t tok = { 0 }; + + DBG_PRINTF("[CFG_SAVE] start\r\n"); + + /* Wait for any previous FDS operation to complete */ + if (fds_flag_write) + { + uint32_t wait_cnt = 0; + + DBG_PRINTF("[CFG_SAVE] waiting for prev FDS op...\r\n"); + while (fds_flag_write && wait_cnt < 3000) + { + nrf_pwr_mgmt_run(); + nrf_delay_ms(1); + wait_cnt++; + } + if (fds_flag_write) + { + DBG_PRINTF("[CFG_SAVE] TIMEOUT! forcing flag clear\r\n"); + fds_flag_write = false; + } + } + + if( m_config.magic_number != (uint32_t)CONFIG_MAGIC_NUMBER_VALUE ) + { + m_config.magic_number = CONFIG_MAGIC_NUMBER_VALUE; + } + + memset((char *)&desc, 0, sizeof(desc)); + memset((char *)&tok, 0, sizeof(tok)); + rc = fds_record_find(CONFIG_FILE, CONFIG_REC_KEY, &desc, &tok); + DBG_PRINTF("[CFG_SAVE] find rc=%u\r\n", rc); + + if( rc == NRF_SUCCESS ) + { + fds_flag_write = true; + rc = fds_record_update(&desc, &m_dummy_record); + DBG_PRINTF("[CFG_SAVE] update rc=%u\r\n", rc); + + if( rc == FDS_ERR_NO_SPACE_IN_FLASH ) + { + fds_flag_write = false; + rc = fds_gc(); + DBG_PRINTF("[CFG_SAVE] gc rc=%u, retry\r\n", rc); + fds_flag_write = true; + rc = fds_record_update(&desc, &m_dummy_record); + DBG_PRINTF("[CFG_SAVE] retry rc=%u\r\n", rc); + } + + if( rc != NRF_SUCCESS ) + { + DBG_PRINTF("[CFG_SAVE] FAIL rc=%u\r\n", rc); + fds_flag_write = false; + } + } + else + { + DBG_PRINTF("[CFG_SAVE] not found, writing new\r\n"); + fds_flag_write = true; + rc = fds_record_write(&desc, &m_dummy_record); + DBG_PRINTF("[CFG_SAVE] write rc=%u\r\n", rc); + + if( rc != NRF_SUCCESS ) + { + DBG_PRINTF("[CFG_SAVE] FAIL rc=%u\r\n", rc); + fds_flag_write = false; + } + } + + DBG_PRINTF("[CFG_SAVE] done\r\n"); +} + + +/** + * @brief config_load()의 래퍼 함수 + * + * 외부 모듈에서 설정 로드를 요청할 때 사용한다. + */ +void fs_set_value(void) +{ + config_load(); +} + +/** + * @brief FDS 초기화 + * + * 부팅 시 호출되어 FDS 모듈을 초기화한다. + * 1. fds_register()로 이벤트 핸들러 등록 + * 2. fds_init()로 FDS 초기화 시작 + * 3. wait_for_fds_ready()로 초기화 완료 대기 (최대 3초) + * 4. fds_stat()로 플래시 상태 확인 + */ +void fs_storage_init(void) +{ + ret_code_t rc; + + /* Register first to receive an event when initialization is complete. */ + rc = fds_register(fds_evt_handler); + APP_ERROR_CHECK(rc); + + rc = fds_init(); + APP_ERROR_CHECK(rc); + + /* Wait for fds to initialize. */ + wait_for_fds_ready(); + + fds_stat_t stat = { 0 }; + rc = fds_stat(&stat); + APP_ERROR_CHECK(rc); + + DBG_PRINTF("[FDS] OK\r\n"); +} diff --git a/project/ble_peripheral/ble_app_bladder_patch/fstorage.h b/project/ble_peripheral/ble_app_bladder_patch/hal/fds/fstorage.h similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/fstorage.h rename to project/ble_peripheral/ble_app_bladder_patch/hal/fds/fstorage.h index 66a1512..fa44ac3 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/fstorage.h +++ b/project/ble_peripheral/ble_app_bladder_patch/hal/fds/fstorage.h @@ -1,87 +1,87 @@ -/******************************************************************************* - * @file fstorage.h - * @author CandyPops Co. - * @version V1.0.0 - * @date 2022-09-05 - * @brief FDS(Flash Data Storage) 기반 설정 저장 모듈 인터페이스 - ******************************************************************************* - * - * [헤더 개요] - * nRF52840 내장 플래시에 디바이스 설정을 저장/로드하는 FDS 모듈의 공용 API. - * 외부 EEPROM을 대체하며, SoftDevice와 공존하여 플래시를 안전하게 관리한다. - * - * [config_data_t 구조체] (45바이트, 패킹됨) - * magic_number(4B): 포맷 확인용 (0x20231226) - * hw_no(12B): 하드웨어 번호 - * serial_no(12B): 시리얼 번호 (BLE 디바이스 이름으로도 사용) - * static_passkey(6B): BLE 페어링 패스키 (숫자 6자리) - * bond_data_delete(1B): 본딩 삭제 플래그 - * reset_status(1B): 리셋 상태 코드 - * pd_adc_cnt(1B): ADC 샘플링 횟수 - * pd_delay_us(2B): PD 안정화 딜레이 (마이크로초) - * life_cycle(4B): 디바이스 사용 횟수 - * - * [주요 API] - * fs_storage_init(): FDS 초기화 (부트 시 1회) - * config_load(): FDS에서 설정 로드 (없으면 기본값 생성) - * config_save(): 현재 설정을 FDS에 저장 - * - ******************************************************************************/ - -#ifndef IHP_FSTORAGE_H_ -#define IHP_FSTORAGE_H_ - -#include "sdk_config.h" - -#include "nordic_common.h" -#include - -/* ------------------------------------------------------------------------- -* 기본 버전 정보 (FDS 기본값 및 빈 필드 복구 시 사용) -* -* 하드웨어 식별 코드 -* - VBTHW0100 = 개발(시험)용 Ver 1.00 -* - VB0HW0100 = 양산용 Ver 1.00 -* -* Firmware 식별 코드 -* - VBTFW0100 = 개발(시험)용 Ver 1.00 -* - VB0FW0100 = 양산용 Ver 1.00 -* -* 시리얼 넘버 식별 코드 -* - VBT26030001 = 개발(시험)용 26년 3월 생산 1번 -* - VB026030001 = 양산용 26년 3월 생산 1번 -------------------------------------------------------------------------- */ -#define HARDWARE_VERSION "VBTHW0100" -#define SERIAL_NUMBER "VBT26030001" -#define DEFAULT_PASSKEY "123456" - -#pragma pack(1) -typedef struct -{ - uint32_t magic_number; /* 4B - 포맷 확인용 매직 넘버 */ - char hw_no[12]; /* 12B - HW Version */ - char serial_no[12]; /* 12B - Serial Number */ - uint8_t static_passkey[6]; /* 6B - BLE Passkey */ - uint8_t bond_data_delete; /* 1B - Bond delete flag */ - int8_t reset_status; /* 1B - Reset status */ - uint32_t life_cycle; /* 4B - Device usage count */ - - /* Piezo 측정 파라미터 - 8B */ - uint8_t piezo_freq_option; /* 1B - Frequency : 송신 펄스 주파수 (0=1.8M, 1=2.1M, 2=2.0M, 3=1.7M) */ - uint8_t piezo_cycles; /* 1B - Burst Cycle : 송신 펄스 사이클 수 (3~7) */ - uint16_t piezo_averaging; /* 2B - 평균화 수 : 채널당 반복 측정 횟수 (1~10) */ - uint16_t piezo_delay_us; /* 2B - 대기 시간(Delay) : 송신 펄스 출력 후 ADC 시작 시까지 대기시간 (us) (0~30) */ - uint16_t piezo_num_samples; /* 2B - 측정 ADC 샘플 개수 (80~140) */ -} config_data_t; /* Total: 48 bytes - FDS에 저장하는 디바이스 설정 */ - -extern config_data_t m_config; - -void fds_default_value_set(void); -void config_load( void ); -void config_save( void ); - -void fs_set_value(void); -void fs_storage_init(void); - -#endif /* IHP_FSTORAGE_H_ */ - +/******************************************************************************* + * @file fstorage.h + * @author CandyPops Co. + * @version V1.0.0 + * @date 2022-09-05 + * @brief FDS(Flash Data Storage) 기반 설정 저장 모듈 인터페이스 + ******************************************************************************* + * + * [헤더 개요] + * nRF52840 내장 플래시에 디바이스 설정을 저장/로드하는 FDS 모듈의 공용 API. + * 외부 EEPROM을 대체하며, SoftDevice와 공존하여 플래시를 안전하게 관리한다. + * + * [config_data_t 구조체] (45바이트, 패킹됨) + * magic_number(4B): 포맷 확인용 (0x20231226) + * hw_no(12B): 하드웨어 번호 + * serial_no(12B): 시리얼 번호 (BLE 디바이스 이름으로도 사용) + * static_passkey(6B): BLE 페어링 패스키 (숫자 6자리) + * bond_data_delete(1B): 본딩 삭제 플래그 + * reset_status(1B): 리셋 상태 코드 + * pd_adc_cnt(1B): ADC 샘플링 횟수 + * pd_delay_us(2B): PD 안정화 딜레이 (마이크로초) + * life_cycle(4B): 디바이스 사용 횟수 + * + * [주요 API] + * fs_storage_init(): FDS 초기화 (부트 시 1회) + * config_load(): FDS에서 설정 로드 (없으면 기본값 생성) + * config_save(): 현재 설정을 FDS에 저장 + * + ******************************************************************************/ + +#ifndef IHP_FSTORAGE_H_ +#define IHP_FSTORAGE_H_ + +#include "sdk_config.h" + +#include "nordic_common.h" +#include + +/* ------------------------------------------------------------------------- +* 기본 버전 정보 (FDS 기본값 및 빈 필드 복구 시 사용) +* +* 하드웨어 식별 코드 +* - VBTHW0100 = 개발(시험)용 Ver 1.00 +* - VB0HW0100 = 양산용 Ver 1.00 +* +* Firmware 식별 코드 +* - VBTFW0100 = 개발(시험)용 Ver 1.00 +* - VB0FW0100 = 양산용 Ver 1.00 +* +* 시리얼 넘버 식별 코드 +* - VBT26030001 = 개발(시험)용 26년 3월 생산 1번 +* - VB026030001 = 양산용 26년 3월 생산 1번 +------------------------------------------------------------------------- */ +#define HARDWARE_VERSION "VBTHW0100" +#define SERIAL_NUMBER "VBT26030001" +#define DEFAULT_PASSKEY "123456" + +#pragma pack(1) +typedef struct +{ + uint32_t magic_number; /* 4B - 포맷 확인용 매직 넘버 */ + char hw_no[12]; /* 12B - HW Version */ + char serial_no[12]; /* 12B - Serial Number */ + uint8_t static_passkey[6]; /* 6B - BLE Passkey */ + uint8_t bond_data_delete; /* 1B - Bond delete flag */ + int8_t reset_status; /* 1B - Reset status */ + uint32_t life_cycle; /* 4B - Device usage count */ + + /* Piezo 측정 파라미터 - 8B */ + uint8_t piezo_freq_option; /* 1B - Frequency : 송신 펄스 주파수 (0=1.8M, 1=2.1M, 2=2.0M, 3=1.7M) */ + uint8_t piezo_cycles; /* 1B - Burst Cycle : 송신 펄스 사이클 수 (3~7) */ + uint16_t piezo_averaging; /* 2B - 평균화 수 : 채널당 반복 측정 횟수 (1~10) */ + uint16_t piezo_delay_us; /* 2B - 대기 시간(Delay) : 송신 펄스 출력 후 ADC 시작 시까지 대기시간 (us) (0~30) */ + uint16_t piezo_num_samples; /* 2B - 측정 ADC 샘플 개수 (80~140) */ +} config_data_t; /* Total: 48 bytes - FDS에 저장하는 디바이스 설정 */ + +extern config_data_t m_config; + +void fds_default_value_set(void); +void config_load( void ); +void config_save( void ); + +void fs_set_value(void); +void fs_storage_init(void); + +#endif /* IHP_FSTORAGE_H_ */ + diff --git a/project/ble_peripheral/ble_app_bladder_patch/i2c_manager.c b/project/ble_peripheral/ble_app_bladder_patch/hal/i2c/i2c_manager.c similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/i2c_manager.c rename to project/ble_peripheral/ble_app_bladder_patch/hal/i2c/i2c_manager.c index e82794d..a1aa349 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/i2c_manager.c +++ b/project/ble_peripheral/ble_app_bladder_patch/hal/i2c/i2c_manager.c @@ -1,170 +1,170 @@ -/******************************************************************************* - * @file i2c_manager.c - * @brief Reliable HW↔SW I2C Switching Logic (with Mode Set Logging) - ******************************************************************************* - * - * [모듈 개요] - * I2C 버스의 HW(하드웨어 TWI) / SW(소프트웨어 비트뱅) 모드 전환을 관리하는 모듈. - * - * - HW I2C: nRF52840 내장 TWI 하드웨어 주변장치를 사용 (ICM42670P IMU 센서 통신용, 400kHz) - * - SW I2C: GPIO 비트뱅 방식의 소프트웨어 I2C (현재 사용하지 않는 레거시 코드) - * - * [핀 설정] - * SCL = P1.14 (ICM42670_I2C_SCL_PIN) - * SDA = P1.15 (ICM42670_I2C_SDA_PIN) - * - * [주요 함수] - * hw_i2c_init_once() : SW→HW 전환 또는 HW 초기화 (이미 HW 모드면 중복 초기화 방지) - * sw_i2c_init_once() : HW→SW 전환 (TWI 해제 후 SW 모드 진입, 레거시) - * i2c_reset_state() : 모든 I2C 모드 플래그를 초기화 (HW/SW 모두 false) - * - * [동작 원리] - * HW_I2C_FRQ, SW_I2C_FRQ 두 개의 bool 플래그로 현재 모드를 추적하며, - * 한 번에 하나의 모드만 활성화되도록 상호 배제(mutex) 방식으로 관리한다. - * 모드 전환 시 기존 모드의 리소스를 먼저 해제한 후 새 모드를 초기화한다. - * - ******************************************************************************/ - -#include "i2c_manager.h" -#include "debug_print.h" -#include "nrf_delay.h" - -#include "nrf_drv_twi.h" -#include "nrfx_twi.h" -#include "boards.h" -#include "system_interface.h" - -/* 현재 I2C 모드 상태 플래그 (true = 해당 모드 활성화) */ -bool HW_I2C_FRQ = true; /* HW TWI 모드 활성 여부 (기본값: true, 초기 상태는 HW) */ -bool SW_I2C_FRQ = false; /* SW 비트뱅 모드 활성 여부 */ - -/* TWI 인스턴스 번호 (nRF52840은 TWI0, TWI1 두 개 지원) */ -#define TWI_INSTANCE 0 - -/* TWI (I2C) 하드웨어 인스턴스 : IMU 드라이버에서 사용 - jhChun 26.03.16 */ -const nrfx_twi_t m_twi = NRFX_TWI_INSTANCE(TWI_INSTANCE); - -/* TWI (I2C) 해제 - jhChun 26.03.16 */ -/* TWI 하드웨어를 비활성화하고 초기화 해제하여 GPIO 핀을 반환한다 */ -static void twi_uninitialize(void){ - nrfx_twi_disable(&m_twi); /* TWI 주변장치 비활성화 */ - nrfx_twi_uninit(&m_twi); /* TWI 초기화 해제 (핀 리소스 반환) */ -} - -/* TWI (I2C) 하드웨어 초기화 (SCL/SDA핀, 400kHz) - jhChun 26.03.16 */ -/* SCL, SDA 핀을 설정하고 400kHz Fast Mode로 TWI를 초기화 및 활성화한다 */ -static void twi_initialize(void){ - ret_code_t err_code; - - /* TWI 설정 구조체: 핀 번호, 클럭 속도, 인터럽트 우선순위 지정 */ - const nrfx_twi_config_t twi_config = { - .scl = ICM42670_I2C_SCL_PIN, /* SCL 핀 (P1.14) */ - .sda = ICM42670_I2C_SDA_PIN, /* SDA 핀 (P1.15) */ - .frequency = NRF_TWI_FREQ_400K, /* 400kHz Fast Mode */ - .interrupt_priority = APP_IRQ_PRIORITY_HIGH, /* 높은 인터럽트 우선순위 */ - }; - - /* TWI 초기화 (이벤트 핸들러 NULL = 블로킹 모드) */ - err_code = nrfx_twi_init(&m_twi, &twi_config, NULL, NULL); - APP_ERROR_CHECK(err_code); - - nrfx_twi_enable(&m_twi); /* TWI 주변장치 활성화 → I2C 통신 가능 */ -} - -/* -------------------------------------------------------------------------- */ -/* HW (TWI) 초기화 */ -/* -------------------------------------------------------------------------- */ -/* - * HW I2C 모드로 전환하거나 초기화하는 함수. - * - SW 모드가 활성화되어 있으면 SW 플래그를 해제하고 HW로 전환 - * - 이미 HW 모드이면 중복 초기화를 방지하여 바로 리턴 - * - 최초 HW 초기화 시 twi_initialize()를 호출하여 TWI 하드웨어 설정 - */ -void hw_i2c_init_once(void) -{ - // SW 모드일 경우 강제 해제 후 HW 전환 - if (SW_I2C_FRQ) - { - //DBG_PRINTF("[I2C]SW→HW\r\n"); - - // SW 리소스 해제 (필요 시 추가) - SW_I2C_FRQ = false; - nrf_delay_ms(2); /* 모드 전환 안정화 대기 (2ms) */ - } - - /* 이미 HW 모드가 활성화되어 있으면 중복 초기화 방지를 위해 즉시 리턴 */ - // 이미 HW면 스킵 - if (HW_I2C_FRQ) - { - // DBG_PRINTF("[I2C] HW I2C set\r\n"); - return; - } - - /* HW TWI 하드웨어 초기화 수행 (SCL/SDA 핀 설정, 400kHz, 활성화) */ - // 실제 HW 초기화 - twi_initialize(); - nrf_delay_ms(2); /* 초기화 후 안정화 대기 (2ms) */ - - /* 모드 플래그 갱신: HW 활성, SW 비활성 */ - HW_I2C_FRQ = true; - SW_I2C_FRQ = false; - - // DBG_PRINTF("[I2C] HW I2C Mode set!\r\n"); -} - -/* -------------------------------------------------------------------------- */ -/* SW (Port Bang-Bang) 초기화 */ -/* -------------------------------------------------------------------------- */ -/* - * SW I2C(비트뱅) 모드로 전환하는 함수. (현재 레거시, 사용하지 않음) - * - HW 모드가 활성화되어 있으면 TWI를 해제하고 SW로 전환 - * - 이미 SW 모드이면 중복 초기화를 방지하여 바로 리턴 - * - power_control.c의 power_loop()에서 Step 0에서 호출됨 - */ -void sw_i2c_init_once(void) -{ - // HW 모드일 경우 강제 해제 후 SW 전환 - if (HW_I2C_FRQ) - { - //DBG_PRINTF("[I2C]HW→SW\r\n"); - - nrfx_twi_disable(&m_twi); /* TWI 비활성화 */ - nrfx_twi_uninit(&m_twi); /* TWI 초기화 해제 */ - nrf_delay_ms(2); /* 모드 전환 안정화 대기 (2ms) */ - - HW_I2C_FRQ = false; - } - - // 이미 SW 모드면 재실행 금지 - if (SW_I2C_FRQ) - { - // DBG_PRINTF("[I2C] SWI2C already initialized\r\n"); - return; - } - - /* TWI 라인 완전 해제 후 SW 비트뱅 모드 진입 */ - // 실제 SW 초기화 - twi_uninitialize(); // TWI 라인 해제 - nrf_delay_ms(1); /* 해제 후 안정화 대기 (1ms) */ - - /* 모드 플래그 갱신: SW 활성, HW 비활성 */ - SW_I2C_FRQ = true; - HW_I2C_FRQ = false; - - // DBG_PRINTF("[I2C] SW I2C Mode set!\r\n"); -} - -/* -------------------------------------------------------------------------- */ -/* 전체 리셋 */ -/* -------------------------------------------------------------------------- */ -/* - * 모든 I2C 모드 플래그를 초기화하는 함수. - * HW/SW 모두 비활성 상태로 만들어, 다음 init 호출 시 강제로 재초기화되도록 한다. - * 주로 시스템 리셋이나 에러 복구 시 사용. - */ -void i2c_reset_state(void) -{ - HW_I2C_FRQ = false; /* HW 모드 플래그 초기화 */ - SW_I2C_FRQ = false; /* SW 모드 플래그 초기화 */ - DBG_PRINTF("Flags reset\r\n"); -} +/******************************************************************************* + * @file i2c_manager.c + * @brief Reliable HW↔SW I2C Switching Logic (with Mode Set Logging) + ******************************************************************************* + * + * [모듈 개요] + * I2C 버스의 HW(하드웨어 TWI) / SW(소프트웨어 비트뱅) 모드 전환을 관리하는 모듈. + * + * - HW I2C: nRF52840 내장 TWI 하드웨어 주변장치를 사용 (ICM42670P IMU 센서 통신용, 400kHz) + * - SW I2C: GPIO 비트뱅 방식의 소프트웨어 I2C (현재 사용하지 않는 레거시 코드) + * + * [핀 설정] + * SCL = P1.14 (ICM42670_I2C_SCL_PIN) + * SDA = P1.15 (ICM42670_I2C_SDA_PIN) + * + * [주요 함수] + * hw_i2c_init_once() : SW→HW 전환 또는 HW 초기화 (이미 HW 모드면 중복 초기화 방지) + * sw_i2c_init_once() : HW→SW 전환 (TWI 해제 후 SW 모드 진입, 레거시) + * i2c_reset_state() : 모든 I2C 모드 플래그를 초기화 (HW/SW 모두 false) + * + * [동작 원리] + * HW_I2C_FRQ, SW_I2C_FRQ 두 개의 bool 플래그로 현재 모드를 추적하며, + * 한 번에 하나의 모드만 활성화되도록 상호 배제(mutex) 방식으로 관리한다. + * 모드 전환 시 기존 모드의 리소스를 먼저 해제한 후 새 모드를 초기화한다. + * + ******************************************************************************/ + +#include "i2c_manager.h" +#include "debug_print.h" +#include "nrf_delay.h" + +#include "nrf_drv_twi.h" +#include "nrfx_twi.h" +#include "boards.h" +#include "system_interface.h" + +/* 현재 I2C 모드 상태 플래그 (true = 해당 모드 활성화) */ +bool HW_I2C_FRQ = true; /* HW TWI 모드 활성 여부 (기본값: true, 초기 상태는 HW) */ +bool SW_I2C_FRQ = false; /* SW 비트뱅 모드 활성 여부 */ + +/* TWI 인스턴스 번호 (nRF52840은 TWI0, TWI1 두 개 지원) */ +#define TWI_INSTANCE 0 + +/* TWI (I2C) 하드웨어 인스턴스 : IMU 드라이버에서 사용 - jhChun 26.03.16 */ +const nrfx_twi_t m_twi = NRFX_TWI_INSTANCE(TWI_INSTANCE); + +/* TWI (I2C) 해제 - jhChun 26.03.16 */ +/* TWI 하드웨어를 비활성화하고 초기화 해제하여 GPIO 핀을 반환한다 */ +static void twi_uninitialize(void){ + nrfx_twi_disable(&m_twi); /* TWI 주변장치 비활성화 */ + nrfx_twi_uninit(&m_twi); /* TWI 초기화 해제 (핀 리소스 반환) */ +} + +/* TWI (I2C) 하드웨어 초기화 (SCL/SDA핀, 400kHz) - jhChun 26.03.16 */ +/* SCL, SDA 핀을 설정하고 400kHz Fast Mode로 TWI를 초기화 및 활성화한다 */ +static void twi_initialize(void){ + ret_code_t err_code; + + /* TWI 설정 구조체: 핀 번호, 클럭 속도, 인터럽트 우선순위 지정 */ + const nrfx_twi_config_t twi_config = { + .scl = ICM42670_I2C_SCL_PIN, /* SCL 핀 (P1.14) */ + .sda = ICM42670_I2C_SDA_PIN, /* SDA 핀 (P1.15) */ + .frequency = NRF_TWI_FREQ_400K, /* 400kHz Fast Mode */ + .interrupt_priority = APP_IRQ_PRIORITY_HIGH, /* 높은 인터럽트 우선순위 */ + }; + + /* TWI 초기화 (이벤트 핸들러 NULL = 블로킹 모드) */ + err_code = nrfx_twi_init(&m_twi, &twi_config, NULL, NULL); + APP_ERROR_CHECK(err_code); + + nrfx_twi_enable(&m_twi); /* TWI 주변장치 활성화 → I2C 통신 가능 */ +} + +/* -------------------------------------------------------------------------- */ +/* HW (TWI) 초기화 */ +/* -------------------------------------------------------------------------- */ +/* + * HW I2C 모드로 전환하거나 초기화하는 함수. + * - SW 모드가 활성화되어 있으면 SW 플래그를 해제하고 HW로 전환 + * - 이미 HW 모드이면 중복 초기화를 방지하여 바로 리턴 + * - 최초 HW 초기화 시 twi_initialize()를 호출하여 TWI 하드웨어 설정 + */ +void hw_i2c_init_once(void) +{ + // SW 모드일 경우 강제 해제 후 HW 전환 + if (SW_I2C_FRQ) + { + //DBG_PRINTF("[I2C]SW→HW\r\n"); + + // SW 리소스 해제 (필요 시 추가) + SW_I2C_FRQ = false; + nrf_delay_ms(2); /* 모드 전환 안정화 대기 (2ms) */ + } + + /* 이미 HW 모드가 활성화되어 있으면 중복 초기화 방지를 위해 즉시 리턴 */ + // 이미 HW면 스킵 + if (HW_I2C_FRQ) + { + // DBG_PRINTF("[I2C] HW I2C set\r\n"); + return; + } + + /* HW TWI 하드웨어 초기화 수행 (SCL/SDA 핀 설정, 400kHz, 활성화) */ + // 실제 HW 초기화 + twi_initialize(); + nrf_delay_ms(2); /* 초기화 후 안정화 대기 (2ms) */ + + /* 모드 플래그 갱신: HW 활성, SW 비활성 */ + HW_I2C_FRQ = true; + SW_I2C_FRQ = false; + + // DBG_PRINTF("[I2C] HW I2C Mode set!\r\n"); +} + +/* -------------------------------------------------------------------------- */ +/* SW (Port Bang-Bang) 초기화 */ +/* -------------------------------------------------------------------------- */ +/* + * SW I2C(비트뱅) 모드로 전환하는 함수. (현재 레거시, 사용하지 않음) + * - HW 모드가 활성화되어 있으면 TWI를 해제하고 SW로 전환 + * - 이미 SW 모드이면 중복 초기화를 방지하여 바로 리턴 + * - power_control.c의 power_loop()에서 Step 0에서 호출됨 + */ +void sw_i2c_init_once(void) +{ + // HW 모드일 경우 강제 해제 후 SW 전환 + if (HW_I2C_FRQ) + { + //DBG_PRINTF("[I2C]HW→SW\r\n"); + + nrfx_twi_disable(&m_twi); /* TWI 비활성화 */ + nrfx_twi_uninit(&m_twi); /* TWI 초기화 해제 */ + nrf_delay_ms(2); /* 모드 전환 안정화 대기 (2ms) */ + + HW_I2C_FRQ = false; + } + + // 이미 SW 모드면 재실행 금지 + if (SW_I2C_FRQ) + { + // DBG_PRINTF("[I2C] SWI2C already initialized\r\n"); + return; + } + + /* TWI 라인 완전 해제 후 SW 비트뱅 모드 진입 */ + // 실제 SW 초기화 + twi_uninitialize(); // TWI 라인 해제 + nrf_delay_ms(1); /* 해제 후 안정화 대기 (1ms) */ + + /* 모드 플래그 갱신: SW 활성, HW 비활성 */ + SW_I2C_FRQ = true; + HW_I2C_FRQ = false; + + // DBG_PRINTF("[I2C] SW I2C Mode set!\r\n"); +} + +/* -------------------------------------------------------------------------- */ +/* 전체 리셋 */ +/* -------------------------------------------------------------------------- */ +/* + * 모든 I2C 모드 플래그를 초기화하는 함수. + * HW/SW 모두 비활성 상태로 만들어, 다음 init 호출 시 강제로 재초기화되도록 한다. + * 주로 시스템 리셋이나 에러 복구 시 사용. + */ +void i2c_reset_state(void) +{ + HW_I2C_FRQ = false; /* HW 모드 플래그 초기화 */ + SW_I2C_FRQ = false; /* SW 모드 플래그 초기화 */ + DBG_PRINTF("Flags reset\r\n"); +} diff --git a/project/ble_peripheral/ble_app_bladder_patch/i2c_manager.h b/project/ble_peripheral/ble_app_bladder_patch/hal/i2c/i2c_manager.h similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/i2c_manager.h rename to project/ble_peripheral/ble_app_bladder_patch/hal/i2c/i2c_manager.h index 5100725..b08af04 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/i2c_manager.h +++ b/project/ble_peripheral/ble_app_bladder_patch/hal/i2c/i2c_manager.h @@ -1,50 +1,50 @@ -/******************************************************************************* - * @file i2c_manager.h - * @brief Common header for HW/SW I2C mutex control - ******************************************************************************* - * - * [헤더 개요] - * I2C 버스 HW/SW 모드 전환 관리자의 공용 인터페이스 헤더. - * - * - HW_I2C_FRQ: HW TWI 모드 활성 여부 (true = HW I2C 사용 중) - * - SW_I2C_FRQ: SW 비트뱅 모드 활성 여부 (true = SW I2C 사용 중) - * - * 두 플래그는 상호 배제적으로 동작하며, 동시에 true가 되지 않도록 관리된다. - * - ******************************************************************************/ -#ifndef __I2C_MANAGER_H__ -#define __I2C_MANAGER_H__ - -#include -#include "app_error.h" - -/* I2C 모드 상태 플래그 (외부 참조용) */ -extern bool HW_I2C_FRQ; /* HW TWI 모드 활성 여부 */ -extern bool SW_I2C_FRQ; /* SW 비트뱅 모드 활성 여부 */ - -/** - * @brief HW I2C(TWI) 모드 초기화 (중복 초기화 방지) - * - * SW 모드가 활성화되어 있으면 해제 후 HW로 전환한다. - * 이미 HW 모드이면 아무 동작 없이 리턴한다. - * ICM42670P IMU 센서 통신 전에 호출하여 HW I2C를 준비한다. - */ -void hw_i2c_init_once(void); - -/** - * @brief SW I2C(비트뱅) 모드 초기화 (레거시, 현재 미사용) - * - * HW 모드가 활성화되어 있으면 TWI를 해제한 후 SW로 전환한다. - * 이미 SW 모드이면 아무 동작 없이 리턴한다. - */ -void sw_i2c_init_once(void); - -/** - * @brief I2C 모드 플래그 전체 초기화 - * - * HW_I2C_FRQ, SW_I2C_FRQ를 모두 false로 리셋한다. - * 다음 init 호출 시 강제로 재초기화가 수행된다. - */ -void i2c_reset_state(void); - -#endif +/******************************************************************************* + * @file i2c_manager.h + * @brief Common header for HW/SW I2C mutex control + ******************************************************************************* + * + * [헤더 개요] + * I2C 버스 HW/SW 모드 전환 관리자의 공용 인터페이스 헤더. + * + * - HW_I2C_FRQ: HW TWI 모드 활성 여부 (true = HW I2C 사용 중) + * - SW_I2C_FRQ: SW 비트뱅 모드 활성 여부 (true = SW I2C 사용 중) + * + * 두 플래그는 상호 배제적으로 동작하며, 동시에 true가 되지 않도록 관리된다. + * + ******************************************************************************/ +#ifndef __I2C_MANAGER_H__ +#define __I2C_MANAGER_H__ + +#include +#include "app_error.h" + +/* I2C 모드 상태 플래그 (외부 참조용) */ +extern bool HW_I2C_FRQ; /* HW TWI 모드 활성 여부 */ +extern bool SW_I2C_FRQ; /* SW 비트뱅 모드 활성 여부 */ + +/** + * @brief HW I2C(TWI) 모드 초기화 (중복 초기화 방지) + * + * SW 모드가 활성화되어 있으면 해제 후 HW로 전환한다. + * 이미 HW 모드이면 아무 동작 없이 리턴한다. + * ICM42670P IMU 센서 통신 전에 호출하여 HW I2C를 준비한다. + */ +void hw_i2c_init_once(void); + +/** + * @brief SW I2C(비트뱅) 모드 초기화 (레거시, 현재 미사용) + * + * HW 모드가 활성화되어 있으면 TWI를 해제한 후 SW로 전환한다. + * 이미 SW 모드이면 아무 동작 없이 리턴한다. + */ +void sw_i2c_init_once(void); + +/** + * @brief I2C 모드 플래그 전체 초기화 + * + * HW_I2C_FRQ, SW_I2C_FRQ를 모두 false로 리셋한다. + * 다음 init 호출 시 강제로 재초기화가 수행된다. + */ +void i2c_reset_state(void); + +#endif diff --git a/project/ble_peripheral/ble_app_bladder_patch/battery_saadc.c b/project/ble_peripheral/ble_app_bladder_patch/measurement/battery/battery_saadc.c similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/battery_saadc.c rename to project/ble_peripheral/ble_app_bladder_patch/measurement/battery/battery_saadc.c index 934ee9b..0559529 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/battery_saadc.c +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/battery/battery_saadc.c @@ -1,297 +1,297 @@ -/******************************************************************************* - * @file battery_saadc.c - * @author CandyPops Co. - * @version V1.0.0 - * @date 2022-09-05 - * @brief - ******************************************************************************/ - -/******************************************************************************* - * [모듈 개요] 배터리 전압 ADC 측정 모듈 - * - * nRF52840의 SAADC(Successive Approximation ADC)를 사용하여 배터리 전압을 측정: - * - AIN2 채널, 10bit 해상도 - * - 5초 주기 타이머(battery_loop)로 반복 측정 - * - 저전압(3500mV 이하) 10회 연속 감지 시 자동 전원 OFF - * - info4 모드(전체 센서 수집)에서는 info_batt에 저장 후 온도 측정으로 전환 - * - * 배터리 전압 변환 공식: - * 전압(mV) = ADC값 x (600mV / 1023) x 6 x 1.42 (분압 저항 보정 계수) - * - * info4 모드 순서: 배터리 -> 온도(go_temp) -> IMU(motion_raw_data_enabled) - ******************************************************************************/ - -#include "sdk_common.h" - -#include -#include -#include "nrf.h" -#include "boards.h" -#include "app_error.h" -#include "nrf_drv_saadc.h" -#include "nrf_drv_timer.h" -#include "ble_nus.h" -#include "nrf_log.h" -#include "main.h" -#include "app_timer.h" -//#include "fstorage.h" -#include "battery_saadc.h" -#include "main_timer.h" -#include "main.h" -#include "debug_print.h" - -/* SAADC 내부 기준전압 600mV (부동소수점) */ -#define BATTERY_REF_VOLTAGE_IN_MILLIVOLTS 600.0f /**< Reference voltage (in milli volts) used by ADC while doing conversion. */ - -/* 1/3 프리스케일링 보상 계수 (입력 전압을 1/3로 분압하므로 x3, 추가 x2 = 총 x6) (부동소수점) */ -#define BATTERY_PRE_SCALING_COMPENSATION 6.0f /**< The ADC is configured to use VDD with 1/3 prescaling as input. And hence the result of conversion is to be multiplied by 3 to get the actual value of the battery voltage.*/ - -/* 12비트 ADC 최대 디지털 값 (부동소수점) */ -#define BATTERY_ADC_RES_12BITS 4095.0f /**< Maximum digital value for 12-bit ADC conversion. */ - -/**@brief Macro to convert the result of ADC conversion in millivolts. - * - * @param[in] ADC_VALUE ADC result. - * - * @retval Result converted to millivolts. - */ -#define BATTERY_RESULT_IN_MILLI_VOLTS(ADC_VALUE)\ - ((((ADC_VALUE) * BATTERY_REF_VOLTAGE_IN_MILLIVOLTS) / BATTERY_ADC_RES_12BITS) * BATTERY_PRE_SCALING_COMPENSATION) - -/* 배터리 측정용 싱글 버퍼 (1회 측정 후 uninit하므로 더블 버퍼 불필요) */ -static nrf_saadc_value_t adc_buf; -//static nrf_saadc_value_t adc_bufs[2]; // 이전: 더블 버퍼 (연속 측정용) - - -/* 배터리 모니터링 반복 타이머 정의 */ -APP_TIMER_DEF(m_battery_loop_timer_id); - -/* 배터리 측정 주기: 5초 (밀리초 단위) */ -#define BATTERY_LOOP_INTERVAL 60000 - -/* 저전압 체크 플래그 — battery_loop에서 true로 설정, 핸들러에서 소비 */ -bool low_battery_check = false; - -/* SAADC 콜백 완료 플래그 — all_sensors()에서 배터리 측정 완료 대기용 */ -volatile bool battery_saadc_done = false; - -/* info4: 전체 센서 데이터 수집 모드 플래그 */ -extern bool info4; // main.c - - -extern char ble_tx_buffer[BLE_NUS_MAX_DATA_LEN]; - -/* true가 되면 main_timer에서 전원 OFF 시퀀스 실행 */ -extern bool go_device_power_off; - -/* 다른 작업(IMU 등) 처리 중이면 true — 배터리 측정 스킵용 */ -extern volatile bool processing; - -/* 현재 명령 소스: CMD_UART 또는 CMD_BLE */ -extern which_cmd_t cmd_type_t; - -extern uint8_t ble_bin_buffer[BLE_NUS_MAX_DATA_LEN] ; - -/* info4 모드에서 배터리 전압을 임시 저장 (mV 단위) */ - volatile uint16_t info_batt; //48_c - -/* info4 순차 측정 제어 플래그: go_batt→ go_temp → motion */ -extern bool go_temp; // -extern bool go_batt; //cmd_parse - -extern bool motion_raw_data_enabled ; -extern bool ble_got_new_data; -extern bool motion_data_once ; -/**@brief Function for handling the ADC interrupt. - * - * @details This function will fetch the conversion result from the ADC, convert the value into - * percentage and send it to peer. - */ - - -/** - * @brief 배터리 전압 ADC 완료 콜백 - * - * SAADC 변환 완료 시 호출된다. - * ADC 값을 실제 배터리 전압(mV)으로 변환하고, 동작 모드에 따라: - * - 저전압 체크 모드: 3500mV 이하 10회 연속이면 자동 전원 OFF - * - info4 모드: info_batt에 저장 후 온도 측정(go_temp)으로 전환 - * - 일반 모드: BLE 또는 UART로 즉시 전송 - * - * 전압 변환: ADC값 x (600/1023) x 6 = 기본 전압, x 1.42 = 분압 보정 후 실제 전압 - */ -void battery_event_handler( nrf_drv_saadc_evt_t const * p_event ) -{ - /* 저전압 연속 감지 카운터 (static으로 호출 간 유지) */ - static uint8_t low_battery_cnt = 0; - - if (p_event->type == NRF_DRV_SAADC_EVT_DONE) - { - nrf_saadc_value_t register_val = 0; - float batt_lvl_in_milli_volt_0 = 0; /* 보정 전 전압 (부동소수점) */ - float batt_lvl_in_milli_volt_1 = 0; /* 분압 보정 후 최종 전압 (부동소수점) */ - - /* ADC 변환 결과 읽기 */ - register_val = p_event->data.done.p_buffer[0]; - - //err_code = nrf_drv_saadc_buffer_convert(p_event->data.done.p_buffer, 1); // 이전: 다음 변환을 위해 버퍼 재등록 - //APP_ERROR_CHECK(err_code); - - /* SAADC 해제 — 다른 ADC 측정(온도, 압력)과 하드웨어 공유 */ - /* 1회 측정 후 해제이므로 buffer_convert(다음 버퍼 등록) 불필요 */ - nrf_drv_saadc_channel_uninit(0); - nrf_drv_saadc_uninit(); - - /* 콜백 완료 알림 (all_sensors 대기 해제용) */ - if (info4) DBG_PRINTF("2"); - battery_saadc_done = true; - - /* ADC값 → mV 변환 (매크로: ADC x 600/1023 x 6) */ - batt_lvl_in_milli_volt_0 = BATTERY_RESULT_IN_MILLI_VOLTS(register_val); - - /* 분압 저항 보정 계수 1.42 적용 → 실제 배터리 전압 */ - batt_lvl_in_milli_volt_1 = (batt_lvl_in_milli_volt_0) *1.42f; - - /* === 저전압 체크 모드 (battery_loop 타이머에서 설정) === */ - if(low_battery_check == true) - { - low_battery_check = false; - - /* 배터리 전압이 LOW_BATTERY_VOLTAGE(3500mV) 이하인지 확인 */ - if(batt_lvl_in_milli_volt_1 <= LOW_BATTERY_VOLTAGE) - { - /* 10회 연속 저전압 감지 시 전원 OFF 시퀀스 시작 */ - if(low_battery_cnt >= 10) - { - low_battery_cnt = 0; - /*go to power off and fds save */ - DBG_PRINTF("Save FDS parameters and then Power OFF\r\n"); - go_device_power_off = true; - main_timer_start(); - } - else - { - /* 아직 10회 미만 — 카운터 증가 후 경고 출력 */ - low_battery_cnt++; - DBG_PRINTF("WARNING!!! low_battery cnt = %d, Batt = %d(mV)\r\n", low_battery_cnt, (int)batt_lvl_in_milli_volt_1); - } - } - } - - /* === info4 모드: 전체 센서 수집(mbb) 중 배터리 값 저장 === */ - else if (info4 == true) - { - info_batt = batt_lvl_in_milli_volt_1; - } - - /* === 일반 모드: 단독 배터리 측정 요청(msn)에 대한 응답 전송 === */ - else - { - if (cmd_type_t == CMD_UART) - { - DBG_PRINTF("Tn%d\r\n\r\n", (int)batt_lvl_in_milli_volt_1); - } - else if (cmd_type_t == CMD_BLE) - { - /* "rsn:" 헤더와 함께 배터리 전압을 바이너리로 BLE 전송 */ - single_format_data(ble_bin_buffer, "rsn:", batt_lvl_in_milli_volt_1); - dr_binary_tx_safe(ble_bin_buffer,3); - //data_tx_handler(ble_tx_buffer); - } - } - } -} - - -/** - * @brief SAADC를 배터리 전압 측정용으로 설정 - * - * AIN2 채널을 싱글엔드(SE) 모드, 1/3 프리스케일링으로 초기화한다. - * 더블 버퍼(adc_bufs[0], [1])를 등록하여 연속 측정이 가능하도록 한다. - * 콜백: battery_event_handler - */ -static void battery_configure(void) -{ - /* SAADC 드라이버 초기화 (4x 오버샘플링으로 노이즈 저감) */ - nrf_drv_saadc_config_t saadc_config = NRF_DRV_SAADC_DEFAULT_CONFIG; - saadc_config.resolution = NRF_SAADC_RESOLUTION_12BIT; // 10 -> 12bit - saadc_config.oversample = NRF_SAADC_OVERSAMPLE_4X; - ret_code_t err_code = nrf_drv_saadc_init(&saadc_config, battery_event_handler); - if (err_code != NRF_SUCCESS) { - return; /* SAADC 사용 중 → 이번 측정 스킵, 다음 주기에 재시도 */ - } - - /* AIN2 채널 설정: 싱글엔드 입력, 1/6 gain, burst + TACQ 20μs */ - nrf_saadc_channel_config_t config = NRF_DRV_SAADC_DEFAULT_CHANNEL_CONFIG_SE(NRF_SAADC_INPUT_AIN2); - config.burst = NRF_SAADC_BURST_ENABLED; - config.acq_time = NRF_SAADC_ACQTIME_10US; - err_code = nrf_drv_saadc_channel_init(0, &config); - APP_ERROR_CHECK(err_code); - - /* 싱글 버퍼 등록 (1회 측정 후 uninit) */ - err_code = nrf_drv_saadc_buffer_convert(&adc_buf, 1); - APP_ERROR_CHECK(err_code); - //err_code = nrf_drv_saadc_buffer_convert(&adc_bufs[0], 1); // 이전: 더블 버퍼 - //APP_ERROR_CHECK(err_code); - //err_code = nrf_drv_saadc_buffer_convert(&adc_bufs[1], 1); - //APP_ERROR_CHECK(err_code); -} - -/** - * @brief 배터리 전압 1회 측정 시작 - * - * SAADC를 배터리용으로 설정 후 샘플링을 트리거한다. - * 결과는 battery_event_handler 콜백에서 비동기로 처리된다. - */ -void battery_level_meas(void) -{ - ret_code_t err_code; - - battery_configure(); /* SAADC 배터리용 초기화 */ - err_code = nrf_drv_saadc_sample(); /* ADC 샘플링 트리거 (비동기) */ - APP_ERROR_CHECK(err_code); -} - - -/** - * @brief 배터리 모니터링 타이머 콜백 (5초 주기) - 주기 확인 필요(너무 짧음) - * - * 저전압 체크 플래그를 설정하고 배터리 측정을 시작한다. - * 다른 작업(IMU 등) 처리 중이면 측정을 건너뛴다. - */ -void battery_loop(void * p_context) /* For 1sec */ -{ - UNUSED_PARAMETER(p_context); - - /* 다른 센서 처리 중 또는 MBB 센서 수집 중이면 배터리 측정 스킵 (SAADC 충돌 방지) */ - if (processing == true || info4 == true) - { - processing = false ; // add 20241218 - //low_battery_check = true; - return; - } - else - { - low_battery_check = true; /* 저전압 감지 모드로 측정 */ - battery_level_meas(); /* 배터리 ADC 1회 측정 시작 */ - } -} - -/** @brief 배터리 모니터링 타이머 시작 (5초 반복) */ -void battery_timer_start(void) -{ - APP_ERROR_CHECK(app_timer_start(m_battery_loop_timer_id, APP_TIMER_TICKS(BATTERY_LOOP_INTERVAL), NULL)); -} - -/** @brief 배터리 모니터링 타이머 정지 */ -void battery_timer_stop(void) -{ - APP_ERROR_CHECK(app_timer_stop(m_battery_loop_timer_id)); -} - -/** @brief 배터리 모니터링 타이머 초기화 (반복 모드, 콜백: battery_loop) */ -void battery_timer_init(void) -{ - APP_ERROR_CHECK(app_timer_create(&m_battery_loop_timer_id, APP_TIMER_MODE_REPEATED, battery_loop)); -} - +/******************************************************************************* + * @file battery_saadc.c + * @author CandyPops Co. + * @version V1.0.0 + * @date 2022-09-05 + * @brief + ******************************************************************************/ + +/******************************************************************************* + * [모듈 개요] 배터리 전압 ADC 측정 모듈 + * + * nRF52840의 SAADC(Successive Approximation ADC)를 사용하여 배터리 전압을 측정: + * - AIN2 채널, 10bit 해상도 + * - 5초 주기 타이머(battery_loop)로 반복 측정 + * - 저전압(3500mV 이하) 10회 연속 감지 시 자동 전원 OFF + * - info4 모드(전체 센서 수집)에서는 info_batt에 저장 후 온도 측정으로 전환 + * + * 배터리 전압 변환 공식: + * 전압(mV) = ADC값 x (600mV / 1023) x 6 x 1.42 (분압 저항 보정 계수) + * + * info4 모드 순서: 배터리 -> 온도(go_temp) -> IMU(motion_raw_data_enabled) + ******************************************************************************/ + +#include "sdk_common.h" + +#include +#include +#include "nrf.h" +#include "boards.h" +#include "app_error.h" +#include "nrf_drv_saadc.h" +#include "nrf_drv_timer.h" +#include "ble_nus.h" +#include "nrf_log.h" +#include "main.h" +#include "app_timer.h" +//#include "fstorage.h" +#include "battery_saadc.h" +#include "main_timer.h" +#include "main.h" +#include "debug_print.h" + +/* SAADC 내부 기준전압 600mV (부동소수점) */ +#define BATTERY_REF_VOLTAGE_IN_MILLIVOLTS 600.0f /**< Reference voltage (in milli volts) used by ADC while doing conversion. */ + +/* 1/3 프리스케일링 보상 계수 (입력 전압을 1/3로 분압하므로 x3, 추가 x2 = 총 x6) (부동소수점) */ +#define BATTERY_PRE_SCALING_COMPENSATION 6.0f /**< The ADC is configured to use VDD with 1/3 prescaling as input. And hence the result of conversion is to be multiplied by 3 to get the actual value of the battery voltage.*/ + +/* 12비트 ADC 최대 디지털 값 (부동소수점) */ +#define BATTERY_ADC_RES_12BITS 4095.0f /**< Maximum digital value for 12-bit ADC conversion. */ + +/**@brief Macro to convert the result of ADC conversion in millivolts. + * + * @param[in] ADC_VALUE ADC result. + * + * @retval Result converted to millivolts. + */ +#define BATTERY_RESULT_IN_MILLI_VOLTS(ADC_VALUE)\ + ((((ADC_VALUE) * BATTERY_REF_VOLTAGE_IN_MILLIVOLTS) / BATTERY_ADC_RES_12BITS) * BATTERY_PRE_SCALING_COMPENSATION) + +/* 배터리 측정용 싱글 버퍼 (1회 측정 후 uninit하므로 더블 버퍼 불필요) */ +static nrf_saadc_value_t adc_buf; +//static nrf_saadc_value_t adc_bufs[2]; // 이전: 더블 버퍼 (연속 측정용) + + +/* 배터리 모니터링 반복 타이머 정의 */ +APP_TIMER_DEF(m_battery_loop_timer_id); + +/* 배터리 측정 주기: 5초 (밀리초 단위) */ +#define BATTERY_LOOP_INTERVAL 60000 + +/* 저전압 체크 플래그 — battery_loop에서 true로 설정, 핸들러에서 소비 */ +bool low_battery_check = false; + +/* SAADC 콜백 완료 플래그 — all_sensors()에서 배터리 측정 완료 대기용 */ +volatile bool battery_saadc_done = false; + +/* info4: 전체 센서 데이터 수집 모드 플래그 */ +extern bool info4; // main.c + + +extern char ble_tx_buffer[BLE_NUS_MAX_DATA_LEN]; + +/* true가 되면 main_timer에서 전원 OFF 시퀀스 실행 */ +extern bool go_device_power_off; + +/* 다른 작업(IMU 등) 처리 중이면 true — 배터리 측정 스킵용 */ +extern volatile bool processing; + +/* 현재 명령 소스: CMD_UART 또는 CMD_BLE */ +extern which_cmd_t cmd_type_t; + +extern uint8_t ble_bin_buffer[BLE_NUS_MAX_DATA_LEN] ; + +/* info4 모드에서 배터리 전압을 임시 저장 (mV 단위) */ + volatile uint16_t info_batt; //48_c + +/* info4 순차 측정 제어 플래그: go_batt→ go_temp → motion */ +extern bool go_temp; // +extern bool go_batt; //cmd_parse + +extern bool motion_raw_data_enabled ; +extern bool ble_got_new_data; +extern bool motion_data_once ; +/**@brief Function for handling the ADC interrupt. + * + * @details This function will fetch the conversion result from the ADC, convert the value into + * percentage and send it to peer. + */ + + +/** + * @brief 배터리 전압 ADC 완료 콜백 + * + * SAADC 변환 완료 시 호출된다. + * ADC 값을 실제 배터리 전압(mV)으로 변환하고, 동작 모드에 따라: + * - 저전압 체크 모드: 3500mV 이하 10회 연속이면 자동 전원 OFF + * - info4 모드: info_batt에 저장 후 온도 측정(go_temp)으로 전환 + * - 일반 모드: BLE 또는 UART로 즉시 전송 + * + * 전압 변환: ADC값 x (600/1023) x 6 = 기본 전압, x 1.42 = 분압 보정 후 실제 전압 + */ +void battery_event_handler( nrf_drv_saadc_evt_t const * p_event ) +{ + /* 저전압 연속 감지 카운터 (static으로 호출 간 유지) */ + static uint8_t low_battery_cnt = 0; + + if (p_event->type == NRF_DRV_SAADC_EVT_DONE) + { + nrf_saadc_value_t register_val = 0; + float batt_lvl_in_milli_volt_0 = 0; /* 보정 전 전압 (부동소수점) */ + float batt_lvl_in_milli_volt_1 = 0; /* 분압 보정 후 최종 전압 (부동소수점) */ + + /* ADC 변환 결과 읽기 */ + register_val = p_event->data.done.p_buffer[0]; + + //err_code = nrf_drv_saadc_buffer_convert(p_event->data.done.p_buffer, 1); // 이전: 다음 변환을 위해 버퍼 재등록 + //APP_ERROR_CHECK(err_code); + + /* SAADC 해제 — 다른 ADC 측정(온도, 압력)과 하드웨어 공유 */ + /* 1회 측정 후 해제이므로 buffer_convert(다음 버퍼 등록) 불필요 */ + nrf_drv_saadc_channel_uninit(0); + nrf_drv_saadc_uninit(); + + /* 콜백 완료 알림 (all_sensors 대기 해제용) */ + if (info4) DBG_PRINTF("2"); + battery_saadc_done = true; + + /* ADC값 → mV 변환 (매크로: ADC x 600/1023 x 6) */ + batt_lvl_in_milli_volt_0 = BATTERY_RESULT_IN_MILLI_VOLTS(register_val); + + /* 분압 저항 보정 계수 1.42 적용 → 실제 배터리 전압 */ + batt_lvl_in_milli_volt_1 = (batt_lvl_in_milli_volt_0) *1.42f; + + /* === 저전압 체크 모드 (battery_loop 타이머에서 설정) === */ + if(low_battery_check == true) + { + low_battery_check = false; + + /* 배터리 전압이 LOW_BATTERY_VOLTAGE(3500mV) 이하인지 확인 */ + if(batt_lvl_in_milli_volt_1 <= LOW_BATTERY_VOLTAGE) + { + /* 10회 연속 저전압 감지 시 전원 OFF 시퀀스 시작 */ + if(low_battery_cnt >= 10) + { + low_battery_cnt = 0; + /*go to power off and fds save */ + DBG_PRINTF("Save FDS parameters and then Power OFF\r\n"); + go_device_power_off = true; + main_timer_start(); + } + else + { + /* 아직 10회 미만 — 카운터 증가 후 경고 출력 */ + low_battery_cnt++; + DBG_PRINTF("WARNING!!! low_battery cnt = %d, Batt = %d(mV)\r\n", low_battery_cnt, (int)batt_lvl_in_milli_volt_1); + } + } + } + + /* === info4 모드: 전체 센서 수집(mbb) 중 배터리 값 저장 === */ + else if (info4 == true) + { + info_batt = batt_lvl_in_milli_volt_1; + } + + /* === 일반 모드: 단독 배터리 측정 요청(msn)에 대한 응답 전송 === */ + else + { + if (cmd_type_t == CMD_UART) + { + DBG_PRINTF("Tn%d\r\n\r\n", (int)batt_lvl_in_milli_volt_1); + } + else if (cmd_type_t == CMD_BLE) + { + /* "rsn:" 헤더와 함께 배터리 전압을 바이너리로 BLE 전송 */ + single_format_data(ble_bin_buffer, "rsn:", batt_lvl_in_milli_volt_1); + dr_binary_tx_safe(ble_bin_buffer,3); + //data_tx_handler(ble_tx_buffer); + } + } + } +} + + +/** + * @brief SAADC를 배터리 전압 측정용으로 설정 + * + * AIN2 채널을 싱글엔드(SE) 모드, 1/3 프리스케일링으로 초기화한다. + * 더블 버퍼(adc_bufs[0], [1])를 등록하여 연속 측정이 가능하도록 한다. + * 콜백: battery_event_handler + */ +static void battery_configure(void) +{ + /* SAADC 드라이버 초기화 (4x 오버샘플링으로 노이즈 저감) */ + nrf_drv_saadc_config_t saadc_config = NRF_DRV_SAADC_DEFAULT_CONFIG; + saadc_config.resolution = NRF_SAADC_RESOLUTION_12BIT; // 10 -> 12bit + saadc_config.oversample = NRF_SAADC_OVERSAMPLE_4X; + ret_code_t err_code = nrf_drv_saadc_init(&saadc_config, battery_event_handler); + if (err_code != NRF_SUCCESS) { + return; /* SAADC 사용 중 → 이번 측정 스킵, 다음 주기에 재시도 */ + } + + /* AIN2 채널 설정: 싱글엔드 입력, 1/6 gain, burst + TACQ 20μs */ + nrf_saadc_channel_config_t config = NRF_DRV_SAADC_DEFAULT_CHANNEL_CONFIG_SE(NRF_SAADC_INPUT_AIN2); + config.burst = NRF_SAADC_BURST_ENABLED; + config.acq_time = NRF_SAADC_ACQTIME_10US; + err_code = nrf_drv_saadc_channel_init(0, &config); + APP_ERROR_CHECK(err_code); + + /* 싱글 버퍼 등록 (1회 측정 후 uninit) */ + err_code = nrf_drv_saadc_buffer_convert(&adc_buf, 1); + APP_ERROR_CHECK(err_code); + //err_code = nrf_drv_saadc_buffer_convert(&adc_bufs[0], 1); // 이전: 더블 버퍼 + //APP_ERROR_CHECK(err_code); + //err_code = nrf_drv_saadc_buffer_convert(&adc_bufs[1], 1); + //APP_ERROR_CHECK(err_code); +} + +/** + * @brief 배터리 전압 1회 측정 시작 + * + * SAADC를 배터리용으로 설정 후 샘플링을 트리거한다. + * 결과는 battery_event_handler 콜백에서 비동기로 처리된다. + */ +void battery_level_meas(void) +{ + ret_code_t err_code; + + battery_configure(); /* SAADC 배터리용 초기화 */ + err_code = nrf_drv_saadc_sample(); /* ADC 샘플링 트리거 (비동기) */ + APP_ERROR_CHECK(err_code); +} + + +/** + * @brief 배터리 모니터링 타이머 콜백 (5초 주기) - 주기 확인 필요(너무 짧음) + * + * 저전압 체크 플래그를 설정하고 배터리 측정을 시작한다. + * 다른 작업(IMU 등) 처리 중이면 측정을 건너뛴다. + */ +void battery_loop(void * p_context) /* For 1sec */ +{ + UNUSED_PARAMETER(p_context); + + /* 다른 센서 처리 중 또는 MBB 센서 수집 중이면 배터리 측정 스킵 (SAADC 충돌 방지) */ + if (processing == true || info4 == true) + { + processing = false ; // add 20241218 + //low_battery_check = true; + return; + } + else + { + low_battery_check = true; /* 저전압 감지 모드로 측정 */ + battery_level_meas(); /* 배터리 ADC 1회 측정 시작 */ + } +} + +/** @brief 배터리 모니터링 타이머 시작 (5초 반복) */ +void battery_timer_start(void) +{ + APP_ERROR_CHECK(app_timer_start(m_battery_loop_timer_id, APP_TIMER_TICKS(BATTERY_LOOP_INTERVAL), NULL)); +} + +/** @brief 배터리 모니터링 타이머 정지 */ +void battery_timer_stop(void) +{ + APP_ERROR_CHECK(app_timer_stop(m_battery_loop_timer_id)); +} + +/** @brief 배터리 모니터링 타이머 초기화 (반복 모드, 콜백: battery_loop) */ +void battery_timer_init(void) +{ + APP_ERROR_CHECK(app_timer_create(&m_battery_loop_timer_id, APP_TIMER_MODE_REPEATED, battery_loop)); +} + diff --git a/project/ble_peripheral/ble_app_bladder_patch/battery_saadc.h b/project/ble_peripheral/ble_app_bladder_patch/measurement/battery/battery_saadc.h similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/battery_saadc.h rename to project/ble_peripheral/ble_app_bladder_patch/measurement/battery/battery_saadc.h index dcaa9dd..6085fdc 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/battery_saadc.h +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/battery/battery_saadc.h @@ -1,41 +1,41 @@ -/******************************************************************************* - * @file battery_saadc.h - * @author CandyPops Co. - * @version V1.0.0 - * @date 2022-09-05 - * @brief - ******************************************************************************/ - -/******************************************************************************* - * [헤더 개요] 배터리 전압 SAADC 측정 인터페이스 - * - * nRF52840 SAADC를 이용한 배터리 전압 측정 API를 선언한다. - * - * 주요 API: - * - battery_level_meas() : 배터리 전압 1회 측정 (AIN2) - * - battery_timer_init/start/stop() : 5초 주기 배터리 모니터링 타이머 제어 - * - * LOW_BATTERY_VOLTAGE(3500mV) 이하가 10회 연속 감지되면 자동 전원 OFF - ******************************************************************************/ - -#ifndef _BATTERY_SAADC_H_ -#define _BATTERY_SAADC_H_ - -/* 저전압 판정 임계값 (mV) — 이 값 이하가 10회 연속이면 자동 전원 OFF */ -#define LOW_BATTERY_VOLTAGE 3500 /* Low Battery 임계값 */ - - -/** @brief 배터리 SAADC 콜백 완료 플래그 (all_sensors 대기용) */ -extern volatile bool battery_saadc_done; - -/** @brief 배터리 전압 1회 측정 시작 (비동기, 결과는 콜백에서 처리) */ -void battery_level_meas(void); -/** @brief 배터리 모니터링 5초 반복 타이머 시작 */ -void battery_timer_start(void); -/** @brief 배터리 모니터링 타이머 정지 */ -void battery_timer_stop(void); -/** @brief 배터리 모니터링 타이머 초기화 (앱 시작 시 1회 호출) */ -void battery_timer_init(void); - -#endif //_BATTERY_SAADC_H_ - +/******************************************************************************* + * @file battery_saadc.h + * @author CandyPops Co. + * @version V1.0.0 + * @date 2022-09-05 + * @brief + ******************************************************************************/ + +/******************************************************************************* + * [헤더 개요] 배터리 전압 SAADC 측정 인터페이스 + * + * nRF52840 SAADC를 이용한 배터리 전압 측정 API를 선언한다. + * + * 주요 API: + * - battery_level_meas() : 배터리 전압 1회 측정 (AIN2) + * - battery_timer_init/start/stop() : 5초 주기 배터리 모니터링 타이머 제어 + * + * LOW_BATTERY_VOLTAGE(3500mV) 이하가 10회 연속 감지되면 자동 전원 OFF + ******************************************************************************/ + +#ifndef _BATTERY_SAADC_H_ +#define _BATTERY_SAADC_H_ + +/* 저전압 판정 임계값 (mV) — 이 값 이하가 10회 연속이면 자동 전원 OFF */ +#define LOW_BATTERY_VOLTAGE 3500 /* Low Battery 임계값 */ + + +/** @brief 배터리 SAADC 콜백 완료 플래그 (all_sensors 대기용) */ +extern volatile bool battery_saadc_done; + +/** @brief 배터리 전압 1회 측정 시작 (비동기, 결과는 콜백에서 처리) */ +void battery_level_meas(void); +/** @brief 배터리 모니터링 5초 반복 타이머 시작 */ +void battery_timer_start(void); +/** @brief 배터리 모니터링 타이머 정지 */ +void battery_timer_stop(void); +/** @brief 배터리 모니터링 타이머 초기화 (앱 시작 시 1회 호출) */ +void battery_timer_init(void); + +#endif //_BATTERY_SAADC_H_ + diff --git a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/EmbUtils/DataConverter.c b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/EmbUtils/DataConverter.c similarity index 96% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/EmbUtils/DataConverter.c rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/EmbUtils/DataConverter.c index 1a1f680..5c30acd 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/EmbUtils/DataConverter.c +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/EmbUtils/DataConverter.c @@ -1,103 +1,103 @@ -/* - * ________________________________________________________________________________________________________ - * Copyright (c) 2015-2015 InvenSense Inc. All rights reserved. - * - * This software, related documentation and any modifications thereto (collectively “Software”) is subject - * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright - * and other intellectual property rights laws. - * - * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software - * and any use, reproduction, disclosure or distribution of the Software without an express license agreement - * from InvenSense is strictly prohibited. - * - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS - * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED - * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL - * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY - * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, - * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE - * OF THE SOFTWARE. - * ________________________________________________________________________________________________________ - */ - -#include "DataConverter.h" - -uint8_t * inv_dc_int32_to_little8(int32_t x, uint8_t * little8) -{ - little8[3] = (uint8_t)((x >> 24) & 0xff); - little8[2] = (uint8_t)((x >> 16) & 0xff); - little8[1] = (uint8_t)((x >> 8) & 0xff); - little8[0] = (uint8_t)(x & 0xff); - - return little8; -} - -uint8_t * inv_dc_int16_to_little8(int16_t x, uint8_t * little8) -{ - little8[0] = (uint8_t)(x & 0xff); - little8[1] = (uint8_t)((x >> 8) & 0xff); - - return little8; -} - -uint8_t * inv_dc_int32_to_big8(int32_t x, uint8_t * big8) -{ - big8[0] = (uint8_t)((x >> 24) & 0xff); - big8[1] = (uint8_t)((x >> 16) & 0xff); - big8[2] = (uint8_t)((x >> 8) & 0xff); - big8[3] = (uint8_t)(x & 0xff); - - return big8; -} - -int32_t inv_dc_little8_to_int32(const uint8_t * little8) -{ - int32_t x = 0; - - x |= ((int32_t)little8[3] << 24); - x |= ((int32_t)little8[2] << 16); - x |= ((int32_t)little8[1] << 8); - x |= ((int32_t)little8[0]); - - return x; -} - -int16_t inv_dc_big16_to_int16(uint8_t * data) -{ - int16_t result; - - result = (*data << 8); - data++; - result |= *data; - - return result; -} - -int16_t inv_dc_le_to_int16(const uint8_t * little8) -{ - uint16_t x = 0; - - x |= ((uint16_t)little8[0]); - x |= ((uint16_t)little8[1] << 8); - - return (int16_t)x; -} - -void inv_dc_sfix32_to_float(const int32_t * in, uint32_t len, uint8_t qx, float * out) -{ - uint8_t i; - - for(i = 0; i < len; ++i) { - out[i] = (float)in[i] / (1 << qx); - } -} - -void inv_dc_float_to_sfix32(const float * in, uint32_t len, uint8_t qx, int32_t * out) -{ - uint8_t i; - - for(i = 0; i < len; ++i) { - out[i] = (int32_t)((in[i] * (1 << qx)) + ((in[i] >= 0) - 0.5f)); - } -} +/* + * ________________________________________________________________________________________________________ + * Copyright (c) 2015-2015 InvenSense Inc. All rights reserved. + * + * This software, related documentation and any modifications thereto (collectively “Software”) is subject + * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright + * and other intellectual property rights laws. + * + * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software + * and any use, reproduction, disclosure or distribution of the Software without an express license agreement + * from InvenSense is strictly prohibited. + * + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS + * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED + * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL + * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, + * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THE SOFTWARE. + * ________________________________________________________________________________________________________ + */ + +#include "DataConverter.h" + +uint8_t * inv_dc_int32_to_little8(int32_t x, uint8_t * little8) +{ + little8[3] = (uint8_t)((x >> 24) & 0xff); + little8[2] = (uint8_t)((x >> 16) & 0xff); + little8[1] = (uint8_t)((x >> 8) & 0xff); + little8[0] = (uint8_t)(x & 0xff); + + return little8; +} + +uint8_t * inv_dc_int16_to_little8(int16_t x, uint8_t * little8) +{ + little8[0] = (uint8_t)(x & 0xff); + little8[1] = (uint8_t)((x >> 8) & 0xff); + + return little8; +} + +uint8_t * inv_dc_int32_to_big8(int32_t x, uint8_t * big8) +{ + big8[0] = (uint8_t)((x >> 24) & 0xff); + big8[1] = (uint8_t)((x >> 16) & 0xff); + big8[2] = (uint8_t)((x >> 8) & 0xff); + big8[3] = (uint8_t)(x & 0xff); + + return big8; +} + +int32_t inv_dc_little8_to_int32(const uint8_t * little8) +{ + int32_t x = 0; + + x |= ((int32_t)little8[3] << 24); + x |= ((int32_t)little8[2] << 16); + x |= ((int32_t)little8[1] << 8); + x |= ((int32_t)little8[0]); + + return x; +} + +int16_t inv_dc_big16_to_int16(uint8_t * data) +{ + int16_t result; + + result = (*data << 8); + data++; + result |= *data; + + return result; +} + +int16_t inv_dc_le_to_int16(const uint8_t * little8) +{ + uint16_t x = 0; + + x |= ((uint16_t)little8[0]); + x |= ((uint16_t)little8[1] << 8); + + return (int16_t)x; +} + +void inv_dc_sfix32_to_float(const int32_t * in, uint32_t len, uint8_t qx, float * out) +{ + uint8_t i; + + for(i = 0; i < len; ++i) { + out[i] = (float)in[i] / (1 << qx); + } +} + +void inv_dc_float_to_sfix32(const float * in, uint32_t len, uint8_t qx, int32_t * out) +{ + uint8_t i; + + for(i = 0; i < len; ++i) { + out[i] = (int32_t)((in[i] * (1 << qx)) + ((in[i] >= 0) - 0.5f)); + } +} diff --git a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/EmbUtils/DataConverter.h b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/EmbUtils/DataConverter.h similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/EmbUtils/DataConverter.h rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/EmbUtils/DataConverter.h index 0c25732..45ca8f1 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/EmbUtils/DataConverter.h +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/EmbUtils/DataConverter.h @@ -1,87 +1,87 @@ -/* - * ________________________________________________________________________________________________________ - * Copyright (c) 2015-2015 InvenSense Inc. All rights reserved. - * - * This software, related documentation and any modifications thereto (collectively “Software”) is subject - * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright - * and other intellectual property rights laws. - * - * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software - * and any use, reproduction, disclosure or distribution of the Software without an express license agreement - * from InvenSense is strictly prohibited. - * - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS - * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED - * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL - * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY - * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, - * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE - * OF THE SOFTWARE. - * ________________________________________________________________________________________________________ - */ - -/** @defgroup DataConverter Data Converter - * @brief Helper functions to convert integer - * @ingroup EmbUtils - * @{ - */ - -#ifndef _INV_DATA_CONVERTER_H_ -#define _INV_DATA_CONVERTER_H_ - -#include "InvExport.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#include - -/** @brief Converts a 32-bit long to a little endian byte stream - */ -uint8_t INV_EXPORT * inv_dc_int32_to_little8(int32_t x, uint8_t * little8); - -/** @brief Converts a 16-bit integer to a little endian byte stream - */ -uint8_t INV_EXPORT * inv_dc_int16_to_little8(int16_t x, uint8_t * little8); - -/** @brief Converts a 32-bit long to a big endian byte stream - */ -uint8_t INV_EXPORT * inv_dc_int32_to_big8(int32_t x, uint8_t *big8); - -/** @brief Converts a little endian byte stream into a 32-bit integer - */ -int32_t INV_EXPORT inv_dc_little8_to_int32(const uint8_t * little8); - -/** @brief Converts a little endian byte stream into a 16-bit integer - */ -int16_t INV_EXPORT inv_dc_le_to_int16(const uint8_t * little8); - -/** @brief Converts big endian on 16 bits into an unsigned short - */ -int16_t INV_EXPORT inv_dc_big16_to_int16(uint8_t * data); - -/** @brief Converts an array of 32-bit signed fixed-point integers to an array of floats - * @param[in] in Pointer to the first element of the array of 32-bit signed fixed-point integers - * @param[in] len Length of the array - * @param[in] qx Number of bits used to represent the decimal part of the fixed-point integers - * @param[out] out Pointer to the memory area where the output will be stored - */ -void INV_EXPORT inv_dc_sfix32_to_float(const int32_t * in, uint32_t len, uint8_t qx, float * out); - -/** @brief Converts an array of floats to an array of 32-bit signed fixed-point integers - * @param[in] in Pointer to the first element of the array of floats - * @param[in] len Length of the array - * @param[in] qx Number of bits used to represent the decimal part of the fixed-point integers - * @param[out] out Pointer to the memory area where the output will be stored - */ -void INV_EXPORT inv_dc_float_to_sfix32(const float * in, uint32_t len, uint8_t qx, int32_t * out); - -#ifdef __cplusplus -} -#endif - -#endif /* _INV_DATA_CONVERTER_H_ */ - -/** @} */ +/* + * ________________________________________________________________________________________________________ + * Copyright (c) 2015-2015 InvenSense Inc. All rights reserved. + * + * This software, related documentation and any modifications thereto (collectively “Software”) is subject + * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright + * and other intellectual property rights laws. + * + * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software + * and any use, reproduction, disclosure or distribution of the Software without an express license agreement + * from InvenSense is strictly prohibited. + * + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS + * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED + * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL + * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, + * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THE SOFTWARE. + * ________________________________________________________________________________________________________ + */ + +/** @defgroup DataConverter Data Converter + * @brief Helper functions to convert integer + * @ingroup EmbUtils + * @{ + */ + +#ifndef _INV_DATA_CONVERTER_H_ +#define _INV_DATA_CONVERTER_H_ + +#include "InvExport.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#include + +/** @brief Converts a 32-bit long to a little endian byte stream + */ +uint8_t INV_EXPORT * inv_dc_int32_to_little8(int32_t x, uint8_t * little8); + +/** @brief Converts a 16-bit integer to a little endian byte stream + */ +uint8_t INV_EXPORT * inv_dc_int16_to_little8(int16_t x, uint8_t * little8); + +/** @brief Converts a 32-bit long to a big endian byte stream + */ +uint8_t INV_EXPORT * inv_dc_int32_to_big8(int32_t x, uint8_t *big8); + +/** @brief Converts a little endian byte stream into a 32-bit integer + */ +int32_t INV_EXPORT inv_dc_little8_to_int32(const uint8_t * little8); + +/** @brief Converts a little endian byte stream into a 16-bit integer + */ +int16_t INV_EXPORT inv_dc_le_to_int16(const uint8_t * little8); + +/** @brief Converts big endian on 16 bits into an unsigned short + */ +int16_t INV_EXPORT inv_dc_big16_to_int16(uint8_t * data); + +/** @brief Converts an array of 32-bit signed fixed-point integers to an array of floats + * @param[in] in Pointer to the first element of the array of 32-bit signed fixed-point integers + * @param[in] len Length of the array + * @param[in] qx Number of bits used to represent the decimal part of the fixed-point integers + * @param[out] out Pointer to the memory area where the output will be stored + */ +void INV_EXPORT inv_dc_sfix32_to_float(const int32_t * in, uint32_t len, uint8_t qx, float * out); + +/** @brief Converts an array of floats to an array of 32-bit signed fixed-point integers + * @param[in] in Pointer to the first element of the array of floats + * @param[in] len Length of the array + * @param[in] qx Number of bits used to represent the decimal part of the fixed-point integers + * @param[out] out Pointer to the memory area where the output will be stored + */ +void INV_EXPORT inv_dc_float_to_sfix32(const float * in, uint32_t len, uint8_t qx, int32_t * out); + +#ifdef __cplusplus +} +#endif + +#endif /* _INV_DATA_CONVERTER_H_ */ + +/** @} */ diff --git a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/EmbUtils/ErrorHelper.c b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/EmbUtils/ErrorHelper.c similarity index 98% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/EmbUtils/ErrorHelper.c rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/EmbUtils/ErrorHelper.c index a1354a9..f55cdf7 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/EmbUtils/ErrorHelper.c +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/EmbUtils/ErrorHelper.c @@ -1,47 +1,47 @@ -/* - * ________________________________________________________________________________________________________ - * Copyright (c) 2015-2015 InvenSense Inc. All rights reserved. - * - * This software, related documentation and any modifications thereto (collectively “Software”) is subject - * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright - * and other intellectual property rights laws. - * - * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software - * and any use, reproduction, disclosure or distribution of the Software without an express license agreement - * from InvenSense is strictly prohibited. - * - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS - * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED - * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL - * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY - * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, - * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE - * OF THE SOFTWARE. - * ________________________________________________________________________________________________________ - */ - -#include "ErrorHelper.h" - -const char * inv_error_str(int error) -{ - switch(error) { - case INV_ERROR_SUCCESS: return "Success"; - case INV_ERROR: return "Unspecified error"; - case INV_ERROR_NIMPL: return "Not implemented"; - case INV_ERROR_TRANSPORT: return "Transport error"; - case INV_ERROR_TIMEOUT: return "Timeout, action did not complete in time"; - case INV_ERROR_SIZE: return "Wrong size error"; - case INV_ERROR_OS: return "Operating system failure"; - case INV_ERROR_IO: return "Input/Output error"; - case INV_ERROR_MEM: return "Bad allocation"; - case INV_ERROR_HW: return "Hardware error"; - case INV_ERROR_BAD_ARG: return "Invalid arguments"; - case INV_ERROR_UNEXPECTED: return "Unexpected error"; - case INV_ERROR_FILE: return "Invalid file format"; - case INV_ERROR_PATH: return "Invalid file path"; - case INV_ERROR_IMAGE_TYPE: return "Unknown image type"; - case INV_ERROR_WATCHDOG: return "Watchdog error"; - default: return "Unknown error"; - } -} +/* + * ________________________________________________________________________________________________________ + * Copyright (c) 2015-2015 InvenSense Inc. All rights reserved. + * + * This software, related documentation and any modifications thereto (collectively “Software”) is subject + * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright + * and other intellectual property rights laws. + * + * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software + * and any use, reproduction, disclosure or distribution of the Software without an express license agreement + * from InvenSense is strictly prohibited. + * + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS + * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED + * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL + * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, + * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THE SOFTWARE. + * ________________________________________________________________________________________________________ + */ + +#include "ErrorHelper.h" + +const char * inv_error_str(int error) +{ + switch(error) { + case INV_ERROR_SUCCESS: return "Success"; + case INV_ERROR: return "Unspecified error"; + case INV_ERROR_NIMPL: return "Not implemented"; + case INV_ERROR_TRANSPORT: return "Transport error"; + case INV_ERROR_TIMEOUT: return "Timeout, action did not complete in time"; + case INV_ERROR_SIZE: return "Wrong size error"; + case INV_ERROR_OS: return "Operating system failure"; + case INV_ERROR_IO: return "Input/Output error"; + case INV_ERROR_MEM: return "Bad allocation"; + case INV_ERROR_HW: return "Hardware error"; + case INV_ERROR_BAD_ARG: return "Invalid arguments"; + case INV_ERROR_UNEXPECTED: return "Unexpected error"; + case INV_ERROR_FILE: return "Invalid file format"; + case INV_ERROR_PATH: return "Invalid file path"; + case INV_ERROR_IMAGE_TYPE: return "Unknown image type"; + case INV_ERROR_WATCHDOG: return "Watchdog error"; + default: return "Unknown error"; + } +} diff --git a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/EmbUtils/ErrorHelper.h b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/EmbUtils/ErrorHelper.h similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/EmbUtils/ErrorHelper.h rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/EmbUtils/ErrorHelper.h index faf57e4..243215d 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/EmbUtils/ErrorHelper.h +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/EmbUtils/ErrorHelper.h @@ -1,51 +1,51 @@ -/* - * ________________________________________________________________________________________________________ - * Copyright (c) 2015-2015 InvenSense Inc. All rights reserved. - * - * This software, related documentation and any modifications thereto (collectively “Software”) is subject - * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright - * and other intellectual property rights laws. - * - * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software - * and any use, reproduction, disclosure or distribution of the Software without an express license agreement - * from InvenSense is strictly prohibited. - * - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS - * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED - * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL - * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY - * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, - * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE - * OF THE SOFTWARE. - * ________________________________________________________________________________________________________ - */ - -/** @defgroup ErrorHelper Error Helper - * @brief Helper functions related to error code - * @ingroup EmbUtils - * @{ - */ - -#ifndef _INV_ERROR_HELPER_H_ -#define _INV_ERROR_HELPER_H_ - -#include "InvExport.h" -#include "InvError.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** @brief Returns string describing error number - * @sa enum inv_error - */ -const char INV_EXPORT * inv_error_str(int error); - -#ifdef __cplusplus -} -#endif - -#endif /* _INV_ERROR_HELPER_H_ */ - -/** @} */ +/* + * ________________________________________________________________________________________________________ + * Copyright (c) 2015-2015 InvenSense Inc. All rights reserved. + * + * This software, related documentation and any modifications thereto (collectively “Software”) is subject + * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright + * and other intellectual property rights laws. + * + * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software + * and any use, reproduction, disclosure or distribution of the Software without an express license agreement + * from InvenSense is strictly prohibited. + * + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS + * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED + * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL + * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, + * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THE SOFTWARE. + * ________________________________________________________________________________________________________ + */ + +/** @defgroup ErrorHelper Error Helper + * @brief Helper functions related to error code + * @ingroup EmbUtils + * @{ + */ + +#ifndef _INV_ERROR_HELPER_H_ +#define _INV_ERROR_HELPER_H_ + +#include "InvExport.h" +#include "InvError.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @brief Returns string describing error number + * @sa enum inv_error + */ +const char INV_EXPORT * inv_error_str(int error); + +#ifdef __cplusplus +} +#endif + +#endif /* _INV_ERROR_HELPER_H_ */ + +/** @} */ diff --git a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/EmbUtils/InvBasicMath.c b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/EmbUtils/InvBasicMath.c similarity index 96% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/EmbUtils/InvBasicMath.c rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/EmbUtils/InvBasicMath.c index 37f22d9..2559cf7 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/EmbUtils/InvBasicMath.c +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/EmbUtils/InvBasicMath.c @@ -1,82 +1,82 @@ -/* - Copyright (c) 2014-2015 InvenSense Inc. Portions Copyright (c) 2014-2015 Movea. All rights reserved. - - This software, related documentation and any modifications thereto (collectively "Software") is subject - to InvenSense and its licensors' intellectual property rights under U.S. and international copyright and - other intellectual property rights laws. - - InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software - and any use, reproduction, disclosure or distribution of the Software without an express license - agreement from InvenSense is strictly prohibited. -*/ - -#include "InvBasicMath.h" - -#include - -unsigned int InvBasicMath_log2u(unsigned int val) -{ - unsigned int ret = UINT_MAX; - - while (val != 0) { - val >>= 1; - ret++; - } - - return ret; -} - -int InvBasicMath_isAnOrthonormalMatrix(const float matrix[9]) -{ - // Check if matrix is orthogonal - // Matrix is orthogonal if transpose(Matrix) x Matrix = Identity - - float transpose[9]; - float mult[9]; - int i, j; - - // Compute Transpose(matrix) - for (i = 0; i < 3; i++) { - for(j = 0; j < 3; j++) { - transpose[i*3+j] = matrix[i+j*3]; - } - } - - // Multiply transpose x matrix - mult[0] = transpose[0]*matrix[0] + transpose[1]*matrix[3] + transpose[2]*matrix[6]; - mult[1] = transpose[0]*matrix[1] + transpose[1]*matrix[4] + transpose[2]*matrix[7]; - mult[2] = transpose[0]*matrix[2] + transpose[1]*matrix[5] + transpose[2]*matrix[8]; - - mult[3] = transpose[3]*matrix[0] + transpose[4]*matrix[3] + transpose[5]*matrix[6]; - mult[4] = transpose[3]*matrix[1] + transpose[4]*matrix[4] + transpose[5]*matrix[7]; - mult[5] = transpose[3]*matrix[2] + transpose[4]*matrix[5] + transpose[5]*matrix[8]; - - mult[6] = transpose[6]*matrix[0] + transpose[7]*matrix[3] + transpose[8]*matrix[6]; - mult[7] = transpose[6]*matrix[1] + transpose[7]*matrix[4] + transpose[8]*matrix[7]; - mult[8] = transpose[6]*matrix[2] + transpose[7]*matrix[5] + transpose[8]*matrix[8]; - - // Check that mult is identity - for (i = 0; i < 3; i++) { - for(j = 0; j < 3; j++) { - if (i == j) { - if (mult[i+j*3] != 1) - return 0; - } - else { - if (mult[i+j*3] != 0) - return 0; - } - } - } - - return 1; -} - -float InvBasicMath_computeMatrixDeterminant(const float matrix[9]) -{ - return matrix[0] * (matrix[4]*matrix[8] - matrix[7]*matrix[5]) - -matrix[1] * (matrix[3]*matrix[8] - matrix[6]*matrix[5]) - +matrix[2] * (matrix[3]*matrix[7] - matrix[4]*matrix[6]); -} - - +/* + Copyright (c) 2014-2015 InvenSense Inc. Portions Copyright (c) 2014-2015 Movea. All rights reserved. + + This software, related documentation and any modifications thereto (collectively "Software") is subject + to InvenSense and its licensors' intellectual property rights under U.S. and international copyright and + other intellectual property rights laws. + + InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software + and any use, reproduction, disclosure or distribution of the Software without an express license + agreement from InvenSense is strictly prohibited. +*/ + +#include "InvBasicMath.h" + +#include + +unsigned int InvBasicMath_log2u(unsigned int val) +{ + unsigned int ret = UINT_MAX; + + while (val != 0) { + val >>= 1; + ret++; + } + + return ret; +} + +int InvBasicMath_isAnOrthonormalMatrix(const float matrix[9]) +{ + // Check if matrix is orthogonal + // Matrix is orthogonal if transpose(Matrix) x Matrix = Identity + + float transpose[9]; + float mult[9]; + int i, j; + + // Compute Transpose(matrix) + for (i = 0; i < 3; i++) { + for(j = 0; j < 3; j++) { + transpose[i*3+j] = matrix[i+j*3]; + } + } + + // Multiply transpose x matrix + mult[0] = transpose[0]*matrix[0] + transpose[1]*matrix[3] + transpose[2]*matrix[6]; + mult[1] = transpose[0]*matrix[1] + transpose[1]*matrix[4] + transpose[2]*matrix[7]; + mult[2] = transpose[0]*matrix[2] + transpose[1]*matrix[5] + transpose[2]*matrix[8]; + + mult[3] = transpose[3]*matrix[0] + transpose[4]*matrix[3] + transpose[5]*matrix[6]; + mult[4] = transpose[3]*matrix[1] + transpose[4]*matrix[4] + transpose[5]*matrix[7]; + mult[5] = transpose[3]*matrix[2] + transpose[4]*matrix[5] + transpose[5]*matrix[8]; + + mult[6] = transpose[6]*matrix[0] + transpose[7]*matrix[3] + transpose[8]*matrix[6]; + mult[7] = transpose[6]*matrix[1] + transpose[7]*matrix[4] + transpose[8]*matrix[7]; + mult[8] = transpose[6]*matrix[2] + transpose[7]*matrix[5] + transpose[8]*matrix[8]; + + // Check that mult is identity + for (i = 0; i < 3; i++) { + for(j = 0; j < 3; j++) { + if (i == j) { + if (mult[i+j*3] != 1) + return 0; + } + else { + if (mult[i+j*3] != 0) + return 0; + } + } + } + + return 1; +} + +float InvBasicMath_computeMatrixDeterminant(const float matrix[9]) +{ + return matrix[0] * (matrix[4]*matrix[8] - matrix[7]*matrix[5]) + -matrix[1] * (matrix[3]*matrix[8] - matrix[6]*matrix[5]) + +matrix[2] * (matrix[3]*matrix[7] - matrix[4]*matrix[6]); +} + + diff --git a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/EmbUtils/InvBasicMath.h b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/EmbUtils/InvBasicMath.h similarity index 96% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/EmbUtils/InvBasicMath.h rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/EmbUtils/InvBasicMath.h index 2a1d324..1cc5ff7 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/EmbUtils/InvBasicMath.h +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/EmbUtils/InvBasicMath.h @@ -1,94 +1,94 @@ -/* - Copyright (c) 2014-2015 InvenSense Inc. Portions Copyright (c) 2014-2015 Movea. All rights reserved. - - This software, related documentation and any modifications thereto (collectively "Software") is subject - to InvenSense and its licensors' intellectual property rights under U.S. and international copyright and - other intellectual property rights laws. - - InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software - and any use, reproduction, disclosure or distribution of the Software without an express license - agreement from InvenSense is strictly prohibited. -*/ - -/** @defgroup InvBasicMath InvBasicMath - @brief This file contains basic (overloadable) math functions and macros - @ingroup EmbUtils - @{ -*/ - -#ifndef _INV_BASIC_MATH_H_ -#define _INV_BASIC_MATH_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -/** @brief Return absolute value of argument -*/ -#ifndef INV_ABS -# define INV_ABS(a) ((a) < 0 ? -(a) : (a)) -#endif - -/** @brief Return minimum of two arguments -*/ -#ifndef INV_MIN -# define INV_MIN(a, b) ((a) < (b) ? (a) : (b)) -#endif - -/** @brief Return maximum of two arguments -*/ -#ifndef INV_MAX -# define INV_MAX(a, b) ((a) > (b) ? (a) : (b)) -#endif - -/** @brief Define value for pi -*/ -#ifndef INV_PI -# define INV_PI 3.14159265358979 -#endif -#ifndef M_PI -# define M_PI INV_PI -#endif - -/** @brief Return saturated integer -*/ -#ifndef INV_SATURATE -static inline long InvBasicMath_saturatel(long in, long min, long max) -{ - if (in > max) - return max; - else if (in < min) - return min; - else - return in; -} -# define INV_SATURATE(a, min, max) InvBasicMath_saturatel(a, min, max) -#endif - -/** @brief Compute log2 from integer -*/ -#ifndef INV_LOG2 -unsigned int InvBasicMath_log2u(unsigned int val); -# define INV_LOG2(a) InvBasicMath_log2u(a) -#endif - -/** @brief Check if matrix is orthonormal -* @param [in] matrix 3x3 Matrix to be checked -* @return 1 if it is an orthonormal matrix, 0 otherwise -*/ -int InvBasicMath_isAnOrthonormalMatrix(const float matrix[9]); - -/** @brief Compute the determinant of the matrix -* @param [in] matrix 3x3 Matrix to be checked -* @return the determinant value -*/ -float InvBasicMath_computeMatrixDeterminant(const float matrix[9]); - -#ifdef __cplusplus -} -#endif - -#endif /* _INV_BASIC_MATH_H_ */ - -/** @} */ - +/* + Copyright (c) 2014-2015 InvenSense Inc. Portions Copyright (c) 2014-2015 Movea. All rights reserved. + + This software, related documentation and any modifications thereto (collectively "Software") is subject + to InvenSense and its licensors' intellectual property rights under U.S. and international copyright and + other intellectual property rights laws. + + InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software + and any use, reproduction, disclosure or distribution of the Software without an express license + agreement from InvenSense is strictly prohibited. +*/ + +/** @defgroup InvBasicMath InvBasicMath + @brief This file contains basic (overloadable) math functions and macros + @ingroup EmbUtils + @{ +*/ + +#ifndef _INV_BASIC_MATH_H_ +#define _INV_BASIC_MATH_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/** @brief Return absolute value of argument +*/ +#ifndef INV_ABS +# define INV_ABS(a) ((a) < 0 ? -(a) : (a)) +#endif + +/** @brief Return minimum of two arguments +*/ +#ifndef INV_MIN +# define INV_MIN(a, b) ((a) < (b) ? (a) : (b)) +#endif + +/** @brief Return maximum of two arguments +*/ +#ifndef INV_MAX +# define INV_MAX(a, b) ((a) > (b) ? (a) : (b)) +#endif + +/** @brief Define value for pi +*/ +#ifndef INV_PI +# define INV_PI 3.14159265358979 +#endif +#ifndef M_PI +# define M_PI INV_PI +#endif + +/** @brief Return saturated integer +*/ +#ifndef INV_SATURATE +static inline long InvBasicMath_saturatel(long in, long min, long max) +{ + if (in > max) + return max; + else if (in < min) + return min; + else + return in; +} +# define INV_SATURATE(a, min, max) InvBasicMath_saturatel(a, min, max) +#endif + +/** @brief Compute log2 from integer +*/ +#ifndef INV_LOG2 +unsigned int InvBasicMath_log2u(unsigned int val); +# define INV_LOG2(a) InvBasicMath_log2u(a) +#endif + +/** @brief Check if matrix is orthonormal +* @param [in] matrix 3x3 Matrix to be checked +* @return 1 if it is an orthonormal matrix, 0 otherwise +*/ +int InvBasicMath_isAnOrthonormalMatrix(const float matrix[9]); + +/** @brief Compute the determinant of the matrix +* @param [in] matrix 3x3 Matrix to be checked +* @return the determinant value +*/ +float InvBasicMath_computeMatrixDeterminant(const float matrix[9]); + +#ifdef __cplusplus +} +#endif + +#endif /* _INV_BASIC_MATH_H_ */ + +/** @} */ + diff --git a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/EmbUtils/RingBuffer.h b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/EmbUtils/RingBuffer.h similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/EmbUtils/RingBuffer.h rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/EmbUtils/RingBuffer.h index 127eb2c..cde8750 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/EmbUtils/RingBuffer.h +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/EmbUtils/RingBuffer.h @@ -1,389 +1,389 @@ -/* - Copyright (c) 2014-2015 InvenSense Inc. Portions Copyright (c) 2014-2015 Movea. All rights reserved. - - This software, related documentation and any modifications thereto (collectively "Software") is subject - to InvenSense and its licensors' intellectual property rights under U.S. and international copyright and - other intellectual property rights laws. - - InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software - and any use, reproduction, disclosure or distribution of the Software without an express license - agreement from InvenSense is strictly prohibited. -*/ - -/** \defgroup RingBuffer RingBuffer - \brief Macros to manage static circular buffer of any data type - \ingroup EmbUtils - \{ -*/ - -#ifndef _RING_BUFFER_H_ -#define _RING_BUFFER_H_ - -#include -#include - - -/** \brief Macro to declare a ring buffer - \param[in] type type of item contained in the ring buffer - \param[in] size number of items that can contain the ring buffer - To improve speed, size should be a power of 2 -*/ -#define RINGBUFFER_DECLARE(type, size) \ - struct { \ - uint16_t read, write; \ - type buffer[size]; \ - } - -/** \brief Macro to declare a volatile ring buffer, i.e. modified within an interrupt context - \param[in] type type of item contained in the ring buffer - \param[in] size number of items that can contain the ring buffer - To improve speed, size should be a power of 2 -*/ -#define RINGBUFFER_VOLATILE_DECLARE(type, size) \ - struct { \ - volatile uint16_t read, write; \ - volatile type buffer[size]; \ - } - -/** \brief Macro to declare a ring buffer - \param[in] name name of the circular buffer - \param[in] size number of items that can contain the ring buffer - To improve speed, size should be a power of 2 - \param[in] type type of item contained in the ring buffer -*/ -#define RINGBUFFER(name, size, type) RINGBUFFER_DECLARE(type, size) name - -/** \brief Macro to declare a volatile ring buffer, i.e. modified within an interrupt context - \param[in] name name of the circular buffer - \param[in] size number of items that can contain the ring buffer - To improve speed, size should be a power of 2 - \param[in] type type of item contained in the ring buffer -*/ -#define RINGBUFFER_VOLATILE(name, size, type) RINGBUFFER_VOLATILE_DECLARE(type, size) name - -/** \brief Macro to get maximum size of a ring buffer - \param[in] rb pointer to the ring buffer - \return maximum number of items that can contain the ringbuffer -*/ -#define RINGBUFFER_MAXSIZE(rb) (sizeof((rb)->buffer)/sizeof((rb)->buffer[0])) - -/** \brief Macro to get maximum size of a volatile ring buffer, i.e. modified within an interrupt context - \param[in] rb pointer to the ring buffer - \return maximum number of items that can contain the ringbuffer -*/ -#define RINGBUFFER_VOLATILE_MAXSIZE(rb) RINGBUFFER_MAXSIZE(rb) - -/** \brief Macro to get current size of a ring buffer - \param[in] rb pointer to the ring buffer - \return current number of items hold in the ringbuffer -*/ -#define RINGBUFFER_SIZE(rb) ((uint16_t)((rb)->write - (rb)->read)) - -static inline uint16_t get_ringbuffer_volatile_size(void * rb) -{ - struct { uint16_t read, write; } rb_var; - memcpy(&rb_var, rb, sizeof(rb_var)); - return (rb_var.write - rb_var.read); -} - -/** \brief Macro to get current size of a volatile ring buffer, i.e. modified within an interrupt context - \param[in] rb pointer to the ring buffer - \return current number of items hold in the ringbuffer - \warning it is advised to put this in a critical section -*/ -#define RINGBUFFER_VOLATILE_SIZE(rb) get_ringbuffer_volatile_size(rb) - -/** \brief Macro to check if a ring buffer is full - \param[in] rb pointer to the ring buffer - \return 1 if there is no slot left in the ring buffer, 0 otherwise -*/ -#define RINGBUFFER_FULL(rb) (RINGBUFFER_SIZE(rb) == RINGBUFFER_MAXSIZE(rb)) - -/** \brief Macro to check if a volatile ring buffer, i.e. modified within an interrupt context, is full - \param[in] rb pointer to the ring buffer - \return 1 if there is no slot left in the ring buffer, 0 otherwise - \warning it is advised to put this in a critical section -*/ -#define RINGBUFFER_VOLATILE_FULL(rb) (RINGBUFFER_VOLATILE_SIZE(rb) == RINGBUFFER_VOLATILE_MAXSIZE(rb)) - -/** \brief Macro to check if a ring buffer is empty - \param[in] rb pointer to the ring buffer - \return 1 if there is no item in the ring buffer, 0 otherwise -*/ -#define RINGBUFFER_EMPTY(rb) (RINGBUFFER_SIZE(rb) == 0) - -/** \brief Macro to check if a volatile ring buffer, i.e. modified within an interrupt context, is empty - \param[in] rb pointer to the ring buffer - \return 1 if there is no item in the ring buffer, 0 otherwise - \warning it is advised to put this in a critical section -*/ -#define RINGBUFFER_VOLATILE_EMPTY(rb) (RINGBUFFER_VOLATILE_SIZE(rb) == 0) - -/** \brief Macro to get number of available slot in a ring buffer - \param[in] rb pointer to the ring buffer - \return number of empty slot in the ring buffer -*/ -#define RINGBUFFER_AVAILABLE(rb) (RINGBUFFER_MAXSIZE(rb) - RINGBUFFER_SIZE(rb)) - -/** \brief Macro to get number of available slot in a volatile ring buffer, i.e. modified within an interrupt context - \param[in] rb pointer to the ring buffer - \return number of empty slot in the ring buffer - \warning it is advised to put this in a critical section -*/ -#define RINGBUFFER_VOLATILE_AVAILABLE(rb) (RINGBUFFER_VOLATILE_MAXSIZE(rb) - RINGBUFFER_VOLATILE_SIZE(rb)) - -/** \brief Macro to clear a ring buffer - \param[in] rb pointer to the ring buffer -*/ -#define RINGBUFFER_CLEAR(rb) \ - do { \ - (rb)->read = 0, (rb)->write = 0; \ - } while(0) - -/** \brief Macro to clear a volatile ring buffer, i.e. modified within an interrupt context - \param[in] rb pointer to the ring buffer - \warning it is advised to put this in a critical section -*/ -#define RINGBUFFER_VOLATILE_CLEAR(rb) RINGBUFFER_CLEAR(rb) - -/** \brief Push item by reference - \param[in] rb pointer to the ring buffer - \param[out] refData to available item slot - \warning There is no error checking done. -*/ -#define RINGBUFFER_PUSHREF(rb, refData) \ - do { \ - refData = &(rb)->buffer[(rb)->write % RINGBUFFER_MAXSIZE(rb)]; \ - ++(rb)->write; \ - } while(0) - -/** \brief Push item by reference - \param[in] rb pointer to the ring buffer - \param[out] refData to available item slot - \warning There is no error checking done. - \warning it is advised to put this in a critical section -*/ -#define RINGBUFFER_VOLATILE_PUSHREF(rb, refData) \ - do { \ - uint16_t wr_ptr = (rb)->write; \ - refData = &(rb)->buffer[wr_ptr % RINGBUFFER_VOLATILE_MAXSIZE(rb)]; \ - ++(rb)->write; \ - } while(0) - -/** \brief Return reference to next available slot - No push is performed - \param[in] rb pointer to the ring buffer - \param[out] refData to available item slot - \warning There is no error checking done. -*/ -#define RINGBUFFER_GETREFNEXT(rb, refData) \ - do { \ - refData = &(rb)->buffer[(rb)->write % RINGBUFFER_MAXSIZE(rb)]; \ - } while(0) - -/** \brief Return reference to next available slot - No push is performed - \param[in] rb pointer to the ring buffer - \param[out] refData to available item slot - \warning There is no error checking done. - \warning it is advised to put this in a critical section -*/ -#define RINGBUFFER_VOLATILE_GETREFNEXT(rb, refData) \ - do { \ - uint16_t wr_ptr = (rb)->write; \ - refData = &(rb)->buffer[wr_ptr % RINGBUFFER_VOLATILE_MAXSIZE(rb)]; \ - } while(0) - -/** \brief Increment write counter - Actually performed a push (assuming data were already copied) - \param[in] rb pointer to the ring buffer - \warning There is no error checking done. -*/ -#define RINGBUFFER_INCREMENT(rb, refData) \ - do { \ - ++(rb)->write; \ - } while(0) - -/** \brief Increment write counter - Actually performed a push (assuming data were already copied) - \param[in] rb pointer to the ring buffer - \warning There is no error checking done. - \warning it is advised to put this in a critical section -*/ -#define RINGBUFFER_VOLATILE_INCREMENT(rb, refData) \ - do { \ - ++(rb)->write; \ - } while(0) - -/** \brief Return reference to youngest item - \param[in] rb pointer to the ring buffer - \param[out] refData reference to youngest item - \warning There is no error checking done. -*/ -#define RINGBUFFER_BACK(rb, refData) \ - do { \ - refData = &(rb)->buffer[((rb)->write-1) % RINGBUFFER_MAXSIZE(rb)]; \ - } while(0) - -/** \brief Return reference to youngest item - \param[in] rb pointer to the ring buffer - \param[out] refData reference to youngest item - \warning There is no error checking done. - \warning it is advised to put this in a critical section -*/ -#define RINGBUFFER_VOLATILE_BACK(rb, refData) \ - do { \ - uint16_t wr_ptr = (rb)->write; \ - refData = &(rb)->buffer[(wr_ptr-1) % RINGBUFFER_VOLATILE_MAXSIZE(rb)]; \ - } while(0) - -/** \brief Macro to push an item to a ring buffer - \param[in] rb pointer to the ring buffer - \param[in] ptrData pointer to the item to push. - \warning There is no error checking done. - You must check for fullness before pushing data -*/ -#define RINGBUFFER_PUSH(rb, ptrData) \ - do { \ - (rb)->buffer[(rb)->write % RINGBUFFER_MAXSIZE(rb)] = *ptrData; \ - ++(rb)->write; \ - } while(0) - -/** \brief Macro to push an item to a volatile ring buffer - \param[in] rb pointer to the ring buffer - \param[in] ptrData pointer to the item to push. - \warning There is no error checking done. - You must check for fullness before pushing data - \warning it is advised to put this in a critical section -*/ -#define RINGBUFFER_VOLATILE_PUSH(rb, ptrData) \ - do { \ - uint16_t wr_ptr = (rb)->write; \ - (rb)->buffer[wr_ptr % RINGBUFFER_VOLATILE_MAXSIZE(rb)] = *ptrData; \ - ++(rb)->write; \ - } while(0) - -/** \brief Macro to unpush an item to a ring buffer - \param[in] rb pointer to the ring buffer - \param[in] ptrData pointer to placeholder to hold unpushed item - \warning There is no error checking done. - You must check for emptiness before pushing data -*/ -#define RINGBUFFER_UNPUSH(rb, ptrData) \ - do { \ - --(rb)->write; \ - *ptrData = (rb)->buffer[(rb)->write % RINGBUFFER_MAXSIZE(rb)]; \ - } while(0) - -/** \brief Macro to unpush an item to a volatile ring buffer - \param[in] rb pointer to the ring buffer - \param[in] ptrData pointer to placeholder to hold unpushed item - \warning There is no error checking done. - You must check for emptiness before pushing data - \warning it is advised to put this in a critical section -*/ -#define RINGBUFFER_VOLATILE_UNPUSH(rb, ptrData) \ - do { \ - --(rb)->write; \ - uint16_t wr_ptr = (rb)->write; \ - *ptrData = (rb)->buffer[wr_ptr % RINGBUFFER_VOLATILE_MAXSIZE(rb)]; \ - } while(0) - -/** \brief Return reference to oldest item - \param[in] rb pointer to the ring buffer - \param[out] refData reference to oldest item - \warning There is no error checking done. -*/ -#define RINGBUFFER_FRONT(rb, refData) \ - do { \ - refData = &(rb)->buffer[(rb)->read % RINGBUFFER_MAXSIZE(rb)]; \ - } while(0) - -/** \brief Return reference to oldest item - \param[in] rb pointer to the ring buffer - \param[out] refData reference to oldest item - \warning There is no error checking done. - \warning it is advised to put this in a critical section -*/ -#define RINGBUFFER_VOLATILE_FRONT(rb, refData) \ - do { \ - uint16_t rd_ptr = (rb)->read; \ - refData = &(rb)->buffer[rd_ptr % RINGBUFFER_VOLATILE_MAXSIZE(rb)]; \ - } while(0) - -/** \brief Macro to pop an item from a ring buffer - \param[in] rb pointer to the ring buffer - \param[out] ptrData pointer to placeholder to hold popped item - \warning There is no error checking done. - You must check for emptiness before popping data -*/ -#define RINGBUFFER_POP(rb, ptrData) \ - do { \ - *ptrData = (rb)->buffer[(rb)->read % RINGBUFFER_MAXSIZE(rb)]; \ - ++(rb)->read; \ - } while(0) - -/** \brief Macro to pop an item from a volatile ring buffer - \param[in] rb pointer to the ring buffer - \param[out] ptrData pointer to placeholder to hold popped item - \warning There is no error checking done. - You must check for emptiness before popping data - \warning it is advised to put this in a critical section -*/ -#define RINGBUFFER_VOLATILE_POP(rb, ptrData) \ - do { \ - uint16_t rd_ptr = (rb)->read; \ - *ptrData = (rb)->buffer[rd_ptr % RINGBUFFER_VOLATILE_MAXSIZE(rb)]; \ - ++(rb)->read; \ - } while(0) - -/** \brief Macro to pop an item from a ring buffer (data is not copied) - \param[in] rb pointer to the ring buffer - \warning There is no error checking done. - You must check for emptiness before popping data -*/ -#define RINGBUFFER_POPNLOSE(rb) \ - do { \ - ++(rb)->read; \ - } while(0) - -/** \brief Macro to pop an item from a volatile ring buffer (data is not copied) - \param[in] rb pointer to the ring buffer - \warning There is no error checking done. - You must check for emptiness before popping data - \warning it is advised to put this in a critical section -*/ -#define RINGBUFFER_VOLATILE_POPNLOSE(rb) \ - do { \ - ++(rb)->read; \ - } while(0) - -/** \brief Macro to unpop an item to a ring buffer - \param[in] rb pointer to the ring buffer - \param[out] ptrData pointer to to the item to unpop. - \warning There is no error checking done. - You must check for fullness before unpopping data -*/ -#define RINGBUFFER_UNPOP(rb, ptrData) \ - do { \ - --(rb)->read; \ - (rb)->buffer[(rb)->read % RINGBUFFER_MAXSIZE(rb)] = *ptrData; \ - } while(0) - -/** \brief Macro to unpop an item to a volatile ring buffer - \param[in] rb pointer to the ring buffer - \param[out] ptrData pointer to to the item to unpop. - \warning There is no error checking done. - You must check for fullness before unpopping data - \warning it is advised to put this in a critical section -*/ -#define RINGBUFFER_VOLATILE_UNPOP(rb, ptrData) \ - do { \ - --(rb)->read; \ - uint16_t rd_ptr = (rb)->read; \ - (rb)->buffer[rd_ptr % RINGBUFFER_VOLATILE_MAXSIZE(rb)] = *ptrData; \ - } while(0) - -#endif - -/** \} */ +/* + Copyright (c) 2014-2015 InvenSense Inc. Portions Copyright (c) 2014-2015 Movea. All rights reserved. + + This software, related documentation and any modifications thereto (collectively "Software") is subject + to InvenSense and its licensors' intellectual property rights under U.S. and international copyright and + other intellectual property rights laws. + + InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software + and any use, reproduction, disclosure or distribution of the Software without an express license + agreement from InvenSense is strictly prohibited. +*/ + +/** \defgroup RingBuffer RingBuffer + \brief Macros to manage static circular buffer of any data type + \ingroup EmbUtils + \{ +*/ + +#ifndef _RING_BUFFER_H_ +#define _RING_BUFFER_H_ + +#include +#include + + +/** \brief Macro to declare a ring buffer + \param[in] type type of item contained in the ring buffer + \param[in] size number of items that can contain the ring buffer + To improve speed, size should be a power of 2 +*/ +#define RINGBUFFER_DECLARE(type, size) \ + struct { \ + uint16_t read, write; \ + type buffer[size]; \ + } + +/** \brief Macro to declare a volatile ring buffer, i.e. modified within an interrupt context + \param[in] type type of item contained in the ring buffer + \param[in] size number of items that can contain the ring buffer + To improve speed, size should be a power of 2 +*/ +#define RINGBUFFER_VOLATILE_DECLARE(type, size) \ + struct { \ + volatile uint16_t read, write; \ + volatile type buffer[size]; \ + } + +/** \brief Macro to declare a ring buffer + \param[in] name name of the circular buffer + \param[in] size number of items that can contain the ring buffer + To improve speed, size should be a power of 2 + \param[in] type type of item contained in the ring buffer +*/ +#define RINGBUFFER(name, size, type) RINGBUFFER_DECLARE(type, size) name + +/** \brief Macro to declare a volatile ring buffer, i.e. modified within an interrupt context + \param[in] name name of the circular buffer + \param[in] size number of items that can contain the ring buffer + To improve speed, size should be a power of 2 + \param[in] type type of item contained in the ring buffer +*/ +#define RINGBUFFER_VOLATILE(name, size, type) RINGBUFFER_VOLATILE_DECLARE(type, size) name + +/** \brief Macro to get maximum size of a ring buffer + \param[in] rb pointer to the ring buffer + \return maximum number of items that can contain the ringbuffer +*/ +#define RINGBUFFER_MAXSIZE(rb) (sizeof((rb)->buffer)/sizeof((rb)->buffer[0])) + +/** \brief Macro to get maximum size of a volatile ring buffer, i.e. modified within an interrupt context + \param[in] rb pointer to the ring buffer + \return maximum number of items that can contain the ringbuffer +*/ +#define RINGBUFFER_VOLATILE_MAXSIZE(rb) RINGBUFFER_MAXSIZE(rb) + +/** \brief Macro to get current size of a ring buffer + \param[in] rb pointer to the ring buffer + \return current number of items hold in the ringbuffer +*/ +#define RINGBUFFER_SIZE(rb) ((uint16_t)((rb)->write - (rb)->read)) + +static inline uint16_t get_ringbuffer_volatile_size(void * rb) +{ + struct { uint16_t read, write; } rb_var; + memcpy(&rb_var, rb, sizeof(rb_var)); + return (rb_var.write - rb_var.read); +} + +/** \brief Macro to get current size of a volatile ring buffer, i.e. modified within an interrupt context + \param[in] rb pointer to the ring buffer + \return current number of items hold in the ringbuffer + \warning it is advised to put this in a critical section +*/ +#define RINGBUFFER_VOLATILE_SIZE(rb) get_ringbuffer_volatile_size(rb) + +/** \brief Macro to check if a ring buffer is full + \param[in] rb pointer to the ring buffer + \return 1 if there is no slot left in the ring buffer, 0 otherwise +*/ +#define RINGBUFFER_FULL(rb) (RINGBUFFER_SIZE(rb) == RINGBUFFER_MAXSIZE(rb)) + +/** \brief Macro to check if a volatile ring buffer, i.e. modified within an interrupt context, is full + \param[in] rb pointer to the ring buffer + \return 1 if there is no slot left in the ring buffer, 0 otherwise + \warning it is advised to put this in a critical section +*/ +#define RINGBUFFER_VOLATILE_FULL(rb) (RINGBUFFER_VOLATILE_SIZE(rb) == RINGBUFFER_VOLATILE_MAXSIZE(rb)) + +/** \brief Macro to check if a ring buffer is empty + \param[in] rb pointer to the ring buffer + \return 1 if there is no item in the ring buffer, 0 otherwise +*/ +#define RINGBUFFER_EMPTY(rb) (RINGBUFFER_SIZE(rb) == 0) + +/** \brief Macro to check if a volatile ring buffer, i.e. modified within an interrupt context, is empty + \param[in] rb pointer to the ring buffer + \return 1 if there is no item in the ring buffer, 0 otherwise + \warning it is advised to put this in a critical section +*/ +#define RINGBUFFER_VOLATILE_EMPTY(rb) (RINGBUFFER_VOLATILE_SIZE(rb) == 0) + +/** \brief Macro to get number of available slot in a ring buffer + \param[in] rb pointer to the ring buffer + \return number of empty slot in the ring buffer +*/ +#define RINGBUFFER_AVAILABLE(rb) (RINGBUFFER_MAXSIZE(rb) - RINGBUFFER_SIZE(rb)) + +/** \brief Macro to get number of available slot in a volatile ring buffer, i.e. modified within an interrupt context + \param[in] rb pointer to the ring buffer + \return number of empty slot in the ring buffer + \warning it is advised to put this in a critical section +*/ +#define RINGBUFFER_VOLATILE_AVAILABLE(rb) (RINGBUFFER_VOLATILE_MAXSIZE(rb) - RINGBUFFER_VOLATILE_SIZE(rb)) + +/** \brief Macro to clear a ring buffer + \param[in] rb pointer to the ring buffer +*/ +#define RINGBUFFER_CLEAR(rb) \ + do { \ + (rb)->read = 0, (rb)->write = 0; \ + } while(0) + +/** \brief Macro to clear a volatile ring buffer, i.e. modified within an interrupt context + \param[in] rb pointer to the ring buffer + \warning it is advised to put this in a critical section +*/ +#define RINGBUFFER_VOLATILE_CLEAR(rb) RINGBUFFER_CLEAR(rb) + +/** \brief Push item by reference + \param[in] rb pointer to the ring buffer + \param[out] refData to available item slot + \warning There is no error checking done. +*/ +#define RINGBUFFER_PUSHREF(rb, refData) \ + do { \ + refData = &(rb)->buffer[(rb)->write % RINGBUFFER_MAXSIZE(rb)]; \ + ++(rb)->write; \ + } while(0) + +/** \brief Push item by reference + \param[in] rb pointer to the ring buffer + \param[out] refData to available item slot + \warning There is no error checking done. + \warning it is advised to put this in a critical section +*/ +#define RINGBUFFER_VOLATILE_PUSHREF(rb, refData) \ + do { \ + uint16_t wr_ptr = (rb)->write; \ + refData = &(rb)->buffer[wr_ptr % RINGBUFFER_VOLATILE_MAXSIZE(rb)]; \ + ++(rb)->write; \ + } while(0) + +/** \brief Return reference to next available slot + No push is performed + \param[in] rb pointer to the ring buffer + \param[out] refData to available item slot + \warning There is no error checking done. +*/ +#define RINGBUFFER_GETREFNEXT(rb, refData) \ + do { \ + refData = &(rb)->buffer[(rb)->write % RINGBUFFER_MAXSIZE(rb)]; \ + } while(0) + +/** \brief Return reference to next available slot + No push is performed + \param[in] rb pointer to the ring buffer + \param[out] refData to available item slot + \warning There is no error checking done. + \warning it is advised to put this in a critical section +*/ +#define RINGBUFFER_VOLATILE_GETREFNEXT(rb, refData) \ + do { \ + uint16_t wr_ptr = (rb)->write; \ + refData = &(rb)->buffer[wr_ptr % RINGBUFFER_VOLATILE_MAXSIZE(rb)]; \ + } while(0) + +/** \brief Increment write counter + Actually performed a push (assuming data were already copied) + \param[in] rb pointer to the ring buffer + \warning There is no error checking done. +*/ +#define RINGBUFFER_INCREMENT(rb, refData) \ + do { \ + ++(rb)->write; \ + } while(0) + +/** \brief Increment write counter + Actually performed a push (assuming data were already copied) + \param[in] rb pointer to the ring buffer + \warning There is no error checking done. + \warning it is advised to put this in a critical section +*/ +#define RINGBUFFER_VOLATILE_INCREMENT(rb, refData) \ + do { \ + ++(rb)->write; \ + } while(0) + +/** \brief Return reference to youngest item + \param[in] rb pointer to the ring buffer + \param[out] refData reference to youngest item + \warning There is no error checking done. +*/ +#define RINGBUFFER_BACK(rb, refData) \ + do { \ + refData = &(rb)->buffer[((rb)->write-1) % RINGBUFFER_MAXSIZE(rb)]; \ + } while(0) + +/** \brief Return reference to youngest item + \param[in] rb pointer to the ring buffer + \param[out] refData reference to youngest item + \warning There is no error checking done. + \warning it is advised to put this in a critical section +*/ +#define RINGBUFFER_VOLATILE_BACK(rb, refData) \ + do { \ + uint16_t wr_ptr = (rb)->write; \ + refData = &(rb)->buffer[(wr_ptr-1) % RINGBUFFER_VOLATILE_MAXSIZE(rb)]; \ + } while(0) + +/** \brief Macro to push an item to a ring buffer + \param[in] rb pointer to the ring buffer + \param[in] ptrData pointer to the item to push. + \warning There is no error checking done. + You must check for fullness before pushing data +*/ +#define RINGBUFFER_PUSH(rb, ptrData) \ + do { \ + (rb)->buffer[(rb)->write % RINGBUFFER_MAXSIZE(rb)] = *ptrData; \ + ++(rb)->write; \ + } while(0) + +/** \brief Macro to push an item to a volatile ring buffer + \param[in] rb pointer to the ring buffer + \param[in] ptrData pointer to the item to push. + \warning There is no error checking done. + You must check for fullness before pushing data + \warning it is advised to put this in a critical section +*/ +#define RINGBUFFER_VOLATILE_PUSH(rb, ptrData) \ + do { \ + uint16_t wr_ptr = (rb)->write; \ + (rb)->buffer[wr_ptr % RINGBUFFER_VOLATILE_MAXSIZE(rb)] = *ptrData; \ + ++(rb)->write; \ + } while(0) + +/** \brief Macro to unpush an item to a ring buffer + \param[in] rb pointer to the ring buffer + \param[in] ptrData pointer to placeholder to hold unpushed item + \warning There is no error checking done. + You must check for emptiness before pushing data +*/ +#define RINGBUFFER_UNPUSH(rb, ptrData) \ + do { \ + --(rb)->write; \ + *ptrData = (rb)->buffer[(rb)->write % RINGBUFFER_MAXSIZE(rb)]; \ + } while(0) + +/** \brief Macro to unpush an item to a volatile ring buffer + \param[in] rb pointer to the ring buffer + \param[in] ptrData pointer to placeholder to hold unpushed item + \warning There is no error checking done. + You must check for emptiness before pushing data + \warning it is advised to put this in a critical section +*/ +#define RINGBUFFER_VOLATILE_UNPUSH(rb, ptrData) \ + do { \ + --(rb)->write; \ + uint16_t wr_ptr = (rb)->write; \ + *ptrData = (rb)->buffer[wr_ptr % RINGBUFFER_VOLATILE_MAXSIZE(rb)]; \ + } while(0) + +/** \brief Return reference to oldest item + \param[in] rb pointer to the ring buffer + \param[out] refData reference to oldest item + \warning There is no error checking done. +*/ +#define RINGBUFFER_FRONT(rb, refData) \ + do { \ + refData = &(rb)->buffer[(rb)->read % RINGBUFFER_MAXSIZE(rb)]; \ + } while(0) + +/** \brief Return reference to oldest item + \param[in] rb pointer to the ring buffer + \param[out] refData reference to oldest item + \warning There is no error checking done. + \warning it is advised to put this in a critical section +*/ +#define RINGBUFFER_VOLATILE_FRONT(rb, refData) \ + do { \ + uint16_t rd_ptr = (rb)->read; \ + refData = &(rb)->buffer[rd_ptr % RINGBUFFER_VOLATILE_MAXSIZE(rb)]; \ + } while(0) + +/** \brief Macro to pop an item from a ring buffer + \param[in] rb pointer to the ring buffer + \param[out] ptrData pointer to placeholder to hold popped item + \warning There is no error checking done. + You must check for emptiness before popping data +*/ +#define RINGBUFFER_POP(rb, ptrData) \ + do { \ + *ptrData = (rb)->buffer[(rb)->read % RINGBUFFER_MAXSIZE(rb)]; \ + ++(rb)->read; \ + } while(0) + +/** \brief Macro to pop an item from a volatile ring buffer + \param[in] rb pointer to the ring buffer + \param[out] ptrData pointer to placeholder to hold popped item + \warning There is no error checking done. + You must check for emptiness before popping data + \warning it is advised to put this in a critical section +*/ +#define RINGBUFFER_VOLATILE_POP(rb, ptrData) \ + do { \ + uint16_t rd_ptr = (rb)->read; \ + *ptrData = (rb)->buffer[rd_ptr % RINGBUFFER_VOLATILE_MAXSIZE(rb)]; \ + ++(rb)->read; \ + } while(0) + +/** \brief Macro to pop an item from a ring buffer (data is not copied) + \param[in] rb pointer to the ring buffer + \warning There is no error checking done. + You must check for emptiness before popping data +*/ +#define RINGBUFFER_POPNLOSE(rb) \ + do { \ + ++(rb)->read; \ + } while(0) + +/** \brief Macro to pop an item from a volatile ring buffer (data is not copied) + \param[in] rb pointer to the ring buffer + \warning There is no error checking done. + You must check for emptiness before popping data + \warning it is advised to put this in a critical section +*/ +#define RINGBUFFER_VOLATILE_POPNLOSE(rb) \ + do { \ + ++(rb)->read; \ + } while(0) + +/** \brief Macro to unpop an item to a ring buffer + \param[in] rb pointer to the ring buffer + \param[out] ptrData pointer to to the item to unpop. + \warning There is no error checking done. + You must check for fullness before unpopping data +*/ +#define RINGBUFFER_UNPOP(rb, ptrData) \ + do { \ + --(rb)->read; \ + (rb)->buffer[(rb)->read % RINGBUFFER_MAXSIZE(rb)] = *ptrData; \ + } while(0) + +/** \brief Macro to unpop an item to a volatile ring buffer + \param[in] rb pointer to the ring buffer + \param[out] ptrData pointer to to the item to unpop. + \warning There is no error checking done. + You must check for fullness before unpopping data + \warning it is advised to put this in a critical section +*/ +#define RINGBUFFER_VOLATILE_UNPOP(rb, ptrData) \ + do { \ + --(rb)->read; \ + uint16_t rd_ptr = (rb)->read; \ + (rb)->buffer[rd_ptr % RINGBUFFER_VOLATILE_MAXSIZE(rb)] = *ptrData; \ + } while(0) + +#endif + +/** \} */ diff --git a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/InvBool.h b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/InvBool.h similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/InvBool.h rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/InvBool.h index fe76061..875fd75 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/InvBool.h +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/InvBool.h @@ -1,47 +1,47 @@ -/* - * ________________________________________________________________________________________________________ - * Copyright (c) 2015-2015 InvenSense Inc. All rights reserved. - * - * This software, related documentation and any modifications thereto (collectively “Software”) is subject - * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright - * and other intellectual property rights laws. - * - * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software - * and any use, reproduction, disclosure or distribution of the Software without an express license agreement - * from InvenSense is strictly prohibited. - * - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS - * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED - * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL - * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY - * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, - * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE - * OF THE SOFTWARE. - * ________________________________________________________________________________________________________ - */ - -/** @brief Custom definition for boolean type to avoid compiler discrepancies - * @{ - */ - -#ifndef _INV_BOOL_H_ -#define _INV_BOOL_H_ - -typedef int inv_bool_t; - -#ifndef __cplusplus - -#ifndef true - #define true 1 -#endif - -#ifndef false - #define false 0 -#endif - -#endif /* __cplusplus */ - -#endif /* _INV_BOOL_H_ */ - -/** @} */ +/* + * ________________________________________________________________________________________________________ + * Copyright (c) 2015-2015 InvenSense Inc. All rights reserved. + * + * This software, related documentation and any modifications thereto (collectively “Software”) is subject + * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright + * and other intellectual property rights laws. + * + * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software + * and any use, reproduction, disclosure or distribution of the Software without an express license agreement + * from InvenSense is strictly prohibited. + * + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS + * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED + * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL + * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, + * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THE SOFTWARE. + * ________________________________________________________________________________________________________ + */ + +/** @brief Custom definition for boolean type to avoid compiler discrepancies + * @{ + */ + +#ifndef _INV_BOOL_H_ +#define _INV_BOOL_H_ + +typedef int inv_bool_t; + +#ifndef __cplusplus + +#ifndef true + #define true 1 +#endif + +#ifndef false + #define false 0 +#endif + +#endif /* __cplusplus */ + +#endif /* _INV_BOOL_H_ */ + +/** @} */ diff --git a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/InvError.h b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/InvError.h similarity index 98% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/InvError.h rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/InvError.h index c8534bc..4871463 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/InvError.h +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/InvError.h @@ -1,64 +1,64 @@ -/* - * ________________________________________________________________________________________________________ - * Copyright (c) 2015-2015 InvenSense Inc. All rights reserved. - * - * This software, related documentation and any modifications thereto (collectively “Software”) is subject - * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright - * and other intellectual property rights laws. - * - * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software - * and any use, reproduction, disclosure or distribution of the Software without an express license agreement - * from InvenSense is strictly prohibited. - * - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS - * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED - * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL - * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY - * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, - * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE - * OF THE SOFTWARE. - * ________________________________________________________________________________________________________ - */ - -/** @defgroup InvError Error code - * @brief Common error code - * - * @ingroup EmbUtils - * @{ - */ - -#ifndef _INV_ERROR_H_ -#define _INV_ERROR_H_ - -/** @brief Common error code definition - */ -enum inv_error -{ - INV_ERROR_SUCCESS = 0, /**< no error */ - INV_ERROR = -1, /**< unspecified error */ - INV_ERROR_NIMPL = -2, /**< function not implemented for given - arguments */ - INV_ERROR_TRANSPORT = -3, /**< error occurred at transport level */ - INV_ERROR_TIMEOUT = -4, /**< action did not complete in the expected - time window */ - INV_ERROR_SIZE = -5, /**< size/length of given arguments is not - suitable to complete requested action */ - INV_ERROR_OS = -6, /**< error related to OS */ - INV_ERROR_IO = -7, /**< error related to IO operation */ - INV_ERROR_MEM = -9, /**< not enough memory to complete requested - action */ - INV_ERROR_HW = -10, /**< error at HW level */ - INV_ERROR_BAD_ARG = -11, /**< provided arguments are not good to - perform requested action */ - INV_ERROR_UNEXPECTED = -12, /**< something unexpected happened */ - INV_ERROR_FILE = -13, /**< cannot access file or unexpected format */ - INV_ERROR_PATH = -14, /**< invalid file path */ - INV_ERROR_IMAGE_TYPE = -15, /**< error when image type is not managed */ - INV_ERROR_WATCHDOG = -16, /**< error when device doesn't respond - to ping */ -}; - -#endif /* _INV_ERROR_H_ */ - -/** @} */ +/* + * ________________________________________________________________________________________________________ + * Copyright (c) 2015-2015 InvenSense Inc. All rights reserved. + * + * This software, related documentation and any modifications thereto (collectively “Software”) is subject + * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright + * and other intellectual property rights laws. + * + * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software + * and any use, reproduction, disclosure or distribution of the Software without an express license agreement + * from InvenSense is strictly prohibited. + * + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS + * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED + * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL + * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, + * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THE SOFTWARE. + * ________________________________________________________________________________________________________ + */ + +/** @defgroup InvError Error code + * @brief Common error code + * + * @ingroup EmbUtils + * @{ + */ + +#ifndef _INV_ERROR_H_ +#define _INV_ERROR_H_ + +/** @brief Common error code definition + */ +enum inv_error +{ + INV_ERROR_SUCCESS = 0, /**< no error */ + INV_ERROR = -1, /**< unspecified error */ + INV_ERROR_NIMPL = -2, /**< function not implemented for given + arguments */ + INV_ERROR_TRANSPORT = -3, /**< error occurred at transport level */ + INV_ERROR_TIMEOUT = -4, /**< action did not complete in the expected + time window */ + INV_ERROR_SIZE = -5, /**< size/length of given arguments is not + suitable to complete requested action */ + INV_ERROR_OS = -6, /**< error related to OS */ + INV_ERROR_IO = -7, /**< error related to IO operation */ + INV_ERROR_MEM = -9, /**< not enough memory to complete requested + action */ + INV_ERROR_HW = -10, /**< error at HW level */ + INV_ERROR_BAD_ARG = -11, /**< provided arguments are not good to + perform requested action */ + INV_ERROR_UNEXPECTED = -12, /**< something unexpected happened */ + INV_ERROR_FILE = -13, /**< cannot access file or unexpected format */ + INV_ERROR_PATH = -14, /**< invalid file path */ + INV_ERROR_IMAGE_TYPE = -15, /**< error when image type is not managed */ + INV_ERROR_WATCHDOG = -16, /**< error when device doesn't respond + to ping */ +}; + +#endif /* _INV_ERROR_H_ */ + +/** @} */ diff --git a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/InvExport.h b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/InvExport.h similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/InvExport.h rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/InvExport.h index f1a6db6..a1a48c8 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/InvExport.h +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/InvExport.h @@ -1,39 +1,39 @@ -/* - * ________________________________________________________________________________________________________ - * Copyright (c) 2015-2015 InvenSense Inc. All rights reserved. - * - * This software, related documentation and any modifications thereto (collectively “Software”) is subject - * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright - * and other intellectual property rights laws. - * - * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software - * and any use, reproduction, disclosure or distribution of the Software without an express license agreement - * from InvenSense is strictly prohibited. - * - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS - * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED - * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL - * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY - * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, - * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE - * OF THE SOFTWARE. - * ________________________________________________________________________________________________________ - */ - -#ifndef _INV_IDD_EXPORT_H_ -#define _INV_IDD_EXPORT_H_ - -#if defined(_WIN32) - #if !defined(INV_EXPORT) && defined(INV_DO_DLL_EXPORT) - #define INV_EXPORT __declspec(dllexport) - #elif !defined(INV_EXPORT) && defined(INV_DO_DLL_IMPORT) - #define INV_EXPORT __declspec(dllimport) - #endif -#endif - -#if !defined(INV_EXPORT) - #define INV_EXPORT -#endif - -#endif /* _INV_IDD_EXPORT_H_ */ +/* + * ________________________________________________________________________________________________________ + * Copyright (c) 2015-2015 InvenSense Inc. All rights reserved. + * + * This software, related documentation and any modifications thereto (collectively “Software”) is subject + * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright + * and other intellectual property rights laws. + * + * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software + * and any use, reproduction, disclosure or distribution of the Software without an express license agreement + * from InvenSense is strictly prohibited. + * + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS + * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED + * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL + * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, + * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THE SOFTWARE. + * ________________________________________________________________________________________________________ + */ + +#ifndef _INV_IDD_EXPORT_H_ +#define _INV_IDD_EXPORT_H_ + +#if defined(_WIN32) + #if !defined(INV_EXPORT) && defined(INV_DO_DLL_EXPORT) + #define INV_EXPORT __declspec(dllexport) + #elif !defined(INV_EXPORT) && defined(INV_DO_DLL_IMPORT) + #define INV_EXPORT __declspec(dllimport) + #endif +#endif + +#if !defined(INV_EXPORT) + #define INV_EXPORT +#endif + +#endif /* _INV_IDD_EXPORT_H_ */ diff --git a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_apex.c b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_apex.c similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_apex.c rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_apex.c index 33bab38..e0c332f 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_apex.c +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_apex.c @@ -1,370 +1,370 @@ -/* - * ________________________________________________________________________________________________________ - * Copyright (c) 2017 InvenSense Inc. All rights reserved. - * - * This software, related documentation and any modifications thereto (collectively "Software") is subject - * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright - * and other intellectual property rights laws. - * - * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software - * and any use, reproduction, disclosure or distribution of the Software without an express license agreement - * from InvenSense is strictly prohibited. - * - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS - * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED - * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL - * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY - * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, - * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE - * OF THE SOFTWARE. - * ________________________________________________________________________________________________________ - */ - -#include "inv_imu_defs.h" -#include "inv_imu_extfunc.h" -#include "inv_imu_driver.h" -#include "inv_imu_apex.h" - -int inv_imu_apex_enable_ff(struct inv_imu_device *s) -{ - int status = 0; - uint8_t value; - - status |= inv_imu_start_dmp(s); - - status |= inv_imu_read_reg(s, APEX_CONFIG1, 1, &value); - value &= ~APEX_CONFIG1_FF_ENABLE_MASK; - value |= (uint8_t)APEX_CONFIG1_FF_ENABLE_EN; - status |= inv_imu_write_reg(s, APEX_CONFIG1, 1, &value); - - return status; -} - -int inv_imu_apex_disable_ff(struct inv_imu_device *s) -{ - int status = 0; - uint8_t value; - - status |= inv_imu_read_reg(s, APEX_CONFIG1, 1, &value); - value &= ~APEX_CONFIG1_FF_ENABLE_MASK; - value |= (uint8_t)APEX_CONFIG1_FF_ENABLE_DIS; - status |= inv_imu_write_reg(s, APEX_CONFIG1, 1, &value); - - return status; -} - -int inv_imu_apex_enable_smd(struct inv_imu_device *s) -{ - int status = 0; - uint8_t value; - - status |= inv_imu_start_dmp(s); - - status |= inv_imu_read_reg(s, APEX_CONFIG1, 1, &value); - value &= ~APEX_CONFIG1_SMD_ENABLE_MASK; - value |= (uint8_t)APEX_CONFIG1_SMD_ENABLE_EN; - status |= inv_imu_write_reg(s, APEX_CONFIG1, 1, &value); - - return status; -} - -int inv_imu_apex_disable_smd(struct inv_imu_device *s) -{ - int status = 0; - uint8_t value; - - status |= inv_imu_read_reg(s, APEX_CONFIG1, 1, &value); - value &= ~APEX_CONFIG1_SMD_ENABLE_MASK; - value |= (uint8_t)APEX_CONFIG1_SMD_ENABLE_DIS; - status |= inv_imu_write_reg(s, APEX_CONFIG1, 1, &value); - - return status; -} - -int inv_imu_apex_init_parameters_struct(struct inv_imu_device *s, inv_imu_apex_parameters_t *apex_inputs) -{ - int status = 0; - (void)s; - - /* Default parameters at POR */ - apex_inputs->pedo_amp_th = APEX_CONFIG3_PEDO_AMP_TH_62_MG; - apex_inputs->pedo_step_cnt_th = 0x5; - apex_inputs->pedo_step_det_th = 0x2; - apex_inputs->pedo_sb_timer_th = APEX_CONFIG4_PEDO_SB_TIMER_TH_150_SAMPLES; - apex_inputs->pedo_hi_enrgy_th = APEX_CONFIG4_PEDO_HI_ENRGY_TH_104_MG; - apex_inputs->tilt_wait_time = APEX_CONFIG5_TILT_WAIT_TIME_4_S; - apex_inputs->power_save_time = APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_8_S; - apex_inputs->power_save = APEX_CONFIG0_DMP_POWER_SAVE_EN; - apex_inputs->sensitivity_mode = APEX_CONFIG9_SENSITIVITY_MODE_NORMAL; - apex_inputs->low_energy_amp_th = APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_80_MG; - apex_inputs->smd_sensitivity = APEX_CONFIG9_SMD_SENSITIVITY_0; - apex_inputs->ff_debounce_duration = APEX_CONFIG9_FF_DEBOUNCE_DURATION_2000_MS; - apex_inputs->ff_max_duration_cm = APEX_CONFIG12_FF_MAX_DURATION_204_CM; - apex_inputs->ff_min_duration_cm = APEX_CONFIG12_FF_MIN_DURATION_10_CM; - apex_inputs->lowg_peak_th = APEX_CONFIG10_LOWG_PEAK_TH_563_MG; - apex_inputs->lowg_peak_hyst = APEX_CONFIG5_LOWG_PEAK_TH_HYST_156_MG; - apex_inputs->lowg_samples_th = APEX_CONFIG10_LOWG_TIME_TH_1_SAMPLE; - apex_inputs->highg_peak_th = APEX_CONFIG11_HIGHG_PEAK_TH_2500_MG; - apex_inputs->highg_peak_hyst = APEX_CONFIG5_HIGHG_PEAK_TH_HYST_156_MG; - apex_inputs->highg_samples_th = APEX_CONFIG11_HIGHG_TIME_TH_1_SAMPLE; - - return status; -} - -int inv_imu_apex_configure_parameters(struct inv_imu_device *s, const inv_imu_apex_parameters_t *apex_inputs) -{ - int status = 0; - uint8_t data; - uint8_t apexConfig[7]; - APEX_CONFIG1_PED_ENABLE_t pedo_state; - APEX_CONFIG1_TILT_ENABLE_t tilt_state; - APEX_CONFIG1_FF_ENABLE_t ff_state; - APEX_CONFIG1_SMD_ENABLE_t smd_state; - - /* DMP cannot be configured if it is running, hence make sure all APEX algorithms are off */ - status |= inv_imu_read_reg(s, APEX_CONFIG1, 1, &data); - pedo_state = (APEX_CONFIG1_PED_ENABLE_t)(data & APEX_CONFIG1_PED_ENABLE_MASK); - tilt_state = (APEX_CONFIG1_TILT_ENABLE_t)(data & APEX_CONFIG1_TILT_ENABLE_MASK); - ff_state = (APEX_CONFIG1_FF_ENABLE_t)(data & APEX_CONFIG1_FF_ENABLE_MASK); - smd_state = (APEX_CONFIG1_SMD_ENABLE_t)(data & APEX_CONFIG1_SMD_ENABLE_MASK); - if (pedo_state == APEX_CONFIG1_PED_ENABLE_EN) - return INV_ERROR; - if (tilt_state == APEX_CONFIG1_TILT_ENABLE_EN) - return INV_ERROR; - if (ff_state == APEX_CONFIG1_FF_ENABLE_EN) - return INV_ERROR; - if (smd_state == APEX_CONFIG1_SMD_ENABLE_EN) - return INV_ERROR; - - - status |= inv_imu_switch_on_mclk(s); - - /* Power Save mode and low energy amplitude threshold (for Pedometer in Slow Walk mode) */ - /* APEX_CONFIG2_MREG1 */ - apexConfig[0] = (uint8_t)apex_inputs->power_save_time - | (uint8_t)apex_inputs->low_energy_amp_th; - - /* Pedometer parameters */ - /* APEX_CONFIG3_MREG1 */ - apexConfig[1] = (uint8_t)apex_inputs->pedo_amp_th - | (apex_inputs->pedo_step_cnt_th & APEX_CONFIG3_PED_STEP_CNT_TH_SEL_MASK); - - /* APEX_CONFIG4_MREG1 */ - apexConfig[2] = ((apex_inputs->pedo_step_det_th << APEX_CONFIG4_PED_STEP_DET_TH_SEL_POS) - & APEX_CONFIG4_PED_STEP_DET_TH_SEL_MASK) - | (uint8_t)apex_inputs->pedo_sb_timer_th - | (uint8_t)apex_inputs->pedo_hi_enrgy_th; - - /* Tilt, Lowg and highg parameters */ - /* APEX_CONFIG5_MREG1 */ - apexConfig[3] = (uint8_t)apex_inputs->tilt_wait_time - | (uint8_t)apex_inputs->lowg_peak_hyst - | (uint8_t)apex_inputs->highg_peak_hyst; - - status |= inv_imu_write_reg(s, APEX_CONFIG2_MREG1, 4, &apexConfig[0]); - - - /* APEX_CONFIG0 */ - status |= inv_imu_read_reg(s, APEX_CONFIG0, 1, &apexConfig[0]); - apexConfig[0] &= ~APEX_CONFIG0_DMP_POWER_SAVE_EN_MASK; - apexConfig[0] |= apex_inputs->power_save; - status |= inv_imu_write_reg(s, APEX_CONFIG0, 1, &apexConfig[0]); - - /* free fall parameter, SMD parameter and parameters for Pedometer in Slow Walk mode */ - /* APEX_CONFIG9_MREG1 */ - apexConfig[0] = (uint8_t)apex_inputs->ff_debounce_duration - | (uint8_t)apex_inputs->smd_sensitivity - | (uint8_t)apex_inputs->sensitivity_mode; - - /* Lowg and highg parameters and free fall parameters */ - /* APEX_CONFIG10_MREG1 */ - apexConfig[1] = (uint8_t)apex_inputs->lowg_peak_th - | (uint8_t)apex_inputs->lowg_samples_th; - - /* APEX_CONFIG11_MREG1 */ - apexConfig[2] = (uint8_t)apex_inputs->highg_peak_th - | (uint8_t)apex_inputs->highg_samples_th; - - status |= inv_imu_write_reg(s, APEX_CONFIG9_MREG1, 3, &apexConfig[0]); - - - /* APEX_CONFIG12_MREG1 */ - apexConfig[0] = (uint8_t)apex_inputs->ff_max_duration_cm - | (uint8_t)apex_inputs->ff_min_duration_cm; - - status |= inv_imu_write_reg(s, APEX_CONFIG12_MREG1, 1, &apexConfig[0]); - - status |= inv_imu_switch_off_mclk(s); - - return status; -} - -int inv_imu_apex_get_parameters(struct inv_imu_device *s, inv_imu_apex_parameters_t *apex_params) -{ - int status = 0; - uint8_t data[7]; - uint8_t value; - - status |= inv_imu_read_reg(s, APEX_CONFIG0, 1, &value); - apex_params->power_save = (APEX_CONFIG0_DMP_POWER_SAVE_t)(value & APEX_CONFIG0_DMP_POWER_SAVE_EN_MASK); - - /* Access continuous config registers (CONFIG2-CONFIG11) */ - status |= inv_imu_read_reg(s, APEX_CONFIG2_MREG1, sizeof(data), &data[0]); - - /* Get params from apex_config2 : dmp_power_save_time and low_energy_amp_th */ - apex_params->power_save_time = (APEX_CONFIG2_DMP_POWER_SAVE_TIME_t) - (data[0] & APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_MASK); - apex_params->low_energy_amp_th = (APEX_CONFIG2_LOW_ENERGY_AMP_TH_t) - (data[0] & APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_MASK); - - /* Get params from apex_config3 : pedo_amp_th and pedo_step_cnt_th */ - apex_params->pedo_amp_th = (APEX_CONFIG3_PEDO_AMP_TH_t) - (data[1] & APEX_CONFIG3_PED_AMP_TH_SEL_MASK); - apex_params->pedo_step_cnt_th = (data[1] & APEX_CONFIG3_PED_STEP_CNT_TH_SEL_MASK) - >> APEX_CONFIG3_PED_STEP_CNT_TH_SEL_POS; - - /* Get params from apex_config4 : pedo_step_det_th, pedo_sb_timer_th and pedo_hi_enrgy_th */ - apex_params->pedo_step_det_th = (data[2] & APEX_CONFIG4_PED_STEP_DET_TH_SEL_MASK) - >> APEX_CONFIG4_PED_STEP_DET_TH_SEL_POS; - apex_params->pedo_sb_timer_th = (APEX_CONFIG4_PEDO_SB_TIMER_TH_t) - (data[2] & APEX_CONFIG4_PED_SB_TIMER_TH_SEL_MASK); - apex_params->pedo_hi_enrgy_th = (APEX_CONFIG4_PEDO_HI_ENRGY_TH_t) - (data[2] & APEX_CONFIG4_PED_HI_EN_TH_SEL_MASK); - - /* Get params from apex_config5 : tilt_wait_time, lowg_peak_hyst and highg_peak_hyst */ - apex_params->tilt_wait_time = (APEX_CONFIG5_TILT_WAIT_TIME_t) - (data[3] & APEX_CONFIG5_TILT_WAIT_TIME_SEL_MASK); - apex_params->lowg_peak_hyst = (APEX_CONFIG5_LOWG_PEAK_TH_HYST_t) - (data[3] & APEX_CONFIG5_LOWG_PEAK_TH_HYST_SEL_MASK); - apex_params->highg_peak_hyst = (APEX_CONFIG5_HIGHG_PEAK_TH_HYST_t) - (data[3] & APEX_CONFIG5_HIGHG_PEAK_TH_HYST_SEL_MASK); - - /* Get params from apex_config9 : ff_debounce_duration, smd_sensitivity and sensitivity_mode */ - apex_params->ff_debounce_duration = (APEX_CONFIG9_FF_DEBOUNCE_DURATION_t) - (data[4] & APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_MASK); - apex_params->smd_sensitivity = (APEX_CONFIG9_SMD_SENSITIVITY_t) - (data[4] & APEX_CONFIG9_SMD_SENSITIVITY_SEL_MASK); - apex_params->sensitivity_mode = (APEX_CONFIG9_SENSITIVITY_MODE_t) - (data[4] & APEX_CONFIG9_SENSITIVITY_MODE_MASK); - - /* Get params from apex_config10 : lowg_peak_th and lowg_samples_th */ - apex_params->lowg_peak_th = (APEX_CONFIG10_LOWG_PEAK_TH_t) - (data[5] & APEX_CONFIG10_LOWG_PEAK_TH_SEL_MASK); - apex_params->lowg_samples_th = (APEX_CONFIG10_LOWG_TIME_TH_SAMPLES_t) - (data[5] & APEX_CONFIG10_LOWG_TIME_TH_SEL_MASK); - - /* Get params from apex_config11 : highg_peak_th and highg_samples_th */ - apex_params->highg_peak_th = (APEX_CONFIG11_HIGHG_PEAK_TH_t) - (data[6] & APEX_CONFIG11_HIGHG_PEAK_TH_SEL_MASK); - apex_params->highg_samples_th = (APEX_CONFIG11_HIGHG_TIME_TH_SAMPLES_t) - (data[6] & APEX_CONFIG11_HIGHG_TIME_TH_SEL_MASK); - - /* Access apex reg 12 */ - status |= inv_imu_read_reg(s, APEX_CONFIG12_MREG1, 1, &data[0]); - - /* Get params from apex_config12 : ff_max_duration_cm and ff_min_duration_cm */ - apex_params->ff_max_duration_cm = (APEX_CONFIG12_FF_MAX_DURATION_t) - (data[0] & APEX_CONFIG12_FF_MAX_DURATION_SEL_MASK); - apex_params->ff_min_duration_cm = (APEX_CONFIG12_FF_MIN_DURATION_t) - (data[0] & APEX_CONFIG12_FF_MIN_DURATION_SEL_MASK); - - return status; -} - -int inv_imu_apex_set_frequency(struct inv_imu_device *s, const APEX_CONFIG1_DMP_ODR_t frequency) -{ - uint8_t value; - int status = 0; - - status |= inv_imu_read_reg(s, APEX_CONFIG1, 1, &value); - - value &= ~APEX_CONFIG1_DMP_ODR_MASK; - value |= frequency; - - status |= inv_imu_write_reg(s, APEX_CONFIG1, 1, &value); - return status; -} - -int inv_imu_apex_enable_pedometer(struct inv_imu_device *s) -{ - int status = 0; - uint8_t value; - - status |= inv_imu_start_dmp(s); - - /* Enable Pedometer */ - status |= inv_imu_read_reg(s, APEX_CONFIG1, 1, &value); - value &= ~APEX_CONFIG1_PED_ENABLE_MASK; - value |= (uint8_t)APEX_CONFIG1_PED_ENABLE_EN; - status |= inv_imu_write_reg(s, APEX_CONFIG1, 1, &value); - - return status; -} - -int inv_imu_apex_disable_pedometer(struct inv_imu_device *s) -{ - int status = 0; - uint8_t value; - - /* Disable Pedometer */ - status |= inv_imu_read_reg(s, APEX_CONFIG1, 1, &value); - value &= ~APEX_CONFIG1_PED_ENABLE_MASK; - value |= (uint8_t)APEX_CONFIG1_PED_ENABLE_DIS; - status |= inv_imu_write_reg(s, APEX_CONFIG1, 1, &value); - - return status; -} - -int inv_imu_apex_enable_tilt(struct inv_imu_device *s) -{ - int status = 0; - uint8_t value; - - status |= inv_imu_start_dmp(s); - - /* Enable Tilt */ - status |= inv_imu_read_reg(s, APEX_CONFIG1, 1, &value); - value &= ~APEX_CONFIG1_TILT_ENABLE_MASK; - value |= (uint8_t)APEX_CONFIG1_TILT_ENABLE_EN; - status |= inv_imu_write_reg(s, APEX_CONFIG1, 1, &value); - - return status; -} - -int inv_imu_apex_disable_tilt(struct inv_imu_device *s) -{ - int status = 0; - uint8_t value; - - /* Disable Tilt */ - status |= inv_imu_read_reg(s, APEX_CONFIG1, 1, &value); - value &= ~APEX_CONFIG1_TILT_ENABLE_MASK; - value |= (uint8_t)APEX_CONFIG1_TILT_ENABLE_DIS; - status |= inv_imu_write_reg(s, APEX_CONFIG1, 1, &value); - - return status; -} - -int inv_imu_apex_get_data_activity(struct inv_imu_device *s, inv_imu_apex_step_activity_t *apex_activity) -{ - uint8_t data[4]; - int status = inv_imu_read_reg(s, APEX_DATA0, 4, data); - - apex_activity->step_cnt = data[1] << 8 | data[0]; - apex_activity->step_cadence = data[2]; - apex_activity->activity_class = data[3] & APEX_DATA3_ACTIVITY_CLASS_MASK; - - return status; -} - -int inv_imu_apex_get_data_free_fall(struct inv_imu_device *s, uint16_t *freefall_duration) -{ - uint8_t data[2]; - int status = inv_imu_read_reg(s, APEX_DATA4, 2, &data[0]); - - *freefall_duration = (data[1] << 8) | data[0]; - - return status; -} - +/* + * ________________________________________________________________________________________________________ + * Copyright (c) 2017 InvenSense Inc. All rights reserved. + * + * This software, related documentation and any modifications thereto (collectively "Software") is subject + * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright + * and other intellectual property rights laws. + * + * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software + * and any use, reproduction, disclosure or distribution of the Software without an express license agreement + * from InvenSense is strictly prohibited. + * + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS + * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED + * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL + * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, + * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THE SOFTWARE. + * ________________________________________________________________________________________________________ + */ + +#include "inv_imu_defs.h" +#include "inv_imu_extfunc.h" +#include "inv_imu_driver.h" +#include "inv_imu_apex.h" + +int inv_imu_apex_enable_ff(struct inv_imu_device *s) +{ + int status = 0; + uint8_t value; + + status |= inv_imu_start_dmp(s); + + status |= inv_imu_read_reg(s, APEX_CONFIG1, 1, &value); + value &= ~APEX_CONFIG1_FF_ENABLE_MASK; + value |= (uint8_t)APEX_CONFIG1_FF_ENABLE_EN; + status |= inv_imu_write_reg(s, APEX_CONFIG1, 1, &value); + + return status; +} + +int inv_imu_apex_disable_ff(struct inv_imu_device *s) +{ + int status = 0; + uint8_t value; + + status |= inv_imu_read_reg(s, APEX_CONFIG1, 1, &value); + value &= ~APEX_CONFIG1_FF_ENABLE_MASK; + value |= (uint8_t)APEX_CONFIG1_FF_ENABLE_DIS; + status |= inv_imu_write_reg(s, APEX_CONFIG1, 1, &value); + + return status; +} + +int inv_imu_apex_enable_smd(struct inv_imu_device *s) +{ + int status = 0; + uint8_t value; + + status |= inv_imu_start_dmp(s); + + status |= inv_imu_read_reg(s, APEX_CONFIG1, 1, &value); + value &= ~APEX_CONFIG1_SMD_ENABLE_MASK; + value |= (uint8_t)APEX_CONFIG1_SMD_ENABLE_EN; + status |= inv_imu_write_reg(s, APEX_CONFIG1, 1, &value); + + return status; +} + +int inv_imu_apex_disable_smd(struct inv_imu_device *s) +{ + int status = 0; + uint8_t value; + + status |= inv_imu_read_reg(s, APEX_CONFIG1, 1, &value); + value &= ~APEX_CONFIG1_SMD_ENABLE_MASK; + value |= (uint8_t)APEX_CONFIG1_SMD_ENABLE_DIS; + status |= inv_imu_write_reg(s, APEX_CONFIG1, 1, &value); + + return status; +} + +int inv_imu_apex_init_parameters_struct(struct inv_imu_device *s, inv_imu_apex_parameters_t *apex_inputs) +{ + int status = 0; + (void)s; + + /* Default parameters at POR */ + apex_inputs->pedo_amp_th = APEX_CONFIG3_PEDO_AMP_TH_62_MG; + apex_inputs->pedo_step_cnt_th = 0x5; + apex_inputs->pedo_step_det_th = 0x2; + apex_inputs->pedo_sb_timer_th = APEX_CONFIG4_PEDO_SB_TIMER_TH_150_SAMPLES; + apex_inputs->pedo_hi_enrgy_th = APEX_CONFIG4_PEDO_HI_ENRGY_TH_104_MG; + apex_inputs->tilt_wait_time = APEX_CONFIG5_TILT_WAIT_TIME_4_S; + apex_inputs->power_save_time = APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_8_S; + apex_inputs->power_save = APEX_CONFIG0_DMP_POWER_SAVE_EN; + apex_inputs->sensitivity_mode = APEX_CONFIG9_SENSITIVITY_MODE_NORMAL; + apex_inputs->low_energy_amp_th = APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_80_MG; + apex_inputs->smd_sensitivity = APEX_CONFIG9_SMD_SENSITIVITY_0; + apex_inputs->ff_debounce_duration = APEX_CONFIG9_FF_DEBOUNCE_DURATION_2000_MS; + apex_inputs->ff_max_duration_cm = APEX_CONFIG12_FF_MAX_DURATION_204_CM; + apex_inputs->ff_min_duration_cm = APEX_CONFIG12_FF_MIN_DURATION_10_CM; + apex_inputs->lowg_peak_th = APEX_CONFIG10_LOWG_PEAK_TH_563_MG; + apex_inputs->lowg_peak_hyst = APEX_CONFIG5_LOWG_PEAK_TH_HYST_156_MG; + apex_inputs->lowg_samples_th = APEX_CONFIG10_LOWG_TIME_TH_1_SAMPLE; + apex_inputs->highg_peak_th = APEX_CONFIG11_HIGHG_PEAK_TH_2500_MG; + apex_inputs->highg_peak_hyst = APEX_CONFIG5_HIGHG_PEAK_TH_HYST_156_MG; + apex_inputs->highg_samples_th = APEX_CONFIG11_HIGHG_TIME_TH_1_SAMPLE; + + return status; +} + +int inv_imu_apex_configure_parameters(struct inv_imu_device *s, const inv_imu_apex_parameters_t *apex_inputs) +{ + int status = 0; + uint8_t data; + uint8_t apexConfig[7]; + APEX_CONFIG1_PED_ENABLE_t pedo_state; + APEX_CONFIG1_TILT_ENABLE_t tilt_state; + APEX_CONFIG1_FF_ENABLE_t ff_state; + APEX_CONFIG1_SMD_ENABLE_t smd_state; + + /* DMP cannot be configured if it is running, hence make sure all APEX algorithms are off */ + status |= inv_imu_read_reg(s, APEX_CONFIG1, 1, &data); + pedo_state = (APEX_CONFIG1_PED_ENABLE_t)(data & APEX_CONFIG1_PED_ENABLE_MASK); + tilt_state = (APEX_CONFIG1_TILT_ENABLE_t)(data & APEX_CONFIG1_TILT_ENABLE_MASK); + ff_state = (APEX_CONFIG1_FF_ENABLE_t)(data & APEX_CONFIG1_FF_ENABLE_MASK); + smd_state = (APEX_CONFIG1_SMD_ENABLE_t)(data & APEX_CONFIG1_SMD_ENABLE_MASK); + if (pedo_state == APEX_CONFIG1_PED_ENABLE_EN) + return INV_ERROR; + if (tilt_state == APEX_CONFIG1_TILT_ENABLE_EN) + return INV_ERROR; + if (ff_state == APEX_CONFIG1_FF_ENABLE_EN) + return INV_ERROR; + if (smd_state == APEX_CONFIG1_SMD_ENABLE_EN) + return INV_ERROR; + + + status |= inv_imu_switch_on_mclk(s); + + /* Power Save mode and low energy amplitude threshold (for Pedometer in Slow Walk mode) */ + /* APEX_CONFIG2_MREG1 */ + apexConfig[0] = (uint8_t)apex_inputs->power_save_time + | (uint8_t)apex_inputs->low_energy_amp_th; + + /* Pedometer parameters */ + /* APEX_CONFIG3_MREG1 */ + apexConfig[1] = (uint8_t)apex_inputs->pedo_amp_th + | (apex_inputs->pedo_step_cnt_th & APEX_CONFIG3_PED_STEP_CNT_TH_SEL_MASK); + + /* APEX_CONFIG4_MREG1 */ + apexConfig[2] = ((apex_inputs->pedo_step_det_th << APEX_CONFIG4_PED_STEP_DET_TH_SEL_POS) + & APEX_CONFIG4_PED_STEP_DET_TH_SEL_MASK) + | (uint8_t)apex_inputs->pedo_sb_timer_th + | (uint8_t)apex_inputs->pedo_hi_enrgy_th; + + /* Tilt, Lowg and highg parameters */ + /* APEX_CONFIG5_MREG1 */ + apexConfig[3] = (uint8_t)apex_inputs->tilt_wait_time + | (uint8_t)apex_inputs->lowg_peak_hyst + | (uint8_t)apex_inputs->highg_peak_hyst; + + status |= inv_imu_write_reg(s, APEX_CONFIG2_MREG1, 4, &apexConfig[0]); + + + /* APEX_CONFIG0 */ + status |= inv_imu_read_reg(s, APEX_CONFIG0, 1, &apexConfig[0]); + apexConfig[0] &= ~APEX_CONFIG0_DMP_POWER_SAVE_EN_MASK; + apexConfig[0] |= apex_inputs->power_save; + status |= inv_imu_write_reg(s, APEX_CONFIG0, 1, &apexConfig[0]); + + /* free fall parameter, SMD parameter and parameters for Pedometer in Slow Walk mode */ + /* APEX_CONFIG9_MREG1 */ + apexConfig[0] = (uint8_t)apex_inputs->ff_debounce_duration + | (uint8_t)apex_inputs->smd_sensitivity + | (uint8_t)apex_inputs->sensitivity_mode; + + /* Lowg and highg parameters and free fall parameters */ + /* APEX_CONFIG10_MREG1 */ + apexConfig[1] = (uint8_t)apex_inputs->lowg_peak_th + | (uint8_t)apex_inputs->lowg_samples_th; + + /* APEX_CONFIG11_MREG1 */ + apexConfig[2] = (uint8_t)apex_inputs->highg_peak_th + | (uint8_t)apex_inputs->highg_samples_th; + + status |= inv_imu_write_reg(s, APEX_CONFIG9_MREG1, 3, &apexConfig[0]); + + + /* APEX_CONFIG12_MREG1 */ + apexConfig[0] = (uint8_t)apex_inputs->ff_max_duration_cm + | (uint8_t)apex_inputs->ff_min_duration_cm; + + status |= inv_imu_write_reg(s, APEX_CONFIG12_MREG1, 1, &apexConfig[0]); + + status |= inv_imu_switch_off_mclk(s); + + return status; +} + +int inv_imu_apex_get_parameters(struct inv_imu_device *s, inv_imu_apex_parameters_t *apex_params) +{ + int status = 0; + uint8_t data[7]; + uint8_t value; + + status |= inv_imu_read_reg(s, APEX_CONFIG0, 1, &value); + apex_params->power_save = (APEX_CONFIG0_DMP_POWER_SAVE_t)(value & APEX_CONFIG0_DMP_POWER_SAVE_EN_MASK); + + /* Access continuous config registers (CONFIG2-CONFIG11) */ + status |= inv_imu_read_reg(s, APEX_CONFIG2_MREG1, sizeof(data), &data[0]); + + /* Get params from apex_config2 : dmp_power_save_time and low_energy_amp_th */ + apex_params->power_save_time = (APEX_CONFIG2_DMP_POWER_SAVE_TIME_t) + (data[0] & APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_MASK); + apex_params->low_energy_amp_th = (APEX_CONFIG2_LOW_ENERGY_AMP_TH_t) + (data[0] & APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_MASK); + + /* Get params from apex_config3 : pedo_amp_th and pedo_step_cnt_th */ + apex_params->pedo_amp_th = (APEX_CONFIG3_PEDO_AMP_TH_t) + (data[1] & APEX_CONFIG3_PED_AMP_TH_SEL_MASK); + apex_params->pedo_step_cnt_th = (data[1] & APEX_CONFIG3_PED_STEP_CNT_TH_SEL_MASK) + >> APEX_CONFIG3_PED_STEP_CNT_TH_SEL_POS; + + /* Get params from apex_config4 : pedo_step_det_th, pedo_sb_timer_th and pedo_hi_enrgy_th */ + apex_params->pedo_step_det_th = (data[2] & APEX_CONFIG4_PED_STEP_DET_TH_SEL_MASK) + >> APEX_CONFIG4_PED_STEP_DET_TH_SEL_POS; + apex_params->pedo_sb_timer_th = (APEX_CONFIG4_PEDO_SB_TIMER_TH_t) + (data[2] & APEX_CONFIG4_PED_SB_TIMER_TH_SEL_MASK); + apex_params->pedo_hi_enrgy_th = (APEX_CONFIG4_PEDO_HI_ENRGY_TH_t) + (data[2] & APEX_CONFIG4_PED_HI_EN_TH_SEL_MASK); + + /* Get params from apex_config5 : tilt_wait_time, lowg_peak_hyst and highg_peak_hyst */ + apex_params->tilt_wait_time = (APEX_CONFIG5_TILT_WAIT_TIME_t) + (data[3] & APEX_CONFIG5_TILT_WAIT_TIME_SEL_MASK); + apex_params->lowg_peak_hyst = (APEX_CONFIG5_LOWG_PEAK_TH_HYST_t) + (data[3] & APEX_CONFIG5_LOWG_PEAK_TH_HYST_SEL_MASK); + apex_params->highg_peak_hyst = (APEX_CONFIG5_HIGHG_PEAK_TH_HYST_t) + (data[3] & APEX_CONFIG5_HIGHG_PEAK_TH_HYST_SEL_MASK); + + /* Get params from apex_config9 : ff_debounce_duration, smd_sensitivity and sensitivity_mode */ + apex_params->ff_debounce_duration = (APEX_CONFIG9_FF_DEBOUNCE_DURATION_t) + (data[4] & APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_MASK); + apex_params->smd_sensitivity = (APEX_CONFIG9_SMD_SENSITIVITY_t) + (data[4] & APEX_CONFIG9_SMD_SENSITIVITY_SEL_MASK); + apex_params->sensitivity_mode = (APEX_CONFIG9_SENSITIVITY_MODE_t) + (data[4] & APEX_CONFIG9_SENSITIVITY_MODE_MASK); + + /* Get params from apex_config10 : lowg_peak_th and lowg_samples_th */ + apex_params->lowg_peak_th = (APEX_CONFIG10_LOWG_PEAK_TH_t) + (data[5] & APEX_CONFIG10_LOWG_PEAK_TH_SEL_MASK); + apex_params->lowg_samples_th = (APEX_CONFIG10_LOWG_TIME_TH_SAMPLES_t) + (data[5] & APEX_CONFIG10_LOWG_TIME_TH_SEL_MASK); + + /* Get params from apex_config11 : highg_peak_th and highg_samples_th */ + apex_params->highg_peak_th = (APEX_CONFIG11_HIGHG_PEAK_TH_t) + (data[6] & APEX_CONFIG11_HIGHG_PEAK_TH_SEL_MASK); + apex_params->highg_samples_th = (APEX_CONFIG11_HIGHG_TIME_TH_SAMPLES_t) + (data[6] & APEX_CONFIG11_HIGHG_TIME_TH_SEL_MASK); + + /* Access apex reg 12 */ + status |= inv_imu_read_reg(s, APEX_CONFIG12_MREG1, 1, &data[0]); + + /* Get params from apex_config12 : ff_max_duration_cm and ff_min_duration_cm */ + apex_params->ff_max_duration_cm = (APEX_CONFIG12_FF_MAX_DURATION_t) + (data[0] & APEX_CONFIG12_FF_MAX_DURATION_SEL_MASK); + apex_params->ff_min_duration_cm = (APEX_CONFIG12_FF_MIN_DURATION_t) + (data[0] & APEX_CONFIG12_FF_MIN_DURATION_SEL_MASK); + + return status; +} + +int inv_imu_apex_set_frequency(struct inv_imu_device *s, const APEX_CONFIG1_DMP_ODR_t frequency) +{ + uint8_t value; + int status = 0; + + status |= inv_imu_read_reg(s, APEX_CONFIG1, 1, &value); + + value &= ~APEX_CONFIG1_DMP_ODR_MASK; + value |= frequency; + + status |= inv_imu_write_reg(s, APEX_CONFIG1, 1, &value); + return status; +} + +int inv_imu_apex_enable_pedometer(struct inv_imu_device *s) +{ + int status = 0; + uint8_t value; + + status |= inv_imu_start_dmp(s); + + /* Enable Pedometer */ + status |= inv_imu_read_reg(s, APEX_CONFIG1, 1, &value); + value &= ~APEX_CONFIG1_PED_ENABLE_MASK; + value |= (uint8_t)APEX_CONFIG1_PED_ENABLE_EN; + status |= inv_imu_write_reg(s, APEX_CONFIG1, 1, &value); + + return status; +} + +int inv_imu_apex_disable_pedometer(struct inv_imu_device *s) +{ + int status = 0; + uint8_t value; + + /* Disable Pedometer */ + status |= inv_imu_read_reg(s, APEX_CONFIG1, 1, &value); + value &= ~APEX_CONFIG1_PED_ENABLE_MASK; + value |= (uint8_t)APEX_CONFIG1_PED_ENABLE_DIS; + status |= inv_imu_write_reg(s, APEX_CONFIG1, 1, &value); + + return status; +} + +int inv_imu_apex_enable_tilt(struct inv_imu_device *s) +{ + int status = 0; + uint8_t value; + + status |= inv_imu_start_dmp(s); + + /* Enable Tilt */ + status |= inv_imu_read_reg(s, APEX_CONFIG1, 1, &value); + value &= ~APEX_CONFIG1_TILT_ENABLE_MASK; + value |= (uint8_t)APEX_CONFIG1_TILT_ENABLE_EN; + status |= inv_imu_write_reg(s, APEX_CONFIG1, 1, &value); + + return status; +} + +int inv_imu_apex_disable_tilt(struct inv_imu_device *s) +{ + int status = 0; + uint8_t value; + + /* Disable Tilt */ + status |= inv_imu_read_reg(s, APEX_CONFIG1, 1, &value); + value &= ~APEX_CONFIG1_TILT_ENABLE_MASK; + value |= (uint8_t)APEX_CONFIG1_TILT_ENABLE_DIS; + status |= inv_imu_write_reg(s, APEX_CONFIG1, 1, &value); + + return status; +} + +int inv_imu_apex_get_data_activity(struct inv_imu_device *s, inv_imu_apex_step_activity_t *apex_activity) +{ + uint8_t data[4]; + int status = inv_imu_read_reg(s, APEX_DATA0, 4, data); + + apex_activity->step_cnt = data[1] << 8 | data[0]; + apex_activity->step_cadence = data[2]; + apex_activity->activity_class = data[3] & APEX_DATA3_ACTIVITY_CLASS_MASK; + + return status; +} + +int inv_imu_apex_get_data_free_fall(struct inv_imu_device *s, uint16_t *freefall_duration) +{ + uint8_t data[2]; + int status = inv_imu_read_reg(s, APEX_DATA4, 2, &data[0]); + + *freefall_duration = (data[1] << 8) | data[0]; + + return status; +} + diff --git a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_apex.h b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_apex.h similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_apex.h rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_apex.h index 4933633..7837f05 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_apex.h +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_apex.h @@ -1,185 +1,185 @@ -/* - * ________________________________________________________________________________________________________ - * Copyright (c) 2017 InvenSense Inc. All rights reserved. - * - * This software, related documentation and any modifications thereto (collectively "Software") is subject - * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright - * and other intellectual property rights laws. - * - * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software - * and any use, reproduction, disclosure or distribution of the Software without an express license agreement - * from InvenSense is strictly prohibited. - * - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS - * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED - * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL - * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY - * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, - * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE - * OF THE SOFTWARE. - * ________________________________________________________________________________________________________ - */ - -/** @defgroup DriverApex IMU driver high level functions related to APEX and the DMP - * @brief High-level function to setup an IMU device - * @ingroup Driver - * @{ - */ - -/** @file inv_imu_apex.h - * High-level function to setup an IMU device - */ - -#ifndef _INV_IMU_APEX_H_ -#define _INV_IMU_APEX_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -#include "inv_imu_defs.h" - -#include "InvError.h" - -#include -#include - -/* Forward declarations */ -struct inv_imu_device; - -/** @brief IMU APEX inputs parameters definition - */ -typedef struct { - APEX_CONFIG3_PEDO_AMP_TH_t pedo_amp_th; - uint8_t pedo_step_cnt_th; - uint8_t pedo_step_det_th; - APEX_CONFIG4_PEDO_SB_TIMER_TH_t pedo_sb_timer_th; - APEX_CONFIG4_PEDO_HI_ENRGY_TH_t pedo_hi_enrgy_th; - APEX_CONFIG5_TILT_WAIT_TIME_t tilt_wait_time; - APEX_CONFIG2_DMP_POWER_SAVE_TIME_t power_save_time; - APEX_CONFIG0_DMP_POWER_SAVE_t power_save; - APEX_CONFIG9_SENSITIVITY_MODE_t sensitivity_mode; - APEX_CONFIG2_LOW_ENERGY_AMP_TH_t low_energy_amp_th; - APEX_CONFIG9_SMD_SENSITIVITY_t smd_sensitivity; - APEX_CONFIG9_FF_DEBOUNCE_DURATION_t ff_debounce_duration; - APEX_CONFIG12_FF_MAX_DURATION_t ff_max_duration_cm; - APEX_CONFIG12_FF_MIN_DURATION_t ff_min_duration_cm; - APEX_CONFIG10_LOWG_PEAK_TH_t lowg_peak_th; - APEX_CONFIG5_LOWG_PEAK_TH_HYST_t lowg_peak_hyst; - APEX_CONFIG10_LOWG_TIME_TH_SAMPLES_t lowg_samples_th; - APEX_CONFIG11_HIGHG_PEAK_TH_t highg_peak_th; - APEX_CONFIG5_HIGHG_PEAK_TH_HYST_t highg_peak_hyst; - APEX_CONFIG11_HIGHG_TIME_TH_SAMPLES_t highg_samples_th; -} inv_imu_apex_parameters_t; - -/** @brief APEX pedometer outputs - */ -typedef struct inv_imu_apex_step_activity { - uint16_t step_cnt; /**< Number of steps taken */ - uint8_t step_cadence; /**< Walk/run cadence in number of samples. - Format is u6.2. E.g, At 50Hz and 2Hz walk frequency, if the cadency is 25 samples. - The register will output 100. */ - uint8_t activity_class; /**< Detected activity unknown (0), walk (1) or run (2) */ -} inv_imu_apex_step_activity_t; - -/** @brief Enable Free Fall. - * @return 0 on success, negative value on error. - */ -int inv_imu_apex_enable_ff(struct inv_imu_device *s); - -/** @brief Disable Free Fall. - * @return 0 on success, negative value on error. - */ -int inv_imu_apex_disable_ff(struct inv_imu_device *s); - -/** @brief Enable Significant Motion Detection. - * note : SMD requests to have the accelerometer enabled to work. - * To have good performance, it's recommended to set accelerometer ODR (Output Data Rate) to 20ms - * and the accelerometer in Low Power Mode. - * @return 0 on success, negative value on error. - */ -int inv_imu_apex_enable_smd(struct inv_imu_device *s); - -/** @brief Disable Significant Motion Detection. - * @return 0 on success, negative value on error. - */ -int inv_imu_apex_disable_smd(struct inv_imu_device *s); - -/** @brief Fill the APEX parameters structure with all the default parameters for APEX algorithms (pedometer, tilt) - * @param[out] apex_inputs Default input parameters. See @sa inv_imu_apex_parameters_t - * @return 0 on success, negative value on error. - */ -int inv_imu_apex_init_parameters_struct(struct inv_imu_device *s, inv_imu_apex_parameters_t *apex_inputs); - -/** @brief Configures DMP parameters for APEX algorithms (pedometer, tilt, lowg, highg). - * This programmable parameters will be decoded and propagate to the SRAM to be executed at DMP start. - * @param[in] apex_inputs The requested input parameters. See @sa inv_imu_apex_parameters_t - * @warning APEX inputs can't change on the fly, this API should be called before enabling any APEX features. - * @warning APEX configuration can't be done too frequently, but only once every 10ms. - * Otherwise it can create unknown behavior. - * @return 0 on success, negative value on error. - */ -int inv_imu_apex_configure_parameters(struct inv_imu_device *s, const inv_imu_apex_parameters_t *apex_inputs); - -/** @brief Returns current DMP parameters for APEX algorithms (pedometer, tilt). - * @param[out] apex_params The current parameter, fetched from registers. See @sa inv_imu_apex_parameters_t - * @return 0 on success, negative value on error. - */ -int inv_imu_apex_get_parameters(struct inv_imu_device *s, inv_imu_apex_parameters_t *apex_params); - -/** @brief Configure DMP Output Data Rate for APEX algorithms (pedometer, tilt) - * @param[in] frequency The requested frequency. - * @sa APEX_CONFIG1_DMP_ODR_t - * @warning DMP_ODR can change on the fly, and the DMP code will accommodate necessary modifications - * @warning The user needs to take care to set Accel frequency >= DMP frequency. This is a hard constraint - since HW will not handle incorrect setting. - * @return 0 on success, negative value on error. - */ -int inv_imu_apex_set_frequency(struct inv_imu_device *s, const APEX_CONFIG1_DMP_ODR_t frequency); - -/** @brief Enable APEX algorithm Pedometer. - * note : Pedometer request to have the accelerometer enabled to works - * with accelerometer frequency less than dmp frequency. - * @return 0 on success, negative value on error. - * @warning Pedometer must be turned OFF to reconfigure it - */ -int inv_imu_apex_enable_pedometer(struct inv_imu_device *s); - -/** @brief Disable APEX algorithm Pedometer. - * @return 0 on success, negative value on error. - */ -int inv_imu_apex_disable_pedometer(struct inv_imu_device *s); - -/** @brief Enable APEX algorithm Tilt. - * note : Tilt request to have the accelerometer enabled to works - * with accelerometer frequency less than dmp frequency. - * @return 0 on success, negative value on error. - */ -int inv_imu_apex_enable_tilt(struct inv_imu_device *s); - -/** @brief Disable APEX algorithm Tilt. - * @return 0 on success, negative value on error. - */ -int inv_imu_apex_disable_tilt(struct inv_imu_device *s); - -/** @brief Retrieve APEX pedometer outputs and format them - * @param[out] apex_activity Apex step and activity data value. - * @return 0 in case of success, negative value on error. See enum inv_error - */ -int inv_imu_apex_get_data_activity(struct inv_imu_device *s, inv_imu_apex_step_activity_t *apex_activity); - -/** @brief Retrieve APEX free fall outputs and format them - * @param[out] Free fall duration in number of sample. - * @return 0 in case of success, negative value on error. See enum inv_error - */ -int inv_imu_apex_get_data_free_fall(struct inv_imu_device *s, uint16_t *freefall_duration); - - -#ifdef __cplusplus -} -#endif - -#endif /* _INV_IMU_APEX_H_ */ - -/** @} */ +/* + * ________________________________________________________________________________________________________ + * Copyright (c) 2017 InvenSense Inc. All rights reserved. + * + * This software, related documentation and any modifications thereto (collectively "Software") is subject + * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright + * and other intellectual property rights laws. + * + * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software + * and any use, reproduction, disclosure or distribution of the Software without an express license agreement + * from InvenSense is strictly prohibited. + * + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS + * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED + * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL + * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, + * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THE SOFTWARE. + * ________________________________________________________________________________________________________ + */ + +/** @defgroup DriverApex IMU driver high level functions related to APEX and the DMP + * @brief High-level function to setup an IMU device + * @ingroup Driver + * @{ + */ + +/** @file inv_imu_apex.h + * High-level function to setup an IMU device + */ + +#ifndef _INV_IMU_APEX_H_ +#define _INV_IMU_APEX_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "inv_imu_defs.h" + +#include "InvError.h" + +#include +#include + +/* Forward declarations */ +struct inv_imu_device; + +/** @brief IMU APEX inputs parameters definition + */ +typedef struct { + APEX_CONFIG3_PEDO_AMP_TH_t pedo_amp_th; + uint8_t pedo_step_cnt_th; + uint8_t pedo_step_det_th; + APEX_CONFIG4_PEDO_SB_TIMER_TH_t pedo_sb_timer_th; + APEX_CONFIG4_PEDO_HI_ENRGY_TH_t pedo_hi_enrgy_th; + APEX_CONFIG5_TILT_WAIT_TIME_t tilt_wait_time; + APEX_CONFIG2_DMP_POWER_SAVE_TIME_t power_save_time; + APEX_CONFIG0_DMP_POWER_SAVE_t power_save; + APEX_CONFIG9_SENSITIVITY_MODE_t sensitivity_mode; + APEX_CONFIG2_LOW_ENERGY_AMP_TH_t low_energy_amp_th; + APEX_CONFIG9_SMD_SENSITIVITY_t smd_sensitivity; + APEX_CONFIG9_FF_DEBOUNCE_DURATION_t ff_debounce_duration; + APEX_CONFIG12_FF_MAX_DURATION_t ff_max_duration_cm; + APEX_CONFIG12_FF_MIN_DURATION_t ff_min_duration_cm; + APEX_CONFIG10_LOWG_PEAK_TH_t lowg_peak_th; + APEX_CONFIG5_LOWG_PEAK_TH_HYST_t lowg_peak_hyst; + APEX_CONFIG10_LOWG_TIME_TH_SAMPLES_t lowg_samples_th; + APEX_CONFIG11_HIGHG_PEAK_TH_t highg_peak_th; + APEX_CONFIG5_HIGHG_PEAK_TH_HYST_t highg_peak_hyst; + APEX_CONFIG11_HIGHG_TIME_TH_SAMPLES_t highg_samples_th; +} inv_imu_apex_parameters_t; + +/** @brief APEX pedometer outputs + */ +typedef struct inv_imu_apex_step_activity { + uint16_t step_cnt; /**< Number of steps taken */ + uint8_t step_cadence; /**< Walk/run cadence in number of samples. + Format is u6.2. E.g, At 50Hz and 2Hz walk frequency, if the cadency is 25 samples. + The register will output 100. */ + uint8_t activity_class; /**< Detected activity unknown (0), walk (1) or run (2) */ +} inv_imu_apex_step_activity_t; + +/** @brief Enable Free Fall. + * @return 0 on success, negative value on error. + */ +int inv_imu_apex_enable_ff(struct inv_imu_device *s); + +/** @brief Disable Free Fall. + * @return 0 on success, negative value on error. + */ +int inv_imu_apex_disable_ff(struct inv_imu_device *s); + +/** @brief Enable Significant Motion Detection. + * note : SMD requests to have the accelerometer enabled to work. + * To have good performance, it's recommended to set accelerometer ODR (Output Data Rate) to 20ms + * and the accelerometer in Low Power Mode. + * @return 0 on success, negative value on error. + */ +int inv_imu_apex_enable_smd(struct inv_imu_device *s); + +/** @brief Disable Significant Motion Detection. + * @return 0 on success, negative value on error. + */ +int inv_imu_apex_disable_smd(struct inv_imu_device *s); + +/** @brief Fill the APEX parameters structure with all the default parameters for APEX algorithms (pedometer, tilt) + * @param[out] apex_inputs Default input parameters. See @sa inv_imu_apex_parameters_t + * @return 0 on success, negative value on error. + */ +int inv_imu_apex_init_parameters_struct(struct inv_imu_device *s, inv_imu_apex_parameters_t *apex_inputs); + +/** @brief Configures DMP parameters for APEX algorithms (pedometer, tilt, lowg, highg). + * This programmable parameters will be decoded and propagate to the SRAM to be executed at DMP start. + * @param[in] apex_inputs The requested input parameters. See @sa inv_imu_apex_parameters_t + * @warning APEX inputs can't change on the fly, this API should be called before enabling any APEX features. + * @warning APEX configuration can't be done too frequently, but only once every 10ms. + * Otherwise it can create unknown behavior. + * @return 0 on success, negative value on error. + */ +int inv_imu_apex_configure_parameters(struct inv_imu_device *s, const inv_imu_apex_parameters_t *apex_inputs); + +/** @brief Returns current DMP parameters for APEX algorithms (pedometer, tilt). + * @param[out] apex_params The current parameter, fetched from registers. See @sa inv_imu_apex_parameters_t + * @return 0 on success, negative value on error. + */ +int inv_imu_apex_get_parameters(struct inv_imu_device *s, inv_imu_apex_parameters_t *apex_params); + +/** @brief Configure DMP Output Data Rate for APEX algorithms (pedometer, tilt) + * @param[in] frequency The requested frequency. + * @sa APEX_CONFIG1_DMP_ODR_t + * @warning DMP_ODR can change on the fly, and the DMP code will accommodate necessary modifications + * @warning The user needs to take care to set Accel frequency >= DMP frequency. This is a hard constraint + since HW will not handle incorrect setting. + * @return 0 on success, negative value on error. + */ +int inv_imu_apex_set_frequency(struct inv_imu_device *s, const APEX_CONFIG1_DMP_ODR_t frequency); + +/** @brief Enable APEX algorithm Pedometer. + * note : Pedometer request to have the accelerometer enabled to works + * with accelerometer frequency less than dmp frequency. + * @return 0 on success, negative value on error. + * @warning Pedometer must be turned OFF to reconfigure it + */ +int inv_imu_apex_enable_pedometer(struct inv_imu_device *s); + +/** @brief Disable APEX algorithm Pedometer. + * @return 0 on success, negative value on error. + */ +int inv_imu_apex_disable_pedometer(struct inv_imu_device *s); + +/** @brief Enable APEX algorithm Tilt. + * note : Tilt request to have the accelerometer enabled to works + * with accelerometer frequency less than dmp frequency. + * @return 0 on success, negative value on error. + */ +int inv_imu_apex_enable_tilt(struct inv_imu_device *s); + +/** @brief Disable APEX algorithm Tilt. + * @return 0 on success, negative value on error. + */ +int inv_imu_apex_disable_tilt(struct inv_imu_device *s); + +/** @brief Retrieve APEX pedometer outputs and format them + * @param[out] apex_activity Apex step and activity data value. + * @return 0 in case of success, negative value on error. See enum inv_error + */ +int inv_imu_apex_get_data_activity(struct inv_imu_device *s, inv_imu_apex_step_activity_t *apex_activity); + +/** @brief Retrieve APEX free fall outputs and format them + * @param[out] Free fall duration in number of sample. + * @return 0 in case of success, negative value on error. See enum inv_error + */ +int inv_imu_apex_get_data_free_fall(struct inv_imu_device *s, uint16_t *freefall_duration); + + +#ifdef __cplusplus +} +#endif + +#endif /* _INV_IMU_APEX_H_ */ + +/** @} */ diff --git a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_defs.h b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_defs.h similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_defs.h rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_defs.h index 442ffc5..64509ff 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_defs.h +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_defs.h @@ -1,1011 +1,1011 @@ -/* - * ________________________________________________________________________________________________________ - * Copyright (c) 2017 InvenSense Inc. All rights reserved. - * - * This software, related documentation and any modifications thereto (collectively "Software") is subject - * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright - * and other intellectual property rights laws. - * - * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software - * and any use, reproduction, disclosure or distribution of the Software without an express license agreement - * from InvenSense is strictly prohibited. - * - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS - * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED - * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL - * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY - * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, - * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE - * OF THE SOFTWARE. - * ________________________________________________________________________________________________________ - */ - -#ifndef _INV_IMU_DEFS_H_ -#define _INV_IMU_DEFS_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -/** @file inv_imu_defs.h - * File exposing the device register map - */ - -#include -/* List whoami values for all device variants*/ -#define T1000_WHOAMI 0x30 -#define ICM42607P_WHOAMI 0x60 -#define ICM42670P_WHOAMI 0x67 -#define ICM42670T_WHOAMI 0x64 -#define ICM42670S_WHOAMI 0x69 - -/* Define whoami value for the targeted product and make sure the target is valid */ -#if defined(T1000) - #define ICM_WHOAMI T1000_WHOAMI -#elif defined(ICM42607P) - #define ICM_WHOAMI ICM42607P_WHOAMI -#elif defined(ICM42670P) - #define ICM_WHOAMI ICM42670P_WHOAMI -#elif defined(ICM42670T) - #define ICM_WHOAMI ICM42670T_WHOAMI -#elif defined(ICM42670S) - #define ICM_WHOAMI ICM42670S_WHOAMI -#else - #error "Please define which IMU variant is targeted." -#endif - - -#include "inv_imu_regmap.h" - -/* ---------------------------------------------------------------------------- - * Device features - * - * Next macros define some of the device features such as FIFO, sensor data - * size or whoami value. - * ---------------------------------------------------------------------------- */ - -#define ACCEL_DATA_SIZE 6 -#define GYRO_DATA_SIZE 6 -#define TEMP_DATA_SIZE 2 - - -#define FIFO_HEADER_SIZE 1 -#define FIFO_ACCEL_DATA_SIZE ACCEL_DATA_SIZE -#define FIFO_GYRO_DATA_SIZE GYRO_DATA_SIZE -#define FIFO_TEMP_DATA_SIZE 1 -#define FIFO_TS_FSYNC_SIZE 2 -#define FIFO_TEMP_HIGH_RES_SIZE 1 -#define FIFO_ACCEL_GYRO_HIGH_RES_SIZE 3 - -#define FIFO_16BYTES_PACKET_SIZE (FIFO_HEADER_SIZE + FIFO_ACCEL_DATA_SIZE + FIFO_GYRO_DATA_SIZE + FIFO_TEMP_DATA_SIZE + FIFO_TS_FSYNC_SIZE) -#define FIFO_20BYTES_PACKET_SIZE (FIFO_HEADER_SIZE + FIFO_ACCEL_DATA_SIZE + FIFO_GYRO_DATA_SIZE + FIFO_TEMP_DATA_SIZE + FIFO_TS_FSYNC_SIZE +\ - FIFO_TEMP_HIGH_RES_SIZE + FIFO_ACCEL_GYRO_HIGH_RES_SIZE) - -#define FIFO_HEADER_ODR_ACCEL 0x01 -#define FIFO_HEADER_ODR_GYRO 0x02 -#define FIFO_HEADER_FSYNC 0x04 -#define FIFO_HEADER_TMST 0x08 -#define FIFO_HEADER_HEADER_20 0x10 -#define FIFO_HEADER_GYRO 0x20 -#define FIFO_HEADER_ACC 0x40 -#define FIFO_HEADER_MSG 0x80 - - -#define INVALID_VALUE_FIFO ((int16_t)0x8000) -#define INVALID_VALUE_FIFO_1B ((int8_t)0x80) -#define OUT_OF_BOUND_TEMPERATURE_NEG_FIFO_1B ((int8_t)0x81) -#define OUT_OF_BOUND_TEMPERATURE_POS_FIFO_1B ((int8_t)0x7F) - -/** Describe the content of the FIFO header */ -typedef union { - unsigned char Byte; - struct { - unsigned char gyro_odr_different : 1; - unsigned char accel_odr_different : 1; - unsigned char fsync_bit : 1; - unsigned char timestamp_bit : 1; - unsigned char twentybits_bit : 1; - unsigned char gyro_bit : 1; - unsigned char accel_bit : 1; - unsigned char msg_bit : 1; - } bits; -} fifo_header_t; - - -/* ---------------------------------------------------------------------------- - * Device registers description - * - * Next section defines some of the registers bitfield and declare corresponding - * accessors. - * Note that descriptors and accessors are not provided for all the registers - * but only for the most useful ones. - * For all details on registers and bitfields functionalities please refer to - * the device datasheet. - * ---------------------------------------------------------------------------- */ - - -/* --------------------------------------------------------------------------- - * register bank 0 - * ---------------------------------------------------------------------------- */ - -/* - * CHIP_CONFIG - * Register Name : CHIP_CONFIG - */ - -/* SPI_MODE */ -typedef enum { - CHIP_CONFIG_SPI_MODE_1_2 = (0x1 << DEVICE_CONFIG_SPI_MODE_POS), - CHIP_CONFIG_SPI_MODE_0_3 = (0x0 << DEVICE_CONFIG_SPI_MODE_POS), -} CHIP_CONFIG_SPI_MODE_t; - - -/* - * SIGNAL_PATH_RESET - * Register Name: SIGNAL_PATH_RESET - */ - -/* SOFT_RESET_DEVICE_CONFIG */ -typedef enum { - SIGNAL_PATH_RESET_SOFT_RESET_DEVICE_CONFIG_EN = (0x01 << SIGNAL_PATH_RESET_SOFT_RESET_DEVICE_CONFIG_POS), - SIGNAL_PATH_RESET_SOFT_RESET_DEVICE_CONFIG_DIS = (0x00 << SIGNAL_PATH_RESET_SOFT_RESET_DEVICE_CONFIG_POS), -} SIGNAL_PATH_RESET_SOFT_RESET_DEVICE_CONFIG_t; - -/* FIFO_FLUSH */ -typedef enum { - SIGNAL_PATH_RESET_FIFO_FLUSH_EN = (0x01 << SIGNAL_PATH_RESET_FIFO_FLUSH_POS), - SIGNAL_PATH_RESET_FIFO_FLUSH_DIS = (0x00 << SIGNAL_PATH_RESET_FIFO_FLUSH_POS), -} SIGNAL_PATH_RESET_FIFO_FLUSH_t; - - -/* - * INT_CONFIG - * Register Name: INT_CONFIG - */ - -/* INT2_MODE */ -typedef enum { - INT_CONFIG_INT2_MODE_LATCHED = (0x01 << INT_CONFIG_INT2_MODE_POS), - INT_CONFIG_INT2_MODE_PULSED = (0x00 << INT_CONFIG_INT2_MODE_POS), -} INT_CONFIG_INT2_MODE_t; - -/* INT2_DRIVE_CIRCUIT */ -typedef enum { - INT_CONFIG_INT2_DRIVE_CIRCUIT_PP = (0x01 << INT_CONFIG_INT2_DRIVE_CIRCUIT_POS), - INT_CONFIG_INT2_DRIVE_CIRCUIT_OD = (0x00 << INT_CONFIG_INT2_DRIVE_CIRCUIT_POS), -} INT_CONFIG_INT2_DRIVE_CIRCUIT_t; - -/* INT2_POLARITY */ -typedef enum { - INT_CONFIG_INT2_POLARITY_HIGH = (0x01 << INT_CONFIG_INT2_POLARITY_POS), - INT_CONFIG_INT2_POLARITY_LOW = (0x00 << INT_CONFIG_INT2_POLARITY_POS), -} INT_CONFIG_INT2_POLARITY_t; - -/* INT1_MODE */ -typedef enum { - INT_CONFIG_INT1_MODE_LATCHED = (0x01 << INT_CONFIG_INT1_MODE_POS), - INT_CONFIG_INT1_MODE_PULSED = (0x00 << INT_CONFIG_INT1_MODE_POS), -} INT_CONFIG_INT1_MODE_t; - -/* INT1_DRIVE_CIRCUIT */ -typedef enum { - INT_CONFIG_INT1_DRIVE_CIRCUIT_PP = (0x01 << INT_CONFIG_INT1_DRIVE_CIRCUIT_POS), - INT_CONFIG_INT1_DRIVE_CIRCUIT_OD = (0x00 << INT_CONFIG_INT1_DRIVE_CIRCUIT_POS), -} INT_CONFIG_INT1_DRIVE_CIRCUIT_t; - -/* INT1_POLARITY */ -typedef enum { - INT_CONFIG_INT1_POLARITY_HIGH = 0x01, - INT_CONFIG_INT1_POLARITY_LOW = 0x00, -} INT_CONFIG_INT1_POLARITY_t; - - -/* - * PWR_MGMT0 - * Register Name: PWR_MGMT0 - */ - -/* ACCEL_LP_CLK_SEL */ -typedef enum { - PWR_MGMT0_ACCEL_LP_CLK_WUOSC = (0x00 << PWR_MGMT0_ACCEL_LP_CLK_SEL_POS), - PWR_MGMT0_ACCEL_LP_CLK_RCOSC = (0x01 << PWR_MGMT0_ACCEL_LP_CLK_SEL_POS), -} PWR_MGMT0_ACCEL_LP_CLK_t; - -/* IDLE */ -typedef enum { - PWR_MGMT0_IDLE_DIS = (0x01 << PWR_MGMT0_IDLE_POS), - PWR_MGMT0_IDLE_EN = (0x00 << PWR_MGMT0_IDLE_POS), -} PWR_MGMT0_IDLE_t; - -/* GYRO_MODE */ -typedef enum { - PWR_MGMT0_GYRO_MODE_LN = (0x03 << PWR_MGMT0_GYRO_MODE_POS), - PWR_MGMT0_GYRO_MODE_LP = (0x02 << PWR_MGMT0_GYRO_MODE_POS), - PWR_MGMT0_GYRO_MODE_STANDBY = (0x01 << PWR_MGMT0_GYRO_MODE_POS), - PWR_MGMT0_GYRO_MODE_OFF = (0x00 << PWR_MGMT0_GYRO_MODE_POS), -} PWR_MGMT0_GYRO_MODE_t; - -/* ACCEL_MODE */ -typedef enum { - PWR_MGMT0_ACCEL_MODE_LN = 0x03, - PWR_MGMT0_ACCEL_MODE_LP = 0x02, - PWR_MGMT0_ACCEL_MODE_OFF = 0x00, -} PWR_MGMT0_ACCEL_MODE_t; - - -/* - * GYRO_CONFIG0 - * Register Name: GYRO_CONFIG0 - */ - -/* GYRO_FS_SEL*/ -typedef enum { - GYRO_CONFIG0_FS_SEL_250dps = (3 << GYRO_CONFIG0_GYRO_UI_FS_SEL_POS), - GYRO_CONFIG0_FS_SEL_500dps = (2 << GYRO_CONFIG0_GYRO_UI_FS_SEL_POS), - GYRO_CONFIG0_FS_SEL_1000dps = (1 << GYRO_CONFIG0_GYRO_UI_FS_SEL_POS), - GYRO_CONFIG0_FS_SEL_2000dps = (0 << GYRO_CONFIG0_GYRO_UI_FS_SEL_POS), -} GYRO_CONFIG0_FS_SEL_t; - -/* GYRO_ODR */ -typedef enum { - GYRO_CONFIG0_ODR_1_5625_HZ = 0xF, - GYRO_CONFIG0_ODR_3_125_HZ = 0xE, - GYRO_CONFIG0_ODR_6_25_HZ = 0xD, - GYRO_CONFIG0_ODR_12_5_HZ = 0xC, - GYRO_CONFIG0_ODR_25_HZ = 0xB, - GYRO_CONFIG0_ODR_50_HZ = 0xA, - GYRO_CONFIG0_ODR_100_HZ = 0x9, - GYRO_CONFIG0_ODR_200_HZ = 0x8, - GYRO_CONFIG0_ODR_400_HZ = 0x7, - GYRO_CONFIG0_ODR_800_HZ = 0x6, - GYRO_CONFIG0_ODR_1600_HZ = 0x5, -} GYRO_CONFIG0_ODR_t; - - -/* - * ACCEL_CONFIG0 - * Register Name: ACCEL_CONFIG0 - */ - -/* ACCEL_FS_SEL */ -typedef enum { - ACCEL_CONFIG0_FS_SEL_2g = (0x3 << ACCEL_CONFIG0_ACCEL_UI_FS_SEL_POS), - ACCEL_CONFIG0_FS_SEL_4g = (0x2 << ACCEL_CONFIG0_ACCEL_UI_FS_SEL_POS), - ACCEL_CONFIG0_FS_SEL_8g = (0x1 << ACCEL_CONFIG0_ACCEL_UI_FS_SEL_POS), - ACCEL_CONFIG0_FS_SEL_16g = (0x0 << ACCEL_CONFIG0_ACCEL_UI_FS_SEL_POS), -} ACCEL_CONFIG0_FS_SEL_t; - -/* ACCEL_ODR */ -typedef enum { - ACCEL_CONFIG0_ODR_1_5625_HZ = 0xF, - ACCEL_CONFIG0_ODR_3_125_HZ = 0xE, - ACCEL_CONFIG0_ODR_6_25_HZ = 0xD, - ACCEL_CONFIG0_ODR_12_5_HZ = 0xC, - ACCEL_CONFIG0_ODR_25_HZ = 0xB, - ACCEL_CONFIG0_ODR_50_HZ = 0xA, - ACCEL_CONFIG0_ODR_100_HZ = 0x9, - ACCEL_CONFIG0_ODR_200_HZ = 0x8, - ACCEL_CONFIG0_ODR_400_HZ = 0x7, - ACCEL_CONFIG0_ODR_800_HZ = 0x6, - ACCEL_CONFIG0_ODR_1600_HZ = 0x5, -} ACCEL_CONFIG0_ODR_t; - - -/* - * GYRO_CONFIG1 - * Register Name: GYRO_CONFIG1 - */ - -/* GYRO_UI_FILT_BW_IND */ -typedef enum { - GYRO_CONFIG1_GYRO_FILT_BW_16 = (0x07 << GYRO_CONFIG1_GYRO_UI_FILT_BW_POS), - GYRO_CONFIG1_GYRO_FILT_BW_25 = (0x06 << GYRO_CONFIG1_GYRO_UI_FILT_BW_POS), - GYRO_CONFIG1_GYRO_FILT_BW_34 = (0x05 << GYRO_CONFIG1_GYRO_UI_FILT_BW_POS), - GYRO_CONFIG1_GYRO_FILT_BW_53 = (0x04 << GYRO_CONFIG1_GYRO_UI_FILT_BW_POS), - GYRO_CONFIG1_GYRO_FILT_BW_73 = (0x03 << GYRO_CONFIG1_GYRO_UI_FILT_BW_POS), - GYRO_CONFIG1_GYRO_FILT_BW_121 = (0x02 << GYRO_CONFIG1_GYRO_UI_FILT_BW_POS), - GYRO_CONFIG1_GYRO_FILT_BW_180 = (0x01 << GYRO_CONFIG1_GYRO_UI_FILT_BW_POS), - GYRO_CONFIG1_GYRO_FILT_BW_NO_FILTER = (0x00 << GYRO_CONFIG1_GYRO_UI_FILT_BW_POS), -} GYRO_CONFIG1_GYRO_FILT_BW_t; - - -/* - * ACCEL_CONFIG1 - * Register Name: ACCEL_CONFIG1 - */ - -/* ACCEL_UI_AVG_IND */ -typedef enum { - ACCEL_CONFIG1_ACCEL_FILT_AVG_64 = (0x5 << ACCEL_CONFIG1_ACCEL_UI_AVG_POS), - ACCEL_CONFIG1_ACCEL_FILT_AVG_32 = (0x4 << ACCEL_CONFIG1_ACCEL_UI_AVG_POS), - ACCEL_CONFIG1_ACCEL_FILT_AVG_16 = (0x3 << ACCEL_CONFIG1_ACCEL_UI_AVG_POS), - ACCEL_CONFIG1_ACCEL_FILT_AVG_8 = (0x2 << ACCEL_CONFIG1_ACCEL_UI_AVG_POS), - ACCEL_CONFIG1_ACCEL_FILT_AVG_4 = (0x1 << ACCEL_CONFIG1_ACCEL_UI_AVG_POS), - ACCEL_CONFIG1_ACCEL_FILT_AVG_2 = (0x0 << ACCEL_CONFIG1_ACCEL_UI_AVG_POS), -} ACCEL_CONFIG1_ACCEL_FILT_AVG_t; - -/* ACCEL_UI_FILT_BW_IND */ -typedef enum { - ACCEL_CONFIG1_ACCEL_FILT_BW_16 = (0x7 << ACCEL_CONFIG1_ACCEL_UI_FILT_BW_POS), - ACCEL_CONFIG1_ACCEL_FILT_BW_25 = (0x6 << ACCEL_CONFIG1_ACCEL_UI_FILT_BW_POS), - ACCEL_CONFIG1_ACCEL_FILT_BW_34 = (0x5 << ACCEL_CONFIG1_ACCEL_UI_FILT_BW_POS), - ACCEL_CONFIG1_ACCEL_FILT_BW_53 = (0x4 << ACCEL_CONFIG1_ACCEL_UI_FILT_BW_POS), - ACCEL_CONFIG1_ACCEL_FILT_BW_73 = (0x3 << ACCEL_CONFIG1_ACCEL_UI_FILT_BW_POS), - ACCEL_CONFIG1_ACCEL_FILT_BW_121 = (0x2 << ACCEL_CONFIG1_ACCEL_UI_FILT_BW_POS), - ACCEL_CONFIG1_ACCEL_FILT_BW_180 = (0x1 << ACCEL_CONFIG1_ACCEL_UI_FILT_BW_POS), - ACCEL_CONFIG1_ACCEL_FILT_BW_NO_FILTER = (0x0 << ACCEL_CONFIG1_ACCEL_UI_FILT_BW_POS), -} ACCEL_CONFIG1_ACCEL_FILT_BW_t; - - -/* - * APEX_CONFIG0 - * Register Name: APEX_CONFIG0 - */ - -/* DMP_POWER_SAVE_EN */ -typedef enum { - APEX_CONFIG0_DMP_POWER_SAVE_EN = (0x1 << APEX_CONFIG0_DMP_POWER_SAVE_EN_POS), - APEX_CONFIG0_DMP_POWER_SAVE_DIS = (0x0 << APEX_CONFIG0_DMP_POWER_SAVE_EN_POS), -} APEX_CONFIG0_DMP_POWER_SAVE_t; - -/* DMP_INIT_EN */ -typedef enum { - APEX_CONFIG0_DMP_INIT_EN = (0x01 << APEX_CONFIG0_DMP_INIT_EN_POS), - APEX_CONFIG0_DMP_INIT_DIS = (0x00 << APEX_CONFIG0_DMP_INIT_EN_POS), -} APEX_CONFIG0_DMP_INIT_t; - -/* DMP_MEM_RESET */ -typedef enum { - APEX_CONFIG0_DMP_MEM_RESET_APEX_ST_EN = (0x01 << APEX_CONFIG0_DMP_MEM_RESET_EN_POS), - APEX_CONFIG0_DMP_MEM_RESET_DIS = (0x00 << APEX_CONFIG0_DMP_MEM_RESET_EN_POS), -} APEX_CONFIG0_DMP_MEM_RESET_t; - - -/* - * APEX_CONFIG1 - * Register Name: APEX_CONFIG1 - */ - -/* SMD_ENABLE */ -typedef enum { - APEX_CONFIG1_SMD_ENABLE_DIS = (0x00 << APEX_CONFIG1_SMD_ENABLE_POS), - APEX_CONFIG1_SMD_ENABLE_EN = (0x01 << APEX_CONFIG1_SMD_ENABLE_POS), -} APEX_CONFIG1_SMD_ENABLE_t; - -/* FF_ENABLE */ -typedef enum { - APEX_CONFIG1_FF_ENABLE_DIS = (0x00 << APEX_CONFIG1_FF_ENABLE_POS), - APEX_CONFIG1_FF_ENABLE_EN = (0x01 << APEX_CONFIG1_FF_ENABLE_POS), -} APEX_CONFIG1_FF_ENABLE_t; - -/* TILT_ENABLE */ -typedef enum { - APEX_CONFIG1_TILT_ENABLE_DIS = (0x0 << APEX_CONFIG1_TILT_ENABLE_POS), - APEX_CONFIG1_TILT_ENABLE_EN = (0x1 << APEX_CONFIG1_TILT_ENABLE_POS), -} APEX_CONFIG1_TILT_ENABLE_t; - -/* PED_ENABLE */ -typedef enum { - APEX_CONFIG1_PED_ENABLE_DIS = (0x0 << APEX_CONFIG1_PED_ENABLE_POS), - APEX_CONFIG1_PED_ENABLE_EN = (0x1 << APEX_CONFIG1_PED_ENABLE_POS), -} APEX_CONFIG1_PED_ENABLE_t; - -/* DMP_ODR */ -typedef enum { - APEX_CONFIG1_DMP_ODR_25Hz = (0x0 << APEX_CONFIG1_DMP_ODR_POS), - APEX_CONFIG1_DMP_ODR_50Hz = (0x2 << APEX_CONFIG1_DMP_ODR_POS), - APEX_CONFIG1_DMP_ODR_100Hz = (0x3 << APEX_CONFIG1_DMP_ODR_POS), - APEX_CONFIG1_DMP_ODR_400Hz = (0x1 << APEX_CONFIG1_DMP_ODR_POS), -} APEX_CONFIG1_DMP_ODR_t; - - -/* - * WOM_CONFIG - * Register Name: WOM_CONFIG - */ - -/* WOM_INT_DUR */ -typedef enum { - WOM_CONFIG_WOM_INT_DUR_1_SMPL = (0x00 << WOM_CONFIG_WOM_INT_DUR_POS), - WOM_CONFIG_WOM_INT_DUR_2_SMPL = (0x01 << WOM_CONFIG_WOM_INT_DUR_POS), - WOM_CONFIG_WOM_INT_DUR_3_SMPL = (0x02 << WOM_CONFIG_WOM_INT_DUR_POS), - WOM_CONFIG_WOM_INT_DUR_4_SMPL = (0x03 << WOM_CONFIG_WOM_INT_DUR_POS), -} WOM_CONFIG_WOM_INT_DUR_t; - -/* WOM_INT_MODE */ -typedef enum { - WOM_CONFIG_WOM_INT_MODE_ANDED = (0x01 << WOM_CONFIG_WOM_INT_MODE_POS), - WOM_CONFIG_WOM_INT_MODE_ORED = (0x00 << WOM_CONFIG_WOM_INT_MODE_POS), -} WOM_CONFIG_WOM_INT_MODE_t; - -/* WOM_MODE */ -typedef enum { - WOM_CONFIG_WOM_MODE_CMP_PREV = (0x01 << WOM_CONFIG_WOM_MODE_POS), - WOM_CONFIG_WOM_MODE_CMP_INIT = (0x00 << WOM_CONFIG_WOM_MODE_POS), -} WOM_CONFIG_WOM_MODE_t; - -/* WOM_ENABLE */ -typedef enum { - WOM_CONFIG_WOM_EN_ENABLE = (0x01 << WOM_CONFIG_WOM_EN_POS), - WOM_CONFIG_WOM_EN_DISABLE = (0x00 << WOM_CONFIG_WOM_EN_POS), -} WOM_CONFIG_WOM_EN_t; - - -/* - * FIFO_CONFIG1 - * Register Name: FIFO_CONFIG - */ - -/* FIFO_MODE */ -typedef enum { - FIFO_CONFIG1_FIFO_MODE_SNAPSHOT = (0x01 << FIFO_CONFIG1_FIFO_MODE_POS), - FIFO_CONFIG1_FIFO_MODE_STREAM = (0x00 << FIFO_CONFIG1_FIFO_MODE_POS) -} FIFO_CONFIG1_FIFO_MODE_t; - -/* FIFO_BYPASS */ -typedef enum { - FIFO_CONFIG1_FIFO_BYPASS_ON = (0x01 << FIFO_CONFIG1_FIFO_BYPASS_POS), - FIFO_CONFIG1_FIFO_BYPASS_OFF = (0x00 << FIFO_CONFIG1_FIFO_BYPASS_POS), -} FIFO_CONFIG1_FIFO_BYPASS_t; - -/* - * APEX_DATA0 and APEX_DATA1 - * Register Name: APEX_DATA0 and APEX_DATA1 - */ - -/* Pedometer output */ -typedef struct APEX_DATA_STEP_ACTIVITY { - uint16_t step_cnt; /* Number of steps taken */ - uint8_t step_cadence; /* Walk/run cadence in number of samples. Format is u6.2.*/ - uint8_t activity_class; /* Detected activity unknown (0), walk (1) or run (2) */ -} APEX_DATA_STEP_ACTIVITY_t; - - -/* - * APEX_DATA3 - * Register Name: APEX_DATA3 - */ - -/* DMP_IDLE */ -typedef enum { - APEX_DATA3_DMP_IDLE_ON = (0x01 << APEX_DATA3_DMP_IDLE_POS), - APEX_DATA3_DMP_IDLE_OFF = (0x00 << APEX_DATA3_DMP_IDLE_POS), -} APEX_DATA3_DMP_IDLE_OFF_t; - -/* ACTIVITY_CLASS */ -typedef enum { - APEX_DATA3_ACTIVITY_CLASS_OTHER = 0x0, - APEX_DATA3_ACTIVITY_CLASS_WALK = 0x1, - APEX_DATA3_ACTIVITY_CLASS_RUN = 0x2, -} APEX_DATA3_ACTIVITY_CLASS_t; - - -/* - * INTF_CONFIG0 - * Register Name: INTF_CONFIG0 - */ - -/* FIFO_COUNT_REC */ -typedef enum { - INTF_CONFIG0_FIFO_COUNT_REC_RECORD = (0x01 << INTF_CONFIG0_FIFO_COUNT_FORMAT_POS), - INTF_CONFIG0_FIFO_COUNT_REC_BYTE = (0x00 << INTF_CONFIG0_FIFO_COUNT_FORMAT_POS), -} INTF_CONFIG0_FIFO_COUNT_REC_t; - -/* FIFO_COUNT_ENDIAN */ -typedef enum { - INTF_CONFIG0_FIFO_COUNT_BIG_ENDIAN = (0x01 << INTF_CONFIG0_FIFO_COUNT_ENDIAN_POS), - INTF_CONFIG0_FIFO_COUNT_LITTLE_ENDIAN = (0x00 << INTF_CONFIG0_FIFO_COUNT_ENDIAN_POS), -} INTF_CONFIG0_FIFO_COUNT_ENDIAN_t; - -/* DATA_ENDIAN */ -typedef enum { - INTF_CONFIG0_DATA_BIG_ENDIAN = (0x01 << INTF_CONFIG0_SENSOR_DATA_ENDIAN_POS), - INTF_CONFIG0_DATA_LITTLE_ENDIAN = (0x00 << INTF_CONFIG0_SENSOR_DATA_ENDIAN_POS), -} INTF_CONFIG0_DATA_ENDIAN_t; - - - -/* --------------------------------------------------------------------------- - * register bank MREG1 - * ---------------------------------------------------------------------------- */ - -/* - * TMST_CONFIG1_MREG1 - * Register Name: TMST_CONFIG1 - */ - -/* TMST_RES */ -typedef enum { - TMST_CONFIG1_RESOL_16us = (0x01 << TMST_CONFIG1_TMST_RES_POS), - TMST_CONFIG1_RESOL_1us = (0x00 << TMST_CONFIG1_TMST_RES_POS), -} TMST_CONFIG1_RESOL_t; - -/* TMST_FSYNC */ -typedef enum { - TMST_CONFIG1_TMST_FSYNC_EN = (0x01 << TMST_CONFIG1_TMST_FSYNC_EN_POS), - TMST_CONFIG1_TMST_FSYNC_DIS = (0x00 << TMST_CONFIG1_TMST_FSYNC_EN_POS), -} TMST_CONFIG1_TMST_FSYNC_EN_t; - -/* TMST_EN */ -typedef enum { - TMST_CONFIG1_TMST_EN = 0x01, - TMST_CONFIG1_TMST_DIS = 0x00, -} TMST_CONFIG1_TMST_EN_t; - - -/* - * FIFO_CONFIG5_MREG1 - * Register Name: FIFO_CONFIG5 - */ -/* FIFO_WM_GT_TH */ -typedef enum { - FIFO_CONFIG5_WM_GT_TH_EN = (0x1 << FIFO_CONFIG5_FIFO_WM_GT_TH_POS), - FIFO_CONFIG5_WM_GT_TH_DIS = (0x0 << FIFO_CONFIG5_FIFO_WM_GT_TH_POS), -} FIFO_CONFIG5_WM_GT_t; - -/* FIFO_HIRES_EN */ -typedef enum { - FIFO_CONFIG5_HIRES_EN = (0x1 << FIFO_CONFIG5_FIFO_HIRES_EN_POS), - FIFO_CONFIG5_HIRES_DIS = (0x0 << FIFO_CONFIG5_FIFO_HIRES_EN_POS), -} FIFO_CONFIG5_HIRES_t; - -/* FIFO_TMST_FSYNC_EN */ -typedef enum { - FIFO_CONFIG5_TMST_FSYNC_EN = (0x1 << FIFO_CONFIG5_FIFO_TMST_FSYNC_EN_POS), - FIFO_CONFIG5_TMST_FSYNC_DIS = (0x0 << FIFO_CONFIG5_FIFO_TMST_FSYNC_EN_POS), -} FIFO_CONFIG5_TMST_FSYNC_t; - -/* FIFO_GYRO_EN */ -typedef enum { - FIFO_CONFIG5_GYRO_EN = (0x1 << FIFO_CONFIG5_FIFO_GYRO_EN_POS), - FIFO_CONFIG5_GYRO_DIS = (0x0 << FIFO_CONFIG5_FIFO_GYRO_EN_POS), -} FIFO_CONFIG5_GYRO_t; - -/* FIFO_ACCEL_EN*/ -typedef enum { - FIFO_CONFIG5_ACCEL_EN = 0x01, - FIFO_CONFIG5_ACCEL_DIS = 0x00, -} FIFO_CONFIG5_ACCEL_t; - - -/* - * FSYNC_CONFIG_MREG1 - * Register Name: FSYNC_CONFIG - */ - -/* FSYNC_UI_SEL */ -typedef enum { - FSYNC_CONFIG_UI_SEL_NO = (0x0 << FSYNC_CONFIG_FSYNC_UI_SEL_POS), - FSYNC_CONFIG_UI_SEL_TEMP = (0x1 << FSYNC_CONFIG_FSYNC_UI_SEL_POS), - FSYNC_CONFIG_UI_SEL_GYRO_X = (0x2 << FSYNC_CONFIG_FSYNC_UI_SEL_POS), - FSYNC_CONFIG_UI_SEL_GYRO_Y = (0x3 << FSYNC_CONFIG_FSYNC_UI_SEL_POS), - FSYNC_CONFIG_UI_SEL_GYRO_Z = (0x4 << FSYNC_CONFIG_FSYNC_UI_SEL_POS), - FSYNC_CONFIG_UI_SEL_ACCEL_X = (0x5 << FSYNC_CONFIG_FSYNC_UI_SEL_POS), - FSYNC_CONFIG_UI_SEL_ACCEL_Y = (0x6 << FSYNC_CONFIG_FSYNC_UI_SEL_POS), - FSYNC_CONFIG_UI_SEL_ACCEL_Z = (0x7 << FSYNC_CONFIG_FSYNC_UI_SEL_POS), -} FSYNC_CONFIG_UI_SEL_t; - - -/* - * ST_CONFIG_MREG1 - * Register Name: ST_CONFIG - */ -typedef enum { - ST_CONFIG_16_SAMPLES = (0 << ST_CONFIG_ST_NUMBER_SAMPLE_POS), - ST_CONFIG_200_SAMPLES = (1 << ST_CONFIG_ST_NUMBER_SAMPLE_POS), -} ST_CONFIG_NUM_SAMPLES_t; - -typedef enum { - ST_CONFIG_ACCEL_ST_LIM_50 = (7 << ST_CONFIG_ACCEL_ST_LIM_POS), -} ST_CONFIG_ACCEL_ST_LIM_t; - -typedef enum { - ST_CONFIG_GYRO_ST_LIM_50 = (7 << ST_CONFIG_GYRO_ST_LIM_POS), -} ST_CONFIG_GYRO_ST_LIM_t; - - -/* - * SELFTEST_MREG1 - * Register Name: SELFTEST - */ - -/* GYRO_ST_EN and ACCEL_ST_EN */ -typedef enum { - SELFTEST_DIS = 0, - SELFTEST_ACCEL_EN = SELFTEST_ACCEL_ST_EN_MASK, - SELFTEST_GYRO_EN = SELFTEST_GYRO_ST_EN_MASK, - SELFTEST_EN = (SELFTEST_ACCEL_ST_EN_MASK | SELFTEST_GYRO_ST_EN_MASK) -} SELFTEST_ACCEL_GYRO_ST_EN_t; - - -/* - * OTP_CONFIG_MREG1 - * Register Name: OTP_CONFIG - */ - -/* OTP_CONFIG */ -typedef enum { - OTP_CONFIG_OTP_COPY_TRIM = (1 << OTP_CONFIG_OTP_COPY_MODE_POS), - OTP_CONFIG_OTP_COPY_ST_DATA = (3 << OTP_CONFIG_OTP_COPY_MODE_POS), -} OTP_CONFIG_COPY_MODE_t; - - -/* - * APEX_CONFIG2_MREG1 - * Register Name: APEX_CONFIG2 -*/ - -/* LOW_ENERGY_AMP_TH_SEL */ -typedef enum { - APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_30_MG = (0 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), - APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_35_MG = (1 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), - APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_40_MG = (2 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), - APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_45_MG = (3 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), - APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_50_MG = (4 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), - APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_55_MG = (5 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), - APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_60_MG = (6 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), - APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_65_MG = (7 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), - APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_70_MG = (8 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), - APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_75_MG = (9 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), - APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_80_MG = (10 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), - APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_85_MG = (11 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), - APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_90_MG = (12 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), - APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_95_MG = (13 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), - APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_100_MG = (14 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), - APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_105_MG = (15 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), -} APEX_CONFIG2_LOW_ENERGY_AMP_TH_t; - -/* DMP_POWER_SAVE_TIME_SEL */ -typedef enum { - APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_0_S = 0x0, - APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_4_S = 0x1, - APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_8_S = 0x2, - APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_12_S = 0x3, - APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_16_S = 0x4, - APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_20_S = 0x5, - APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_24_S = 0x6, - APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_28_S = 0x7, - APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_32_S = 0x8, - APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_36_S = 0x9, - APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_40_S = 0xA, - APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_44_S = 0xB, - APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_48_S = 0xC, - APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_52_S = 0xD, - APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_56_S = 0xE, - APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_60_S = 0xF, -} APEX_CONFIG2_DMP_POWER_SAVE_TIME_t; - - -/* - * APEX_CONFIG3_MREG1 - * Register Name: APEX_CONFIG3 -*/ - -/* PEDO_AMP_TH_SEL */ -typedef enum { - APEX_CONFIG3_PEDO_AMP_TH_30_MG = (0 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), - APEX_CONFIG3_PEDO_AMP_TH_34_MG = (1 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), - APEX_CONFIG3_PEDO_AMP_TH_38_MG = (2 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), - APEX_CONFIG3_PEDO_AMP_TH_42_MG = (3 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), - APEX_CONFIG3_PEDO_AMP_TH_46_MG = (4 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), - APEX_CONFIG3_PEDO_AMP_TH_50_MG = (5 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), - APEX_CONFIG3_PEDO_AMP_TH_54_MG = (6 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), - APEX_CONFIG3_PEDO_AMP_TH_58_MG = (7 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), - APEX_CONFIG3_PEDO_AMP_TH_62_MG = (8 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), - APEX_CONFIG3_PEDO_AMP_TH_66_MG = (9 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), - APEX_CONFIG3_PEDO_AMP_TH_70_MG = (10 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), - APEX_CONFIG3_PEDO_AMP_TH_74_MG = (11 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), - APEX_CONFIG3_PEDO_AMP_TH_78_MG = (12 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), - APEX_CONFIG3_PEDO_AMP_TH_82_MG = (13 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), - APEX_CONFIG3_PEDO_AMP_TH_86_MG = (14 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), - APEX_CONFIG3_PEDO_AMP_TH_90_MG = (15 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), -} APEX_CONFIG3_PEDO_AMP_TH_t; - - -/* - * APEX_CONFIG4_MREG1 - * Register Name: APEX_CONFIG4 -*/ - -/* PEDO_SB_TIMER_TH_SEL */ -typedef enum { - APEX_CONFIG4_PEDO_SB_TIMER_TH_50_SAMPLES = (0 << APEX_CONFIG4_PED_SB_TIMER_TH_SEL_POS), - APEX_CONFIG4_PEDO_SB_TIMER_TH_75_SAMPLES = (1 << APEX_CONFIG4_PED_SB_TIMER_TH_SEL_POS), - APEX_CONFIG4_PEDO_SB_TIMER_TH_100_SAMPLES = (2 << APEX_CONFIG4_PED_SB_TIMER_TH_SEL_POS), - APEX_CONFIG4_PEDO_SB_TIMER_TH_125_SAMPLES = (3 << APEX_CONFIG4_PED_SB_TIMER_TH_SEL_POS), - APEX_CONFIG4_PEDO_SB_TIMER_TH_150_SAMPLES = (4 << APEX_CONFIG4_PED_SB_TIMER_TH_SEL_POS), - APEX_CONFIG4_PEDO_SB_TIMER_TH_175_SAMPLES = (5 << APEX_CONFIG4_PED_SB_TIMER_TH_SEL_POS), - APEX_CONFIG4_PEDO_SB_TIMER_TH_200_SAMPLES = (6 << APEX_CONFIG4_PED_SB_TIMER_TH_SEL_POS), - APEX_CONFIG4_PEDO_SB_TIMER_TH_225_SAMPLES = (7 << APEX_CONFIG4_PED_SB_TIMER_TH_SEL_POS), -} APEX_CONFIG4_PEDO_SB_TIMER_TH_t; - - -/* PEDO_HI_ENRGY_TH_SEL */ -typedef enum { - APEX_CONFIG4_PEDO_HI_ENRGY_TH_88_MG = (0 << APEX_CONFIG4_PED_HI_EN_TH_SEL_POS), - APEX_CONFIG4_PEDO_HI_ENRGY_TH_104_MG = (1 << APEX_CONFIG4_PED_HI_EN_TH_SEL_POS), - APEX_CONFIG4_PEDO_HI_ENRGY_TH_133_MG = (2 << APEX_CONFIG4_PED_HI_EN_TH_SEL_POS), - APEX_CONFIG4_PEDO_HI_ENRGY_TH_155_MG = (3 << APEX_CONFIG4_PED_HI_EN_TH_SEL_POS), -} APEX_CONFIG4_PEDO_HI_ENRGY_TH_t; - - -/* - * APEX_CONFIG5_MREG1 - * Register Name: APEX_CONFIG5 -*/ - -/* TILT_WAIT_TIME_SEL */ -typedef enum { - APEX_CONFIG5_TILT_WAIT_TIME_0_S = (0 << APEX_CONFIG5_TILT_WAIT_TIME_SEL_POS), - APEX_CONFIG5_TILT_WAIT_TIME_2_S = (1 << APEX_CONFIG5_TILT_WAIT_TIME_SEL_POS), - APEX_CONFIG5_TILT_WAIT_TIME_4_S = (2 << APEX_CONFIG5_TILT_WAIT_TIME_SEL_POS), - APEX_CONFIG5_TILT_WAIT_TIME_6_S = (3 << APEX_CONFIG5_TILT_WAIT_TIME_SEL_POS), -} APEX_CONFIG5_TILT_WAIT_TIME_t; - -/* LOWG_PEAK_TH_HYST_SEL */ -typedef enum { - APEX_CONFIG5_LOWG_PEAK_TH_HYST_31_MG = (0 << APEX_CONFIG5_LOWG_PEAK_TH_HYST_SEL_POS), - APEX_CONFIG5_LOWG_PEAK_TH_HYST_63_MG = (1 << APEX_CONFIG5_LOWG_PEAK_TH_HYST_SEL_POS), - APEX_CONFIG5_LOWG_PEAK_TH_HYST_94_MG = (2 << APEX_CONFIG5_LOWG_PEAK_TH_HYST_SEL_POS), - APEX_CONFIG5_LOWG_PEAK_TH_HYST_125_MG = (3 << APEX_CONFIG5_LOWG_PEAK_TH_HYST_SEL_POS), - APEX_CONFIG5_LOWG_PEAK_TH_HYST_156_MG = (4 << APEX_CONFIG5_LOWG_PEAK_TH_HYST_SEL_POS), - APEX_CONFIG5_LOWG_PEAK_TH_HYST_188_MG = (5 << APEX_CONFIG5_LOWG_PEAK_TH_HYST_SEL_POS), - APEX_CONFIG5_LOWG_PEAK_TH_HYST_219_MG = (6 << APEX_CONFIG5_LOWG_PEAK_TH_HYST_SEL_POS), - APEX_CONFIG5_LOWG_PEAK_TH_HYST_250_MG = (7 << APEX_CONFIG5_LOWG_PEAK_TH_HYST_SEL_POS), -} APEX_CONFIG5_LOWG_PEAK_TH_HYST_t; - -/* HIGHG_PEAK_TH_HYST_SEL */ -typedef enum { - APEX_CONFIG5_HIGHG_PEAK_TH_HYST_31_MG = (0 << APEX_CONFIG5_HIGHG_PEAK_TH_HYST_SEL_POS), - APEX_CONFIG5_HIGHG_PEAK_TH_HYST_63_MG = (1 << APEX_CONFIG5_HIGHG_PEAK_TH_HYST_SEL_POS), - APEX_CONFIG5_HIGHG_PEAK_TH_HYST_94_MG = (2 << APEX_CONFIG5_HIGHG_PEAK_TH_HYST_SEL_POS), - APEX_CONFIG5_HIGHG_PEAK_TH_HYST_125_MG = (3 << APEX_CONFIG5_HIGHG_PEAK_TH_HYST_SEL_POS), - APEX_CONFIG5_HIGHG_PEAK_TH_HYST_156_MG = (4 << APEX_CONFIG5_HIGHG_PEAK_TH_HYST_SEL_POS), - APEX_CONFIG5_HIGHG_PEAK_TH_HYST_188_MG = (5 << APEX_CONFIG5_HIGHG_PEAK_TH_HYST_SEL_POS), - APEX_CONFIG5_HIGHG_PEAK_TH_HYST_219_MG = (6 << APEX_CONFIG5_HIGHG_PEAK_TH_HYST_SEL_POS), - APEX_CONFIG5_HIGHG_PEAK_TH_HYST_250_MG = (7 << APEX_CONFIG5_HIGHG_PEAK_TH_HYST_SEL_POS), -} APEX_CONFIG5_HIGHG_PEAK_TH_HYST_t; - - -/* - * APEX_CONFIG9_MREG1 - * Register Name: APEX_CONFIG9 -*/ - -/* FF_DEBOUNCE_DURATION_SEL */ -typedef enum { - APEX_CONFIG9_FF_DEBOUNCE_DURATION_0_MS = (0 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), - APEX_CONFIG9_FF_DEBOUNCE_DURATION_1250_MS = (1 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), - APEX_CONFIG9_FF_DEBOUNCE_DURATION_1375_MS = (2 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), - APEX_CONFIG9_FF_DEBOUNCE_DURATION_1500_MS = (3 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), - APEX_CONFIG9_FF_DEBOUNCE_DURATION_1625_MS = (4 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), - APEX_CONFIG9_FF_DEBOUNCE_DURATION_1750_MS = (5 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), - APEX_CONFIG9_FF_DEBOUNCE_DURATION_1875_MS = (6 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), - APEX_CONFIG9_FF_DEBOUNCE_DURATION_2000_MS = (7 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), - APEX_CONFIG9_FF_DEBOUNCE_DURATION_2125_MS = (8 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), - APEX_CONFIG9_FF_DEBOUNCE_DURATION_2250_MS = (9 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), - APEX_CONFIG9_FF_DEBOUNCE_DURATION_2375_MS = (10 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), - APEX_CONFIG9_FF_DEBOUNCE_DURATION_2500_MS = (11 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), - APEX_CONFIG9_FF_DEBOUNCE_DURATION_2625_MS = (12 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), - APEX_CONFIG9_FF_DEBOUNCE_DURATION_2750_MS = (13 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), - APEX_CONFIG9_FF_DEBOUNCE_DURATION_2875_MS = (14 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), - APEX_CONFIG9_FF_DEBOUNCE_DURATION_3000_MS = (15 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), -} APEX_CONFIG9_FF_DEBOUNCE_DURATION_t; - -/* SMD_SENSITIVITY_SEL */ -typedef enum { - APEX_CONFIG9_SMD_SENSITIVITY_0 = (0 << APEX_CONFIG9_SMD_SENSITIVITY_SEL_POS), - APEX_CONFIG9_SMD_SENSITIVITY_1 = (1 << APEX_CONFIG9_SMD_SENSITIVITY_SEL_POS), - APEX_CONFIG9_SMD_SENSITIVITY_2 = (2 << APEX_CONFIG9_SMD_SENSITIVITY_SEL_POS), - APEX_CONFIG9_SMD_SENSITIVITY_3 = (3 << APEX_CONFIG9_SMD_SENSITIVITY_SEL_POS), - APEX_CONFIG9_SMD_SENSITIVITY_4 = (4 << APEX_CONFIG9_SMD_SENSITIVITY_SEL_POS), -} APEX_CONFIG9_SMD_SENSITIVITY_t; - -/* SMD_SENSITIVITY_MODE */ -typedef enum { - APEX_CONFIG9_SENSITIVITY_MODE_NORMAL = (0 << APEX_CONFIG9_SENSITIVITY_MODE_POS), - APEX_CONFIG9_SENSITIVITY_MODE_SLOW_WALK = (1 << APEX_CONFIG9_SENSITIVITY_MODE_POS), -} APEX_CONFIG9_SENSITIVITY_MODE_t; - - -/* - * APEX_CONFIG10_MREG1 - * Register Name: APEX_CONFIG10 -*/ - -/* LOWG_PEAK_TH_SEL */ -typedef enum { - APEX_CONFIG10_LOWG_PEAK_TH_31_MG = (0x00 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), - APEX_CONFIG10_LOWG_PEAK_TH_63_MG = (0x01 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), - APEX_CONFIG10_LOWG_PEAK_TH_94_MG = (0x02 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), - APEX_CONFIG10_LOWG_PEAK_TH_125_MG = (0x03 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), - APEX_CONFIG10_LOWG_PEAK_TH_156_MG = (0x04 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), - APEX_CONFIG10_LOWG_PEAK_TH_188_MG = (0x05 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), - APEX_CONFIG10_LOWG_PEAK_TH_219_MG = (0x06 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), - APEX_CONFIG10_LOWG_PEAK_TH_250_MG = (0x07 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), - APEX_CONFIG10_LOWG_PEAK_TH_281_MG = (0x08 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), - APEX_CONFIG10_LOWG_PEAK_TH_313_MG = (0x09 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), - APEX_CONFIG10_LOWG_PEAK_TH_344_MG = (0x0A << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), - APEX_CONFIG10_LOWG_PEAK_TH_375_MG = (0x0B << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), - APEX_CONFIG10_LOWG_PEAK_TH_406_MG = (0x0C << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), - APEX_CONFIG10_LOWG_PEAK_TH_438_MG = (0x0D << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), - APEX_CONFIG10_LOWG_PEAK_TH_469_MG = (0x0E << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), - APEX_CONFIG10_LOWG_PEAK_TH_500_MG = (0x0F << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), - APEX_CONFIG10_LOWG_PEAK_TH_531_MG = (0x10 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), - APEX_CONFIG10_LOWG_PEAK_TH_563_MG = (0x11 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), - APEX_CONFIG10_LOWG_PEAK_TH_594_MG = (0x12 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), - APEX_CONFIG10_LOWG_PEAK_TH_625_MG = (0x13 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), - APEX_CONFIG10_LOWG_PEAK_TH_656_MG = (0x14 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), - APEX_CONFIG10_LOWG_PEAK_TH_688_MG = (0x15 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), - APEX_CONFIG10_LOWG_PEAK_TH_719_MG = (0x16 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), - APEX_CONFIG10_LOWG_PEAK_TH_750_MG = (0x17 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), - APEX_CONFIG10_LOWG_PEAK_TH_781_MG = (0x18 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), - APEX_CONFIG10_LOWG_PEAK_TH_813_MG = (0x19 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), - APEX_CONFIG10_LOWG_PEAK_TH_844_MG = (0x1A << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), - APEX_CONFIG10_LOWG_PEAK_TH_875_MG = (0x1B << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), - APEX_CONFIG10_LOWG_PEAK_TH_906_MG = (0x1C << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), - APEX_CONFIG10_LOWG_PEAK_TH_938_MG = (0x1D << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), - APEX_CONFIG10_LOWG_PEAK_TH_969_MG = (0x1E << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), - APEX_CONFIG10_LOWG_PEAK_TH_1000_MG = (0x1F << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), -} APEX_CONFIG10_LOWG_PEAK_TH_t; - -/* LOWG_TIME_TH_SEL */ -typedef enum { - APEX_CONFIG10_LOWG_TIME_TH_1_SAMPLE = (0x00 << APEX_CONFIG10_LOWG_TIME_TH_SEL_POS), - APEX_CONFIG10_LOWG_TIME_TH_2_SAMPLES = (0x01 << APEX_CONFIG10_LOWG_TIME_TH_SEL_POS), - APEX_CONFIG10_LOWG_TIME_TH_3_SAMPLES = (0x02 << APEX_CONFIG10_LOWG_TIME_TH_SEL_POS), - APEX_CONFIG10_LOWG_TIME_TH_4_SAMPLES = (0x03 << APEX_CONFIG10_LOWG_TIME_TH_SEL_POS), - APEX_CONFIG10_LOWG_TIME_TH_5_SAMPLES = (0x04 << APEX_CONFIG10_LOWG_TIME_TH_SEL_POS), - APEX_CONFIG10_LOWG_TIME_TH_6_SAMPLES = (0x05 << APEX_CONFIG10_LOWG_TIME_TH_SEL_POS), - APEX_CONFIG10_LOWG_TIME_TH_7_SAMPLES = (0x06 << APEX_CONFIG10_LOWG_TIME_TH_SEL_POS), - APEX_CONFIG10_LOWG_TIME_TH_8_SAMPLES = (0x07 << APEX_CONFIG10_LOWG_TIME_TH_SEL_POS), -} APEX_CONFIG10_LOWG_TIME_TH_SAMPLES_t; - - -/* - * APEX_CONFIG11_MREG1 - * Register Name: APEX_CONFIG11 -*/ - -/* HIGHG_PEAK_TH_SEL */ -typedef enum { - APEX_CONFIG11_HIGHG_PEAK_TH_250_MG = (0x00 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), - APEX_CONFIG11_HIGHG_PEAK_TH_500_MG = (0x01 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), - APEX_CONFIG11_HIGHG_PEAK_TH_750_MG = (0x02 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), - APEX_CONFIG11_HIGHG_PEAK_TH_1000MG = (0x03 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), - APEX_CONFIG11_HIGHG_PEAK_TH_1250_MG = (0x04 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), - APEX_CONFIG11_HIGHG_PEAK_TH_1500_MG = (0x05 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), - APEX_CONFIG11_HIGHG_PEAK_TH_1750_MG = (0x06 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), - APEX_CONFIG11_HIGHG_PEAK_TH_2000_MG = (0x07 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), - APEX_CONFIG11_HIGHG_PEAK_TH_2250_MG = (0x08 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), - APEX_CONFIG11_HIGHG_PEAK_TH_2500_MG = (0x09 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), - APEX_CONFIG11_HIGHG_PEAK_TH_2750_MG = (0x0A << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), - APEX_CONFIG11_HIGHG_PEAK_TH_3000_MG = (0x0B << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), - APEX_CONFIG11_HIGHG_PEAK_TH_3250_MG = (0x0C << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), - APEX_CONFIG11_HIGHG_PEAK_TH_3500_MG = (0x0D << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), - APEX_CONFIG11_HIGHG_PEAK_TH_3750_MG = (0x0E << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), - APEX_CONFIG11_HIGHG_PEAK_TH_4000_MG = (0x0F << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), - APEX_CONFIG11_HIGHG_PEAK_TH_4250_MG = (0x10 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), - APEX_CONFIG11_HIGHG_PEAK_TH_4500_MG = (0x11 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), - APEX_CONFIG11_HIGHG_PEAK_TH_4750_MG = (0x12 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), - APEX_CONFIG11_HIGHG_PEAK_TH_5000_MG = (0x13 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), - APEX_CONFIG11_HIGHG_PEAK_TH_5250_MG = (0x14 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), - APEX_CONFIG11_HIGHG_PEAK_TH_5500_MG = (0x15 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), - APEX_CONFIG11_HIGHG_PEAK_TH_5750_MG = (0x16 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), - APEX_CONFIG11_HIGHG_PEAK_TH_6000_MG = (0x17 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), - APEX_CONFIG11_HIGHG_PEAK_TH_6250_MG = (0x18 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), - APEX_CONFIG11_HIGHG_PEAK_TH_6500_MG = (0x19 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), - APEX_CONFIG11_HIGHG_PEAK_TH_6750_MG = (0x1A << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), - APEX_CONFIG11_HIGHG_PEAK_TH_7000_MG = (0x1B << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), - APEX_CONFIG11_HIGHG_PEAK_TH_7250_MG = (0x1C << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), - APEX_CONFIG11_HIGHG_PEAK_TH_7500_MG = (0x1D << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), - APEX_CONFIG11_HIGHG_PEAK_TH_7750_MG = (0x1E << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), - APEX_CONFIG11_HIGHG_PEAK_TH_8000_MG = (0x1F << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), -} APEX_CONFIG11_HIGHG_PEAK_TH_t; - -/* HIGHG_TIME_TH_SEL */ -typedef enum { - APEX_CONFIG11_HIGHG_TIME_TH_1_SAMPLE = (0x00 << APEX_CONFIG11_HIGHG_TIME_TH_SEL_POS), - APEX_CONFIG11_HIGHG_TIME_TH_2_SAMPLES = (0x01 << APEX_CONFIG11_HIGHG_TIME_TH_SEL_POS), - APEX_CONFIG11_HIGHG_TIME_TH_3_SAMPLES = (0x02 << APEX_CONFIG11_HIGHG_TIME_TH_SEL_POS), - APEX_CONFIG11_HIGHG_TIME_TH_4_SAMPLES = (0x03 << APEX_CONFIG11_HIGHG_TIME_TH_SEL_POS), - APEX_CONFIG11_HIGHG_TIME_TH_5_SAMPLES = (0x04 << APEX_CONFIG11_HIGHG_TIME_TH_SEL_POS), - APEX_CONFIG11_HIGHG_TIME_TH_6_SAMPLES = (0x05 << APEX_CONFIG11_HIGHG_TIME_TH_SEL_POS), - APEX_CONFIG11_HIGHG_TIME_TH_7_SAMPLES = (0x06 << APEX_CONFIG11_HIGHG_TIME_TH_SEL_POS), - APEX_CONFIG11_HIGHG_TIME_TH_8_SAMPLES = (0x07 << APEX_CONFIG11_HIGHG_TIME_TH_SEL_POS), -} APEX_CONFIG11_HIGHG_TIME_TH_SAMPLES_t; - - -/* - * FDR_CONFIG_MREG1 - * Register Name: FDR_CONFIG - */ - -/* FDR_SEL */ -typedef enum { - FDR_CONFIG_FDR_SEL_DIS = (0x0 << FDR_CONFIG_FDR_SEL_POS), - FDR_CONFIG_FDR_SEL_FACTOR_2 = (0x8 << FDR_CONFIG_FDR_SEL_POS), - FDR_CONFIG_FDR_SEL_FACTOR_4 = (0x9 << FDR_CONFIG_FDR_SEL_POS), - FDR_CONFIG_FDR_SEL_FACTOR_8 = (0xA << FDR_CONFIG_FDR_SEL_POS), - FDR_CONFIG_FDR_SEL_FACTOR_16 = (0xB << FDR_CONFIG_FDR_SEL_POS), - FDR_CONFIG_FDR_SEL_FACTOR_32 = (0xC << FDR_CONFIG_FDR_SEL_POS), - FDR_CONFIG_FDR_SEL_FACTOR_64 = (0xD << FDR_CONFIG_FDR_SEL_POS), - FDR_CONFIG_FDR_SEL_FACTOR_128 = (0xE << FDR_CONFIG_FDR_SEL_POS), - FDR_CONFIG_FDR_SEL_FACTOR_256 = (0xF << FDR_CONFIG_FDR_SEL_POS), -} FDR_CONFIG_FDR_SEL_t; - - -/* - * APEX_CONFIG12_MREG1 - * Register Name: APEX_CONFIG12 -*/ -/* FF_MAX_DURATION_SEL */ -typedef enum { - APEX_CONFIG12_FF_MAX_DURATION_102_CM = (0 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), - APEX_CONFIG12_FF_MAX_DURATION_120_CM = (1 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), - APEX_CONFIG12_FF_MAX_DURATION_139_CM = (2 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), - APEX_CONFIG12_FF_MAX_DURATION_159_CM = (3 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), - APEX_CONFIG12_FF_MAX_DURATION_181_CM = (4 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), - APEX_CONFIG12_FF_MAX_DURATION_204_CM = (5 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), - APEX_CONFIG12_FF_MAX_DURATION_228_CM = (6 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), - APEX_CONFIG12_FF_MAX_DURATION_254_CM = (7 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), - APEX_CONFIG12_FF_MAX_DURATION_281_CM = (8 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), - APEX_CONFIG12_FF_MAX_DURATION_310_CM = (9 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), - APEX_CONFIG12_FF_MAX_DURATION_339_CM = (10 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), - APEX_CONFIG12_FF_MAX_DURATION_371_CM = (11 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), - APEX_CONFIG12_FF_MAX_DURATION_403_CM = (12 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), - APEX_CONFIG12_FF_MAX_DURATION_438_CM = (13 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), - APEX_CONFIG12_FF_MAX_DURATION_473_CM = (14 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), - APEX_CONFIG12_FF_MAX_DURATION_510_CM = (15 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), -} APEX_CONFIG12_FF_MAX_DURATION_t; - -/* FF_MIN_DURATION_SEL */ -typedef enum { - APEX_CONFIG12_FF_MIN_DURATION_10_CM = (0 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), - APEX_CONFIG12_FF_MIN_DURATION_12_CM = (1 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), - APEX_CONFIG12_FF_MIN_DURATION_13_CM = (2 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), - APEX_CONFIG12_FF_MIN_DURATION_16_CM = (3 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), - APEX_CONFIG12_FF_MIN_DURATION_18_CM = (4 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), - APEX_CONFIG12_FF_MIN_DURATION_20_CM = (5 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), - APEX_CONFIG12_FF_MIN_DURATION_23_CM = (6 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), - APEX_CONFIG12_FF_MIN_DURATION_25_CM = (7 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), - APEX_CONFIG12_FF_MIN_DURATION_28_CM = (8 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), - APEX_CONFIG12_FF_MIN_DURATION_31_CM = (9 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), - APEX_CONFIG12_FF_MIN_DURATION_34_CM = (10 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), - APEX_CONFIG12_FF_MIN_DURATION_38_CM = (11 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), - APEX_CONFIG12_FF_MIN_DURATION_41_CM = (12 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), - APEX_CONFIG12_FF_MIN_DURATION_45_CM = (13 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), - APEX_CONFIG12_FF_MIN_DURATION_48_CM = (14 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), - APEX_CONFIG12_FF_MIN_DURATION_52_CM = (15 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), -} APEX_CONFIG12_FF_MIN_DURATION_t; - - - -/* --------------------------------------------------------------------------- - * register bank MREG2 - * ---------------------------------------------------------------------------- */ - -/* - * OTP_CTRL7_MREG2 - * Register Name: OTP_CTRL7 -*/ - -/* OTP_CTRL7 */ -typedef enum { - OTP_CTRL7_OTP_RELOAD_EN = (1 << OTP_CTRL7_OTP_RELOAD_POS), - OTP_CTRL7_OTP_RELOAD_DIS = (0 << OTP_CTRL7_OTP_RELOAD_POS), -} OTP_CTRL7_OTP_RELOAD_t; - -/* OTP_PWR_DOWN */ -typedef enum { - OTP_CTRL7_PWR_DOWN_EN = (1 << OTP_CTRL7_OTP_PWR_DOWN_POS), - OTP_CTRL7_PWR_DOWN_DIS = (0 << OTP_CTRL7_OTP_PWR_DOWN_POS), -} OTP_CTRL7_PWR_DOWN_t; - - -#ifdef __cplusplus -} -#endif - -#endif /* #ifndef _INV_IMU_DEFS_H_ */ +/* + * ________________________________________________________________________________________________________ + * Copyright (c) 2017 InvenSense Inc. All rights reserved. + * + * This software, related documentation and any modifications thereto (collectively "Software") is subject + * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright + * and other intellectual property rights laws. + * + * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software + * and any use, reproduction, disclosure or distribution of the Software without an express license agreement + * from InvenSense is strictly prohibited. + * + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS + * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED + * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL + * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, + * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THE SOFTWARE. + * ________________________________________________________________________________________________________ + */ + +#ifndef _INV_IMU_DEFS_H_ +#define _INV_IMU_DEFS_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/** @file inv_imu_defs.h + * File exposing the device register map + */ + +#include +/* List whoami values for all device variants*/ +#define T1000_WHOAMI 0x30 +#define ICM42607P_WHOAMI 0x60 +#define ICM42670P_WHOAMI 0x67 +#define ICM42670T_WHOAMI 0x64 +#define ICM42670S_WHOAMI 0x69 + +/* Define whoami value for the targeted product and make sure the target is valid */ +#if defined(T1000) + #define ICM_WHOAMI T1000_WHOAMI +#elif defined(ICM42607P) + #define ICM_WHOAMI ICM42607P_WHOAMI +#elif defined(ICM42670P) + #define ICM_WHOAMI ICM42670P_WHOAMI +#elif defined(ICM42670T) + #define ICM_WHOAMI ICM42670T_WHOAMI +#elif defined(ICM42670S) + #define ICM_WHOAMI ICM42670S_WHOAMI +#else + #error "Please define which IMU variant is targeted." +#endif + + +#include "inv_imu_regmap.h" + +/* ---------------------------------------------------------------------------- + * Device features + * + * Next macros define some of the device features such as FIFO, sensor data + * size or whoami value. + * ---------------------------------------------------------------------------- */ + +#define ACCEL_DATA_SIZE 6 +#define GYRO_DATA_SIZE 6 +#define TEMP_DATA_SIZE 2 + + +#define FIFO_HEADER_SIZE 1 +#define FIFO_ACCEL_DATA_SIZE ACCEL_DATA_SIZE +#define FIFO_GYRO_DATA_SIZE GYRO_DATA_SIZE +#define FIFO_TEMP_DATA_SIZE 1 +#define FIFO_TS_FSYNC_SIZE 2 +#define FIFO_TEMP_HIGH_RES_SIZE 1 +#define FIFO_ACCEL_GYRO_HIGH_RES_SIZE 3 + +#define FIFO_16BYTES_PACKET_SIZE (FIFO_HEADER_SIZE + FIFO_ACCEL_DATA_SIZE + FIFO_GYRO_DATA_SIZE + FIFO_TEMP_DATA_SIZE + FIFO_TS_FSYNC_SIZE) +#define FIFO_20BYTES_PACKET_SIZE (FIFO_HEADER_SIZE + FIFO_ACCEL_DATA_SIZE + FIFO_GYRO_DATA_SIZE + FIFO_TEMP_DATA_SIZE + FIFO_TS_FSYNC_SIZE +\ + FIFO_TEMP_HIGH_RES_SIZE + FIFO_ACCEL_GYRO_HIGH_RES_SIZE) + +#define FIFO_HEADER_ODR_ACCEL 0x01 +#define FIFO_HEADER_ODR_GYRO 0x02 +#define FIFO_HEADER_FSYNC 0x04 +#define FIFO_HEADER_TMST 0x08 +#define FIFO_HEADER_HEADER_20 0x10 +#define FIFO_HEADER_GYRO 0x20 +#define FIFO_HEADER_ACC 0x40 +#define FIFO_HEADER_MSG 0x80 + + +#define INVALID_VALUE_FIFO ((int16_t)0x8000) +#define INVALID_VALUE_FIFO_1B ((int8_t)0x80) +#define OUT_OF_BOUND_TEMPERATURE_NEG_FIFO_1B ((int8_t)0x81) +#define OUT_OF_BOUND_TEMPERATURE_POS_FIFO_1B ((int8_t)0x7F) + +/** Describe the content of the FIFO header */ +typedef union { + unsigned char Byte; + struct { + unsigned char gyro_odr_different : 1; + unsigned char accel_odr_different : 1; + unsigned char fsync_bit : 1; + unsigned char timestamp_bit : 1; + unsigned char twentybits_bit : 1; + unsigned char gyro_bit : 1; + unsigned char accel_bit : 1; + unsigned char msg_bit : 1; + } bits; +} fifo_header_t; + + +/* ---------------------------------------------------------------------------- + * Device registers description + * + * Next section defines some of the registers bitfield and declare corresponding + * accessors. + * Note that descriptors and accessors are not provided for all the registers + * but only for the most useful ones. + * For all details on registers and bitfields functionalities please refer to + * the device datasheet. + * ---------------------------------------------------------------------------- */ + + +/* --------------------------------------------------------------------------- + * register bank 0 + * ---------------------------------------------------------------------------- */ + +/* + * CHIP_CONFIG + * Register Name : CHIP_CONFIG + */ + +/* SPI_MODE */ +typedef enum { + CHIP_CONFIG_SPI_MODE_1_2 = (0x1 << DEVICE_CONFIG_SPI_MODE_POS), + CHIP_CONFIG_SPI_MODE_0_3 = (0x0 << DEVICE_CONFIG_SPI_MODE_POS), +} CHIP_CONFIG_SPI_MODE_t; + + +/* + * SIGNAL_PATH_RESET + * Register Name: SIGNAL_PATH_RESET + */ + +/* SOFT_RESET_DEVICE_CONFIG */ +typedef enum { + SIGNAL_PATH_RESET_SOFT_RESET_DEVICE_CONFIG_EN = (0x01 << SIGNAL_PATH_RESET_SOFT_RESET_DEVICE_CONFIG_POS), + SIGNAL_PATH_RESET_SOFT_RESET_DEVICE_CONFIG_DIS = (0x00 << SIGNAL_PATH_RESET_SOFT_RESET_DEVICE_CONFIG_POS), +} SIGNAL_PATH_RESET_SOFT_RESET_DEVICE_CONFIG_t; + +/* FIFO_FLUSH */ +typedef enum { + SIGNAL_PATH_RESET_FIFO_FLUSH_EN = (0x01 << SIGNAL_PATH_RESET_FIFO_FLUSH_POS), + SIGNAL_PATH_RESET_FIFO_FLUSH_DIS = (0x00 << SIGNAL_PATH_RESET_FIFO_FLUSH_POS), +} SIGNAL_PATH_RESET_FIFO_FLUSH_t; + + +/* + * INT_CONFIG + * Register Name: INT_CONFIG + */ + +/* INT2_MODE */ +typedef enum { + INT_CONFIG_INT2_MODE_LATCHED = (0x01 << INT_CONFIG_INT2_MODE_POS), + INT_CONFIG_INT2_MODE_PULSED = (0x00 << INT_CONFIG_INT2_MODE_POS), +} INT_CONFIG_INT2_MODE_t; + +/* INT2_DRIVE_CIRCUIT */ +typedef enum { + INT_CONFIG_INT2_DRIVE_CIRCUIT_PP = (0x01 << INT_CONFIG_INT2_DRIVE_CIRCUIT_POS), + INT_CONFIG_INT2_DRIVE_CIRCUIT_OD = (0x00 << INT_CONFIG_INT2_DRIVE_CIRCUIT_POS), +} INT_CONFIG_INT2_DRIVE_CIRCUIT_t; + +/* INT2_POLARITY */ +typedef enum { + INT_CONFIG_INT2_POLARITY_HIGH = (0x01 << INT_CONFIG_INT2_POLARITY_POS), + INT_CONFIG_INT2_POLARITY_LOW = (0x00 << INT_CONFIG_INT2_POLARITY_POS), +} INT_CONFIG_INT2_POLARITY_t; + +/* INT1_MODE */ +typedef enum { + INT_CONFIG_INT1_MODE_LATCHED = (0x01 << INT_CONFIG_INT1_MODE_POS), + INT_CONFIG_INT1_MODE_PULSED = (0x00 << INT_CONFIG_INT1_MODE_POS), +} INT_CONFIG_INT1_MODE_t; + +/* INT1_DRIVE_CIRCUIT */ +typedef enum { + INT_CONFIG_INT1_DRIVE_CIRCUIT_PP = (0x01 << INT_CONFIG_INT1_DRIVE_CIRCUIT_POS), + INT_CONFIG_INT1_DRIVE_CIRCUIT_OD = (0x00 << INT_CONFIG_INT1_DRIVE_CIRCUIT_POS), +} INT_CONFIG_INT1_DRIVE_CIRCUIT_t; + +/* INT1_POLARITY */ +typedef enum { + INT_CONFIG_INT1_POLARITY_HIGH = 0x01, + INT_CONFIG_INT1_POLARITY_LOW = 0x00, +} INT_CONFIG_INT1_POLARITY_t; + + +/* + * PWR_MGMT0 + * Register Name: PWR_MGMT0 + */ + +/* ACCEL_LP_CLK_SEL */ +typedef enum { + PWR_MGMT0_ACCEL_LP_CLK_WUOSC = (0x00 << PWR_MGMT0_ACCEL_LP_CLK_SEL_POS), + PWR_MGMT0_ACCEL_LP_CLK_RCOSC = (0x01 << PWR_MGMT0_ACCEL_LP_CLK_SEL_POS), +} PWR_MGMT0_ACCEL_LP_CLK_t; + +/* IDLE */ +typedef enum { + PWR_MGMT0_IDLE_DIS = (0x01 << PWR_MGMT0_IDLE_POS), + PWR_MGMT0_IDLE_EN = (0x00 << PWR_MGMT0_IDLE_POS), +} PWR_MGMT0_IDLE_t; + +/* GYRO_MODE */ +typedef enum { + PWR_MGMT0_GYRO_MODE_LN = (0x03 << PWR_MGMT0_GYRO_MODE_POS), + PWR_MGMT0_GYRO_MODE_LP = (0x02 << PWR_MGMT0_GYRO_MODE_POS), + PWR_MGMT0_GYRO_MODE_STANDBY = (0x01 << PWR_MGMT0_GYRO_MODE_POS), + PWR_MGMT0_GYRO_MODE_OFF = (0x00 << PWR_MGMT0_GYRO_MODE_POS), +} PWR_MGMT0_GYRO_MODE_t; + +/* ACCEL_MODE */ +typedef enum { + PWR_MGMT0_ACCEL_MODE_LN = 0x03, + PWR_MGMT0_ACCEL_MODE_LP = 0x02, + PWR_MGMT0_ACCEL_MODE_OFF = 0x00, +} PWR_MGMT0_ACCEL_MODE_t; + + +/* + * GYRO_CONFIG0 + * Register Name: GYRO_CONFIG0 + */ + +/* GYRO_FS_SEL*/ +typedef enum { + GYRO_CONFIG0_FS_SEL_250dps = (3 << GYRO_CONFIG0_GYRO_UI_FS_SEL_POS), + GYRO_CONFIG0_FS_SEL_500dps = (2 << GYRO_CONFIG0_GYRO_UI_FS_SEL_POS), + GYRO_CONFIG0_FS_SEL_1000dps = (1 << GYRO_CONFIG0_GYRO_UI_FS_SEL_POS), + GYRO_CONFIG0_FS_SEL_2000dps = (0 << GYRO_CONFIG0_GYRO_UI_FS_SEL_POS), +} GYRO_CONFIG0_FS_SEL_t; + +/* GYRO_ODR */ +typedef enum { + GYRO_CONFIG0_ODR_1_5625_HZ = 0xF, + GYRO_CONFIG0_ODR_3_125_HZ = 0xE, + GYRO_CONFIG0_ODR_6_25_HZ = 0xD, + GYRO_CONFIG0_ODR_12_5_HZ = 0xC, + GYRO_CONFIG0_ODR_25_HZ = 0xB, + GYRO_CONFIG0_ODR_50_HZ = 0xA, + GYRO_CONFIG0_ODR_100_HZ = 0x9, + GYRO_CONFIG0_ODR_200_HZ = 0x8, + GYRO_CONFIG0_ODR_400_HZ = 0x7, + GYRO_CONFIG0_ODR_800_HZ = 0x6, + GYRO_CONFIG0_ODR_1600_HZ = 0x5, +} GYRO_CONFIG0_ODR_t; + + +/* + * ACCEL_CONFIG0 + * Register Name: ACCEL_CONFIG0 + */ + +/* ACCEL_FS_SEL */ +typedef enum { + ACCEL_CONFIG0_FS_SEL_2g = (0x3 << ACCEL_CONFIG0_ACCEL_UI_FS_SEL_POS), + ACCEL_CONFIG0_FS_SEL_4g = (0x2 << ACCEL_CONFIG0_ACCEL_UI_FS_SEL_POS), + ACCEL_CONFIG0_FS_SEL_8g = (0x1 << ACCEL_CONFIG0_ACCEL_UI_FS_SEL_POS), + ACCEL_CONFIG0_FS_SEL_16g = (0x0 << ACCEL_CONFIG0_ACCEL_UI_FS_SEL_POS), +} ACCEL_CONFIG0_FS_SEL_t; + +/* ACCEL_ODR */ +typedef enum { + ACCEL_CONFIG0_ODR_1_5625_HZ = 0xF, + ACCEL_CONFIG0_ODR_3_125_HZ = 0xE, + ACCEL_CONFIG0_ODR_6_25_HZ = 0xD, + ACCEL_CONFIG0_ODR_12_5_HZ = 0xC, + ACCEL_CONFIG0_ODR_25_HZ = 0xB, + ACCEL_CONFIG0_ODR_50_HZ = 0xA, + ACCEL_CONFIG0_ODR_100_HZ = 0x9, + ACCEL_CONFIG0_ODR_200_HZ = 0x8, + ACCEL_CONFIG0_ODR_400_HZ = 0x7, + ACCEL_CONFIG0_ODR_800_HZ = 0x6, + ACCEL_CONFIG0_ODR_1600_HZ = 0x5, +} ACCEL_CONFIG0_ODR_t; + + +/* + * GYRO_CONFIG1 + * Register Name: GYRO_CONFIG1 + */ + +/* GYRO_UI_FILT_BW_IND */ +typedef enum { + GYRO_CONFIG1_GYRO_FILT_BW_16 = (0x07 << GYRO_CONFIG1_GYRO_UI_FILT_BW_POS), + GYRO_CONFIG1_GYRO_FILT_BW_25 = (0x06 << GYRO_CONFIG1_GYRO_UI_FILT_BW_POS), + GYRO_CONFIG1_GYRO_FILT_BW_34 = (0x05 << GYRO_CONFIG1_GYRO_UI_FILT_BW_POS), + GYRO_CONFIG1_GYRO_FILT_BW_53 = (0x04 << GYRO_CONFIG1_GYRO_UI_FILT_BW_POS), + GYRO_CONFIG1_GYRO_FILT_BW_73 = (0x03 << GYRO_CONFIG1_GYRO_UI_FILT_BW_POS), + GYRO_CONFIG1_GYRO_FILT_BW_121 = (0x02 << GYRO_CONFIG1_GYRO_UI_FILT_BW_POS), + GYRO_CONFIG1_GYRO_FILT_BW_180 = (0x01 << GYRO_CONFIG1_GYRO_UI_FILT_BW_POS), + GYRO_CONFIG1_GYRO_FILT_BW_NO_FILTER = (0x00 << GYRO_CONFIG1_GYRO_UI_FILT_BW_POS), +} GYRO_CONFIG1_GYRO_FILT_BW_t; + + +/* + * ACCEL_CONFIG1 + * Register Name: ACCEL_CONFIG1 + */ + +/* ACCEL_UI_AVG_IND */ +typedef enum { + ACCEL_CONFIG1_ACCEL_FILT_AVG_64 = (0x5 << ACCEL_CONFIG1_ACCEL_UI_AVG_POS), + ACCEL_CONFIG1_ACCEL_FILT_AVG_32 = (0x4 << ACCEL_CONFIG1_ACCEL_UI_AVG_POS), + ACCEL_CONFIG1_ACCEL_FILT_AVG_16 = (0x3 << ACCEL_CONFIG1_ACCEL_UI_AVG_POS), + ACCEL_CONFIG1_ACCEL_FILT_AVG_8 = (0x2 << ACCEL_CONFIG1_ACCEL_UI_AVG_POS), + ACCEL_CONFIG1_ACCEL_FILT_AVG_4 = (0x1 << ACCEL_CONFIG1_ACCEL_UI_AVG_POS), + ACCEL_CONFIG1_ACCEL_FILT_AVG_2 = (0x0 << ACCEL_CONFIG1_ACCEL_UI_AVG_POS), +} ACCEL_CONFIG1_ACCEL_FILT_AVG_t; + +/* ACCEL_UI_FILT_BW_IND */ +typedef enum { + ACCEL_CONFIG1_ACCEL_FILT_BW_16 = (0x7 << ACCEL_CONFIG1_ACCEL_UI_FILT_BW_POS), + ACCEL_CONFIG1_ACCEL_FILT_BW_25 = (0x6 << ACCEL_CONFIG1_ACCEL_UI_FILT_BW_POS), + ACCEL_CONFIG1_ACCEL_FILT_BW_34 = (0x5 << ACCEL_CONFIG1_ACCEL_UI_FILT_BW_POS), + ACCEL_CONFIG1_ACCEL_FILT_BW_53 = (0x4 << ACCEL_CONFIG1_ACCEL_UI_FILT_BW_POS), + ACCEL_CONFIG1_ACCEL_FILT_BW_73 = (0x3 << ACCEL_CONFIG1_ACCEL_UI_FILT_BW_POS), + ACCEL_CONFIG1_ACCEL_FILT_BW_121 = (0x2 << ACCEL_CONFIG1_ACCEL_UI_FILT_BW_POS), + ACCEL_CONFIG1_ACCEL_FILT_BW_180 = (0x1 << ACCEL_CONFIG1_ACCEL_UI_FILT_BW_POS), + ACCEL_CONFIG1_ACCEL_FILT_BW_NO_FILTER = (0x0 << ACCEL_CONFIG1_ACCEL_UI_FILT_BW_POS), +} ACCEL_CONFIG1_ACCEL_FILT_BW_t; + + +/* + * APEX_CONFIG0 + * Register Name: APEX_CONFIG0 + */ + +/* DMP_POWER_SAVE_EN */ +typedef enum { + APEX_CONFIG0_DMP_POWER_SAVE_EN = (0x1 << APEX_CONFIG0_DMP_POWER_SAVE_EN_POS), + APEX_CONFIG0_DMP_POWER_SAVE_DIS = (0x0 << APEX_CONFIG0_DMP_POWER_SAVE_EN_POS), +} APEX_CONFIG0_DMP_POWER_SAVE_t; + +/* DMP_INIT_EN */ +typedef enum { + APEX_CONFIG0_DMP_INIT_EN = (0x01 << APEX_CONFIG0_DMP_INIT_EN_POS), + APEX_CONFIG0_DMP_INIT_DIS = (0x00 << APEX_CONFIG0_DMP_INIT_EN_POS), +} APEX_CONFIG0_DMP_INIT_t; + +/* DMP_MEM_RESET */ +typedef enum { + APEX_CONFIG0_DMP_MEM_RESET_APEX_ST_EN = (0x01 << APEX_CONFIG0_DMP_MEM_RESET_EN_POS), + APEX_CONFIG0_DMP_MEM_RESET_DIS = (0x00 << APEX_CONFIG0_DMP_MEM_RESET_EN_POS), +} APEX_CONFIG0_DMP_MEM_RESET_t; + + +/* + * APEX_CONFIG1 + * Register Name: APEX_CONFIG1 + */ + +/* SMD_ENABLE */ +typedef enum { + APEX_CONFIG1_SMD_ENABLE_DIS = (0x00 << APEX_CONFIG1_SMD_ENABLE_POS), + APEX_CONFIG1_SMD_ENABLE_EN = (0x01 << APEX_CONFIG1_SMD_ENABLE_POS), +} APEX_CONFIG1_SMD_ENABLE_t; + +/* FF_ENABLE */ +typedef enum { + APEX_CONFIG1_FF_ENABLE_DIS = (0x00 << APEX_CONFIG1_FF_ENABLE_POS), + APEX_CONFIG1_FF_ENABLE_EN = (0x01 << APEX_CONFIG1_FF_ENABLE_POS), +} APEX_CONFIG1_FF_ENABLE_t; + +/* TILT_ENABLE */ +typedef enum { + APEX_CONFIG1_TILT_ENABLE_DIS = (0x0 << APEX_CONFIG1_TILT_ENABLE_POS), + APEX_CONFIG1_TILT_ENABLE_EN = (0x1 << APEX_CONFIG1_TILT_ENABLE_POS), +} APEX_CONFIG1_TILT_ENABLE_t; + +/* PED_ENABLE */ +typedef enum { + APEX_CONFIG1_PED_ENABLE_DIS = (0x0 << APEX_CONFIG1_PED_ENABLE_POS), + APEX_CONFIG1_PED_ENABLE_EN = (0x1 << APEX_CONFIG1_PED_ENABLE_POS), +} APEX_CONFIG1_PED_ENABLE_t; + +/* DMP_ODR */ +typedef enum { + APEX_CONFIG1_DMP_ODR_25Hz = (0x0 << APEX_CONFIG1_DMP_ODR_POS), + APEX_CONFIG1_DMP_ODR_50Hz = (0x2 << APEX_CONFIG1_DMP_ODR_POS), + APEX_CONFIG1_DMP_ODR_100Hz = (0x3 << APEX_CONFIG1_DMP_ODR_POS), + APEX_CONFIG1_DMP_ODR_400Hz = (0x1 << APEX_CONFIG1_DMP_ODR_POS), +} APEX_CONFIG1_DMP_ODR_t; + + +/* + * WOM_CONFIG + * Register Name: WOM_CONFIG + */ + +/* WOM_INT_DUR */ +typedef enum { + WOM_CONFIG_WOM_INT_DUR_1_SMPL = (0x00 << WOM_CONFIG_WOM_INT_DUR_POS), + WOM_CONFIG_WOM_INT_DUR_2_SMPL = (0x01 << WOM_CONFIG_WOM_INT_DUR_POS), + WOM_CONFIG_WOM_INT_DUR_3_SMPL = (0x02 << WOM_CONFIG_WOM_INT_DUR_POS), + WOM_CONFIG_WOM_INT_DUR_4_SMPL = (0x03 << WOM_CONFIG_WOM_INT_DUR_POS), +} WOM_CONFIG_WOM_INT_DUR_t; + +/* WOM_INT_MODE */ +typedef enum { + WOM_CONFIG_WOM_INT_MODE_ANDED = (0x01 << WOM_CONFIG_WOM_INT_MODE_POS), + WOM_CONFIG_WOM_INT_MODE_ORED = (0x00 << WOM_CONFIG_WOM_INT_MODE_POS), +} WOM_CONFIG_WOM_INT_MODE_t; + +/* WOM_MODE */ +typedef enum { + WOM_CONFIG_WOM_MODE_CMP_PREV = (0x01 << WOM_CONFIG_WOM_MODE_POS), + WOM_CONFIG_WOM_MODE_CMP_INIT = (0x00 << WOM_CONFIG_WOM_MODE_POS), +} WOM_CONFIG_WOM_MODE_t; + +/* WOM_ENABLE */ +typedef enum { + WOM_CONFIG_WOM_EN_ENABLE = (0x01 << WOM_CONFIG_WOM_EN_POS), + WOM_CONFIG_WOM_EN_DISABLE = (0x00 << WOM_CONFIG_WOM_EN_POS), +} WOM_CONFIG_WOM_EN_t; + + +/* + * FIFO_CONFIG1 + * Register Name: FIFO_CONFIG + */ + +/* FIFO_MODE */ +typedef enum { + FIFO_CONFIG1_FIFO_MODE_SNAPSHOT = (0x01 << FIFO_CONFIG1_FIFO_MODE_POS), + FIFO_CONFIG1_FIFO_MODE_STREAM = (0x00 << FIFO_CONFIG1_FIFO_MODE_POS) +} FIFO_CONFIG1_FIFO_MODE_t; + +/* FIFO_BYPASS */ +typedef enum { + FIFO_CONFIG1_FIFO_BYPASS_ON = (0x01 << FIFO_CONFIG1_FIFO_BYPASS_POS), + FIFO_CONFIG1_FIFO_BYPASS_OFF = (0x00 << FIFO_CONFIG1_FIFO_BYPASS_POS), +} FIFO_CONFIG1_FIFO_BYPASS_t; + +/* + * APEX_DATA0 and APEX_DATA1 + * Register Name: APEX_DATA0 and APEX_DATA1 + */ + +/* Pedometer output */ +typedef struct APEX_DATA_STEP_ACTIVITY { + uint16_t step_cnt; /* Number of steps taken */ + uint8_t step_cadence; /* Walk/run cadence in number of samples. Format is u6.2.*/ + uint8_t activity_class; /* Detected activity unknown (0), walk (1) or run (2) */ +} APEX_DATA_STEP_ACTIVITY_t; + + +/* + * APEX_DATA3 + * Register Name: APEX_DATA3 + */ + +/* DMP_IDLE */ +typedef enum { + APEX_DATA3_DMP_IDLE_ON = (0x01 << APEX_DATA3_DMP_IDLE_POS), + APEX_DATA3_DMP_IDLE_OFF = (0x00 << APEX_DATA3_DMP_IDLE_POS), +} APEX_DATA3_DMP_IDLE_OFF_t; + +/* ACTIVITY_CLASS */ +typedef enum { + APEX_DATA3_ACTIVITY_CLASS_OTHER = 0x0, + APEX_DATA3_ACTIVITY_CLASS_WALK = 0x1, + APEX_DATA3_ACTIVITY_CLASS_RUN = 0x2, +} APEX_DATA3_ACTIVITY_CLASS_t; + + +/* + * INTF_CONFIG0 + * Register Name: INTF_CONFIG0 + */ + +/* FIFO_COUNT_REC */ +typedef enum { + INTF_CONFIG0_FIFO_COUNT_REC_RECORD = (0x01 << INTF_CONFIG0_FIFO_COUNT_FORMAT_POS), + INTF_CONFIG0_FIFO_COUNT_REC_BYTE = (0x00 << INTF_CONFIG0_FIFO_COUNT_FORMAT_POS), +} INTF_CONFIG0_FIFO_COUNT_REC_t; + +/* FIFO_COUNT_ENDIAN */ +typedef enum { + INTF_CONFIG0_FIFO_COUNT_BIG_ENDIAN = (0x01 << INTF_CONFIG0_FIFO_COUNT_ENDIAN_POS), + INTF_CONFIG0_FIFO_COUNT_LITTLE_ENDIAN = (0x00 << INTF_CONFIG0_FIFO_COUNT_ENDIAN_POS), +} INTF_CONFIG0_FIFO_COUNT_ENDIAN_t; + +/* DATA_ENDIAN */ +typedef enum { + INTF_CONFIG0_DATA_BIG_ENDIAN = (0x01 << INTF_CONFIG0_SENSOR_DATA_ENDIAN_POS), + INTF_CONFIG0_DATA_LITTLE_ENDIAN = (0x00 << INTF_CONFIG0_SENSOR_DATA_ENDIAN_POS), +} INTF_CONFIG0_DATA_ENDIAN_t; + + + +/* --------------------------------------------------------------------------- + * register bank MREG1 + * ---------------------------------------------------------------------------- */ + +/* + * TMST_CONFIG1_MREG1 + * Register Name: TMST_CONFIG1 + */ + +/* TMST_RES */ +typedef enum { + TMST_CONFIG1_RESOL_16us = (0x01 << TMST_CONFIG1_TMST_RES_POS), + TMST_CONFIG1_RESOL_1us = (0x00 << TMST_CONFIG1_TMST_RES_POS), +} TMST_CONFIG1_RESOL_t; + +/* TMST_FSYNC */ +typedef enum { + TMST_CONFIG1_TMST_FSYNC_EN = (0x01 << TMST_CONFIG1_TMST_FSYNC_EN_POS), + TMST_CONFIG1_TMST_FSYNC_DIS = (0x00 << TMST_CONFIG1_TMST_FSYNC_EN_POS), +} TMST_CONFIG1_TMST_FSYNC_EN_t; + +/* TMST_EN */ +typedef enum { + TMST_CONFIG1_TMST_EN = 0x01, + TMST_CONFIG1_TMST_DIS = 0x00, +} TMST_CONFIG1_TMST_EN_t; + + +/* + * FIFO_CONFIG5_MREG1 + * Register Name: FIFO_CONFIG5 + */ +/* FIFO_WM_GT_TH */ +typedef enum { + FIFO_CONFIG5_WM_GT_TH_EN = (0x1 << FIFO_CONFIG5_FIFO_WM_GT_TH_POS), + FIFO_CONFIG5_WM_GT_TH_DIS = (0x0 << FIFO_CONFIG5_FIFO_WM_GT_TH_POS), +} FIFO_CONFIG5_WM_GT_t; + +/* FIFO_HIRES_EN */ +typedef enum { + FIFO_CONFIG5_HIRES_EN = (0x1 << FIFO_CONFIG5_FIFO_HIRES_EN_POS), + FIFO_CONFIG5_HIRES_DIS = (0x0 << FIFO_CONFIG5_FIFO_HIRES_EN_POS), +} FIFO_CONFIG5_HIRES_t; + +/* FIFO_TMST_FSYNC_EN */ +typedef enum { + FIFO_CONFIG5_TMST_FSYNC_EN = (0x1 << FIFO_CONFIG5_FIFO_TMST_FSYNC_EN_POS), + FIFO_CONFIG5_TMST_FSYNC_DIS = (0x0 << FIFO_CONFIG5_FIFO_TMST_FSYNC_EN_POS), +} FIFO_CONFIG5_TMST_FSYNC_t; + +/* FIFO_GYRO_EN */ +typedef enum { + FIFO_CONFIG5_GYRO_EN = (0x1 << FIFO_CONFIG5_FIFO_GYRO_EN_POS), + FIFO_CONFIG5_GYRO_DIS = (0x0 << FIFO_CONFIG5_FIFO_GYRO_EN_POS), +} FIFO_CONFIG5_GYRO_t; + +/* FIFO_ACCEL_EN*/ +typedef enum { + FIFO_CONFIG5_ACCEL_EN = 0x01, + FIFO_CONFIG5_ACCEL_DIS = 0x00, +} FIFO_CONFIG5_ACCEL_t; + + +/* + * FSYNC_CONFIG_MREG1 + * Register Name: FSYNC_CONFIG + */ + +/* FSYNC_UI_SEL */ +typedef enum { + FSYNC_CONFIG_UI_SEL_NO = (0x0 << FSYNC_CONFIG_FSYNC_UI_SEL_POS), + FSYNC_CONFIG_UI_SEL_TEMP = (0x1 << FSYNC_CONFIG_FSYNC_UI_SEL_POS), + FSYNC_CONFIG_UI_SEL_GYRO_X = (0x2 << FSYNC_CONFIG_FSYNC_UI_SEL_POS), + FSYNC_CONFIG_UI_SEL_GYRO_Y = (0x3 << FSYNC_CONFIG_FSYNC_UI_SEL_POS), + FSYNC_CONFIG_UI_SEL_GYRO_Z = (0x4 << FSYNC_CONFIG_FSYNC_UI_SEL_POS), + FSYNC_CONFIG_UI_SEL_ACCEL_X = (0x5 << FSYNC_CONFIG_FSYNC_UI_SEL_POS), + FSYNC_CONFIG_UI_SEL_ACCEL_Y = (0x6 << FSYNC_CONFIG_FSYNC_UI_SEL_POS), + FSYNC_CONFIG_UI_SEL_ACCEL_Z = (0x7 << FSYNC_CONFIG_FSYNC_UI_SEL_POS), +} FSYNC_CONFIG_UI_SEL_t; + + +/* + * ST_CONFIG_MREG1 + * Register Name: ST_CONFIG + */ +typedef enum { + ST_CONFIG_16_SAMPLES = (0 << ST_CONFIG_ST_NUMBER_SAMPLE_POS), + ST_CONFIG_200_SAMPLES = (1 << ST_CONFIG_ST_NUMBER_SAMPLE_POS), +} ST_CONFIG_NUM_SAMPLES_t; + +typedef enum { + ST_CONFIG_ACCEL_ST_LIM_50 = (7 << ST_CONFIG_ACCEL_ST_LIM_POS), +} ST_CONFIG_ACCEL_ST_LIM_t; + +typedef enum { + ST_CONFIG_GYRO_ST_LIM_50 = (7 << ST_CONFIG_GYRO_ST_LIM_POS), +} ST_CONFIG_GYRO_ST_LIM_t; + + +/* + * SELFTEST_MREG1 + * Register Name: SELFTEST + */ + +/* GYRO_ST_EN and ACCEL_ST_EN */ +typedef enum { + SELFTEST_DIS = 0, + SELFTEST_ACCEL_EN = SELFTEST_ACCEL_ST_EN_MASK, + SELFTEST_GYRO_EN = SELFTEST_GYRO_ST_EN_MASK, + SELFTEST_EN = (SELFTEST_ACCEL_ST_EN_MASK | SELFTEST_GYRO_ST_EN_MASK) +} SELFTEST_ACCEL_GYRO_ST_EN_t; + + +/* + * OTP_CONFIG_MREG1 + * Register Name: OTP_CONFIG + */ + +/* OTP_CONFIG */ +typedef enum { + OTP_CONFIG_OTP_COPY_TRIM = (1 << OTP_CONFIG_OTP_COPY_MODE_POS), + OTP_CONFIG_OTP_COPY_ST_DATA = (3 << OTP_CONFIG_OTP_COPY_MODE_POS), +} OTP_CONFIG_COPY_MODE_t; + + +/* + * APEX_CONFIG2_MREG1 + * Register Name: APEX_CONFIG2 +*/ + +/* LOW_ENERGY_AMP_TH_SEL */ +typedef enum { + APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_30_MG = (0 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), + APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_35_MG = (1 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), + APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_40_MG = (2 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), + APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_45_MG = (3 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), + APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_50_MG = (4 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), + APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_55_MG = (5 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), + APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_60_MG = (6 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), + APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_65_MG = (7 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), + APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_70_MG = (8 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), + APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_75_MG = (9 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), + APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_80_MG = (10 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), + APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_85_MG = (11 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), + APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_90_MG = (12 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), + APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_95_MG = (13 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), + APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_100_MG = (14 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), + APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_105_MG = (15 << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS), +} APEX_CONFIG2_LOW_ENERGY_AMP_TH_t; + +/* DMP_POWER_SAVE_TIME_SEL */ +typedef enum { + APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_0_S = 0x0, + APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_4_S = 0x1, + APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_8_S = 0x2, + APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_12_S = 0x3, + APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_16_S = 0x4, + APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_20_S = 0x5, + APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_24_S = 0x6, + APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_28_S = 0x7, + APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_32_S = 0x8, + APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_36_S = 0x9, + APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_40_S = 0xA, + APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_44_S = 0xB, + APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_48_S = 0xC, + APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_52_S = 0xD, + APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_56_S = 0xE, + APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_60_S = 0xF, +} APEX_CONFIG2_DMP_POWER_SAVE_TIME_t; + + +/* + * APEX_CONFIG3_MREG1 + * Register Name: APEX_CONFIG3 +*/ + +/* PEDO_AMP_TH_SEL */ +typedef enum { + APEX_CONFIG3_PEDO_AMP_TH_30_MG = (0 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), + APEX_CONFIG3_PEDO_AMP_TH_34_MG = (1 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), + APEX_CONFIG3_PEDO_AMP_TH_38_MG = (2 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), + APEX_CONFIG3_PEDO_AMP_TH_42_MG = (3 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), + APEX_CONFIG3_PEDO_AMP_TH_46_MG = (4 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), + APEX_CONFIG3_PEDO_AMP_TH_50_MG = (5 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), + APEX_CONFIG3_PEDO_AMP_TH_54_MG = (6 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), + APEX_CONFIG3_PEDO_AMP_TH_58_MG = (7 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), + APEX_CONFIG3_PEDO_AMP_TH_62_MG = (8 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), + APEX_CONFIG3_PEDO_AMP_TH_66_MG = (9 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), + APEX_CONFIG3_PEDO_AMP_TH_70_MG = (10 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), + APEX_CONFIG3_PEDO_AMP_TH_74_MG = (11 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), + APEX_CONFIG3_PEDO_AMP_TH_78_MG = (12 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), + APEX_CONFIG3_PEDO_AMP_TH_82_MG = (13 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), + APEX_CONFIG3_PEDO_AMP_TH_86_MG = (14 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), + APEX_CONFIG3_PEDO_AMP_TH_90_MG = (15 << APEX_CONFIG3_PED_AMP_TH_SEL_POS), +} APEX_CONFIG3_PEDO_AMP_TH_t; + + +/* + * APEX_CONFIG4_MREG1 + * Register Name: APEX_CONFIG4 +*/ + +/* PEDO_SB_TIMER_TH_SEL */ +typedef enum { + APEX_CONFIG4_PEDO_SB_TIMER_TH_50_SAMPLES = (0 << APEX_CONFIG4_PED_SB_TIMER_TH_SEL_POS), + APEX_CONFIG4_PEDO_SB_TIMER_TH_75_SAMPLES = (1 << APEX_CONFIG4_PED_SB_TIMER_TH_SEL_POS), + APEX_CONFIG4_PEDO_SB_TIMER_TH_100_SAMPLES = (2 << APEX_CONFIG4_PED_SB_TIMER_TH_SEL_POS), + APEX_CONFIG4_PEDO_SB_TIMER_TH_125_SAMPLES = (3 << APEX_CONFIG4_PED_SB_TIMER_TH_SEL_POS), + APEX_CONFIG4_PEDO_SB_TIMER_TH_150_SAMPLES = (4 << APEX_CONFIG4_PED_SB_TIMER_TH_SEL_POS), + APEX_CONFIG4_PEDO_SB_TIMER_TH_175_SAMPLES = (5 << APEX_CONFIG4_PED_SB_TIMER_TH_SEL_POS), + APEX_CONFIG4_PEDO_SB_TIMER_TH_200_SAMPLES = (6 << APEX_CONFIG4_PED_SB_TIMER_TH_SEL_POS), + APEX_CONFIG4_PEDO_SB_TIMER_TH_225_SAMPLES = (7 << APEX_CONFIG4_PED_SB_TIMER_TH_SEL_POS), +} APEX_CONFIG4_PEDO_SB_TIMER_TH_t; + + +/* PEDO_HI_ENRGY_TH_SEL */ +typedef enum { + APEX_CONFIG4_PEDO_HI_ENRGY_TH_88_MG = (0 << APEX_CONFIG4_PED_HI_EN_TH_SEL_POS), + APEX_CONFIG4_PEDO_HI_ENRGY_TH_104_MG = (1 << APEX_CONFIG4_PED_HI_EN_TH_SEL_POS), + APEX_CONFIG4_PEDO_HI_ENRGY_TH_133_MG = (2 << APEX_CONFIG4_PED_HI_EN_TH_SEL_POS), + APEX_CONFIG4_PEDO_HI_ENRGY_TH_155_MG = (3 << APEX_CONFIG4_PED_HI_EN_TH_SEL_POS), +} APEX_CONFIG4_PEDO_HI_ENRGY_TH_t; + + +/* + * APEX_CONFIG5_MREG1 + * Register Name: APEX_CONFIG5 +*/ + +/* TILT_WAIT_TIME_SEL */ +typedef enum { + APEX_CONFIG5_TILT_WAIT_TIME_0_S = (0 << APEX_CONFIG5_TILT_WAIT_TIME_SEL_POS), + APEX_CONFIG5_TILT_WAIT_TIME_2_S = (1 << APEX_CONFIG5_TILT_WAIT_TIME_SEL_POS), + APEX_CONFIG5_TILT_WAIT_TIME_4_S = (2 << APEX_CONFIG5_TILT_WAIT_TIME_SEL_POS), + APEX_CONFIG5_TILT_WAIT_TIME_6_S = (3 << APEX_CONFIG5_TILT_WAIT_TIME_SEL_POS), +} APEX_CONFIG5_TILT_WAIT_TIME_t; + +/* LOWG_PEAK_TH_HYST_SEL */ +typedef enum { + APEX_CONFIG5_LOWG_PEAK_TH_HYST_31_MG = (0 << APEX_CONFIG5_LOWG_PEAK_TH_HYST_SEL_POS), + APEX_CONFIG5_LOWG_PEAK_TH_HYST_63_MG = (1 << APEX_CONFIG5_LOWG_PEAK_TH_HYST_SEL_POS), + APEX_CONFIG5_LOWG_PEAK_TH_HYST_94_MG = (2 << APEX_CONFIG5_LOWG_PEAK_TH_HYST_SEL_POS), + APEX_CONFIG5_LOWG_PEAK_TH_HYST_125_MG = (3 << APEX_CONFIG5_LOWG_PEAK_TH_HYST_SEL_POS), + APEX_CONFIG5_LOWG_PEAK_TH_HYST_156_MG = (4 << APEX_CONFIG5_LOWG_PEAK_TH_HYST_SEL_POS), + APEX_CONFIG5_LOWG_PEAK_TH_HYST_188_MG = (5 << APEX_CONFIG5_LOWG_PEAK_TH_HYST_SEL_POS), + APEX_CONFIG5_LOWG_PEAK_TH_HYST_219_MG = (6 << APEX_CONFIG5_LOWG_PEAK_TH_HYST_SEL_POS), + APEX_CONFIG5_LOWG_PEAK_TH_HYST_250_MG = (7 << APEX_CONFIG5_LOWG_PEAK_TH_HYST_SEL_POS), +} APEX_CONFIG5_LOWG_PEAK_TH_HYST_t; + +/* HIGHG_PEAK_TH_HYST_SEL */ +typedef enum { + APEX_CONFIG5_HIGHG_PEAK_TH_HYST_31_MG = (0 << APEX_CONFIG5_HIGHG_PEAK_TH_HYST_SEL_POS), + APEX_CONFIG5_HIGHG_PEAK_TH_HYST_63_MG = (1 << APEX_CONFIG5_HIGHG_PEAK_TH_HYST_SEL_POS), + APEX_CONFIG5_HIGHG_PEAK_TH_HYST_94_MG = (2 << APEX_CONFIG5_HIGHG_PEAK_TH_HYST_SEL_POS), + APEX_CONFIG5_HIGHG_PEAK_TH_HYST_125_MG = (3 << APEX_CONFIG5_HIGHG_PEAK_TH_HYST_SEL_POS), + APEX_CONFIG5_HIGHG_PEAK_TH_HYST_156_MG = (4 << APEX_CONFIG5_HIGHG_PEAK_TH_HYST_SEL_POS), + APEX_CONFIG5_HIGHG_PEAK_TH_HYST_188_MG = (5 << APEX_CONFIG5_HIGHG_PEAK_TH_HYST_SEL_POS), + APEX_CONFIG5_HIGHG_PEAK_TH_HYST_219_MG = (6 << APEX_CONFIG5_HIGHG_PEAK_TH_HYST_SEL_POS), + APEX_CONFIG5_HIGHG_PEAK_TH_HYST_250_MG = (7 << APEX_CONFIG5_HIGHG_PEAK_TH_HYST_SEL_POS), +} APEX_CONFIG5_HIGHG_PEAK_TH_HYST_t; + + +/* + * APEX_CONFIG9_MREG1 + * Register Name: APEX_CONFIG9 +*/ + +/* FF_DEBOUNCE_DURATION_SEL */ +typedef enum { + APEX_CONFIG9_FF_DEBOUNCE_DURATION_0_MS = (0 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), + APEX_CONFIG9_FF_DEBOUNCE_DURATION_1250_MS = (1 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), + APEX_CONFIG9_FF_DEBOUNCE_DURATION_1375_MS = (2 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), + APEX_CONFIG9_FF_DEBOUNCE_DURATION_1500_MS = (3 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), + APEX_CONFIG9_FF_DEBOUNCE_DURATION_1625_MS = (4 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), + APEX_CONFIG9_FF_DEBOUNCE_DURATION_1750_MS = (5 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), + APEX_CONFIG9_FF_DEBOUNCE_DURATION_1875_MS = (6 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), + APEX_CONFIG9_FF_DEBOUNCE_DURATION_2000_MS = (7 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), + APEX_CONFIG9_FF_DEBOUNCE_DURATION_2125_MS = (8 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), + APEX_CONFIG9_FF_DEBOUNCE_DURATION_2250_MS = (9 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), + APEX_CONFIG9_FF_DEBOUNCE_DURATION_2375_MS = (10 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), + APEX_CONFIG9_FF_DEBOUNCE_DURATION_2500_MS = (11 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), + APEX_CONFIG9_FF_DEBOUNCE_DURATION_2625_MS = (12 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), + APEX_CONFIG9_FF_DEBOUNCE_DURATION_2750_MS = (13 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), + APEX_CONFIG9_FF_DEBOUNCE_DURATION_2875_MS = (14 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), + APEX_CONFIG9_FF_DEBOUNCE_DURATION_3000_MS = (15 << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS), +} APEX_CONFIG9_FF_DEBOUNCE_DURATION_t; + +/* SMD_SENSITIVITY_SEL */ +typedef enum { + APEX_CONFIG9_SMD_SENSITIVITY_0 = (0 << APEX_CONFIG9_SMD_SENSITIVITY_SEL_POS), + APEX_CONFIG9_SMD_SENSITIVITY_1 = (1 << APEX_CONFIG9_SMD_SENSITIVITY_SEL_POS), + APEX_CONFIG9_SMD_SENSITIVITY_2 = (2 << APEX_CONFIG9_SMD_SENSITIVITY_SEL_POS), + APEX_CONFIG9_SMD_SENSITIVITY_3 = (3 << APEX_CONFIG9_SMD_SENSITIVITY_SEL_POS), + APEX_CONFIG9_SMD_SENSITIVITY_4 = (4 << APEX_CONFIG9_SMD_SENSITIVITY_SEL_POS), +} APEX_CONFIG9_SMD_SENSITIVITY_t; + +/* SMD_SENSITIVITY_MODE */ +typedef enum { + APEX_CONFIG9_SENSITIVITY_MODE_NORMAL = (0 << APEX_CONFIG9_SENSITIVITY_MODE_POS), + APEX_CONFIG9_SENSITIVITY_MODE_SLOW_WALK = (1 << APEX_CONFIG9_SENSITIVITY_MODE_POS), +} APEX_CONFIG9_SENSITIVITY_MODE_t; + + +/* + * APEX_CONFIG10_MREG1 + * Register Name: APEX_CONFIG10 +*/ + +/* LOWG_PEAK_TH_SEL */ +typedef enum { + APEX_CONFIG10_LOWG_PEAK_TH_31_MG = (0x00 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), + APEX_CONFIG10_LOWG_PEAK_TH_63_MG = (0x01 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), + APEX_CONFIG10_LOWG_PEAK_TH_94_MG = (0x02 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), + APEX_CONFIG10_LOWG_PEAK_TH_125_MG = (0x03 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), + APEX_CONFIG10_LOWG_PEAK_TH_156_MG = (0x04 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), + APEX_CONFIG10_LOWG_PEAK_TH_188_MG = (0x05 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), + APEX_CONFIG10_LOWG_PEAK_TH_219_MG = (0x06 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), + APEX_CONFIG10_LOWG_PEAK_TH_250_MG = (0x07 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), + APEX_CONFIG10_LOWG_PEAK_TH_281_MG = (0x08 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), + APEX_CONFIG10_LOWG_PEAK_TH_313_MG = (0x09 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), + APEX_CONFIG10_LOWG_PEAK_TH_344_MG = (0x0A << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), + APEX_CONFIG10_LOWG_PEAK_TH_375_MG = (0x0B << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), + APEX_CONFIG10_LOWG_PEAK_TH_406_MG = (0x0C << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), + APEX_CONFIG10_LOWG_PEAK_TH_438_MG = (0x0D << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), + APEX_CONFIG10_LOWG_PEAK_TH_469_MG = (0x0E << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), + APEX_CONFIG10_LOWG_PEAK_TH_500_MG = (0x0F << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), + APEX_CONFIG10_LOWG_PEAK_TH_531_MG = (0x10 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), + APEX_CONFIG10_LOWG_PEAK_TH_563_MG = (0x11 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), + APEX_CONFIG10_LOWG_PEAK_TH_594_MG = (0x12 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), + APEX_CONFIG10_LOWG_PEAK_TH_625_MG = (0x13 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), + APEX_CONFIG10_LOWG_PEAK_TH_656_MG = (0x14 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), + APEX_CONFIG10_LOWG_PEAK_TH_688_MG = (0x15 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), + APEX_CONFIG10_LOWG_PEAK_TH_719_MG = (0x16 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), + APEX_CONFIG10_LOWG_PEAK_TH_750_MG = (0x17 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), + APEX_CONFIG10_LOWG_PEAK_TH_781_MG = (0x18 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), + APEX_CONFIG10_LOWG_PEAK_TH_813_MG = (0x19 << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), + APEX_CONFIG10_LOWG_PEAK_TH_844_MG = (0x1A << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), + APEX_CONFIG10_LOWG_PEAK_TH_875_MG = (0x1B << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), + APEX_CONFIG10_LOWG_PEAK_TH_906_MG = (0x1C << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), + APEX_CONFIG10_LOWG_PEAK_TH_938_MG = (0x1D << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), + APEX_CONFIG10_LOWG_PEAK_TH_969_MG = (0x1E << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), + APEX_CONFIG10_LOWG_PEAK_TH_1000_MG = (0x1F << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS), +} APEX_CONFIG10_LOWG_PEAK_TH_t; + +/* LOWG_TIME_TH_SEL */ +typedef enum { + APEX_CONFIG10_LOWG_TIME_TH_1_SAMPLE = (0x00 << APEX_CONFIG10_LOWG_TIME_TH_SEL_POS), + APEX_CONFIG10_LOWG_TIME_TH_2_SAMPLES = (0x01 << APEX_CONFIG10_LOWG_TIME_TH_SEL_POS), + APEX_CONFIG10_LOWG_TIME_TH_3_SAMPLES = (0x02 << APEX_CONFIG10_LOWG_TIME_TH_SEL_POS), + APEX_CONFIG10_LOWG_TIME_TH_4_SAMPLES = (0x03 << APEX_CONFIG10_LOWG_TIME_TH_SEL_POS), + APEX_CONFIG10_LOWG_TIME_TH_5_SAMPLES = (0x04 << APEX_CONFIG10_LOWG_TIME_TH_SEL_POS), + APEX_CONFIG10_LOWG_TIME_TH_6_SAMPLES = (0x05 << APEX_CONFIG10_LOWG_TIME_TH_SEL_POS), + APEX_CONFIG10_LOWG_TIME_TH_7_SAMPLES = (0x06 << APEX_CONFIG10_LOWG_TIME_TH_SEL_POS), + APEX_CONFIG10_LOWG_TIME_TH_8_SAMPLES = (0x07 << APEX_CONFIG10_LOWG_TIME_TH_SEL_POS), +} APEX_CONFIG10_LOWG_TIME_TH_SAMPLES_t; + + +/* + * APEX_CONFIG11_MREG1 + * Register Name: APEX_CONFIG11 +*/ + +/* HIGHG_PEAK_TH_SEL */ +typedef enum { + APEX_CONFIG11_HIGHG_PEAK_TH_250_MG = (0x00 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), + APEX_CONFIG11_HIGHG_PEAK_TH_500_MG = (0x01 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), + APEX_CONFIG11_HIGHG_PEAK_TH_750_MG = (0x02 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), + APEX_CONFIG11_HIGHG_PEAK_TH_1000MG = (0x03 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), + APEX_CONFIG11_HIGHG_PEAK_TH_1250_MG = (0x04 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), + APEX_CONFIG11_HIGHG_PEAK_TH_1500_MG = (0x05 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), + APEX_CONFIG11_HIGHG_PEAK_TH_1750_MG = (0x06 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), + APEX_CONFIG11_HIGHG_PEAK_TH_2000_MG = (0x07 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), + APEX_CONFIG11_HIGHG_PEAK_TH_2250_MG = (0x08 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), + APEX_CONFIG11_HIGHG_PEAK_TH_2500_MG = (0x09 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), + APEX_CONFIG11_HIGHG_PEAK_TH_2750_MG = (0x0A << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), + APEX_CONFIG11_HIGHG_PEAK_TH_3000_MG = (0x0B << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), + APEX_CONFIG11_HIGHG_PEAK_TH_3250_MG = (0x0C << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), + APEX_CONFIG11_HIGHG_PEAK_TH_3500_MG = (0x0D << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), + APEX_CONFIG11_HIGHG_PEAK_TH_3750_MG = (0x0E << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), + APEX_CONFIG11_HIGHG_PEAK_TH_4000_MG = (0x0F << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), + APEX_CONFIG11_HIGHG_PEAK_TH_4250_MG = (0x10 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), + APEX_CONFIG11_HIGHG_PEAK_TH_4500_MG = (0x11 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), + APEX_CONFIG11_HIGHG_PEAK_TH_4750_MG = (0x12 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), + APEX_CONFIG11_HIGHG_PEAK_TH_5000_MG = (0x13 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), + APEX_CONFIG11_HIGHG_PEAK_TH_5250_MG = (0x14 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), + APEX_CONFIG11_HIGHG_PEAK_TH_5500_MG = (0x15 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), + APEX_CONFIG11_HIGHG_PEAK_TH_5750_MG = (0x16 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), + APEX_CONFIG11_HIGHG_PEAK_TH_6000_MG = (0x17 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), + APEX_CONFIG11_HIGHG_PEAK_TH_6250_MG = (0x18 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), + APEX_CONFIG11_HIGHG_PEAK_TH_6500_MG = (0x19 << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), + APEX_CONFIG11_HIGHG_PEAK_TH_6750_MG = (0x1A << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), + APEX_CONFIG11_HIGHG_PEAK_TH_7000_MG = (0x1B << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), + APEX_CONFIG11_HIGHG_PEAK_TH_7250_MG = (0x1C << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), + APEX_CONFIG11_HIGHG_PEAK_TH_7500_MG = (0x1D << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), + APEX_CONFIG11_HIGHG_PEAK_TH_7750_MG = (0x1E << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), + APEX_CONFIG11_HIGHG_PEAK_TH_8000_MG = (0x1F << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS), +} APEX_CONFIG11_HIGHG_PEAK_TH_t; + +/* HIGHG_TIME_TH_SEL */ +typedef enum { + APEX_CONFIG11_HIGHG_TIME_TH_1_SAMPLE = (0x00 << APEX_CONFIG11_HIGHG_TIME_TH_SEL_POS), + APEX_CONFIG11_HIGHG_TIME_TH_2_SAMPLES = (0x01 << APEX_CONFIG11_HIGHG_TIME_TH_SEL_POS), + APEX_CONFIG11_HIGHG_TIME_TH_3_SAMPLES = (0x02 << APEX_CONFIG11_HIGHG_TIME_TH_SEL_POS), + APEX_CONFIG11_HIGHG_TIME_TH_4_SAMPLES = (0x03 << APEX_CONFIG11_HIGHG_TIME_TH_SEL_POS), + APEX_CONFIG11_HIGHG_TIME_TH_5_SAMPLES = (0x04 << APEX_CONFIG11_HIGHG_TIME_TH_SEL_POS), + APEX_CONFIG11_HIGHG_TIME_TH_6_SAMPLES = (0x05 << APEX_CONFIG11_HIGHG_TIME_TH_SEL_POS), + APEX_CONFIG11_HIGHG_TIME_TH_7_SAMPLES = (0x06 << APEX_CONFIG11_HIGHG_TIME_TH_SEL_POS), + APEX_CONFIG11_HIGHG_TIME_TH_8_SAMPLES = (0x07 << APEX_CONFIG11_HIGHG_TIME_TH_SEL_POS), +} APEX_CONFIG11_HIGHG_TIME_TH_SAMPLES_t; + + +/* + * FDR_CONFIG_MREG1 + * Register Name: FDR_CONFIG + */ + +/* FDR_SEL */ +typedef enum { + FDR_CONFIG_FDR_SEL_DIS = (0x0 << FDR_CONFIG_FDR_SEL_POS), + FDR_CONFIG_FDR_SEL_FACTOR_2 = (0x8 << FDR_CONFIG_FDR_SEL_POS), + FDR_CONFIG_FDR_SEL_FACTOR_4 = (0x9 << FDR_CONFIG_FDR_SEL_POS), + FDR_CONFIG_FDR_SEL_FACTOR_8 = (0xA << FDR_CONFIG_FDR_SEL_POS), + FDR_CONFIG_FDR_SEL_FACTOR_16 = (0xB << FDR_CONFIG_FDR_SEL_POS), + FDR_CONFIG_FDR_SEL_FACTOR_32 = (0xC << FDR_CONFIG_FDR_SEL_POS), + FDR_CONFIG_FDR_SEL_FACTOR_64 = (0xD << FDR_CONFIG_FDR_SEL_POS), + FDR_CONFIG_FDR_SEL_FACTOR_128 = (0xE << FDR_CONFIG_FDR_SEL_POS), + FDR_CONFIG_FDR_SEL_FACTOR_256 = (0xF << FDR_CONFIG_FDR_SEL_POS), +} FDR_CONFIG_FDR_SEL_t; + + +/* + * APEX_CONFIG12_MREG1 + * Register Name: APEX_CONFIG12 +*/ +/* FF_MAX_DURATION_SEL */ +typedef enum { + APEX_CONFIG12_FF_MAX_DURATION_102_CM = (0 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), + APEX_CONFIG12_FF_MAX_DURATION_120_CM = (1 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), + APEX_CONFIG12_FF_MAX_DURATION_139_CM = (2 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), + APEX_CONFIG12_FF_MAX_DURATION_159_CM = (3 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), + APEX_CONFIG12_FF_MAX_DURATION_181_CM = (4 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), + APEX_CONFIG12_FF_MAX_DURATION_204_CM = (5 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), + APEX_CONFIG12_FF_MAX_DURATION_228_CM = (6 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), + APEX_CONFIG12_FF_MAX_DURATION_254_CM = (7 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), + APEX_CONFIG12_FF_MAX_DURATION_281_CM = (8 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), + APEX_CONFIG12_FF_MAX_DURATION_310_CM = (9 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), + APEX_CONFIG12_FF_MAX_DURATION_339_CM = (10 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), + APEX_CONFIG12_FF_MAX_DURATION_371_CM = (11 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), + APEX_CONFIG12_FF_MAX_DURATION_403_CM = (12 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), + APEX_CONFIG12_FF_MAX_DURATION_438_CM = (13 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), + APEX_CONFIG12_FF_MAX_DURATION_473_CM = (14 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), + APEX_CONFIG12_FF_MAX_DURATION_510_CM = (15 << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS), +} APEX_CONFIG12_FF_MAX_DURATION_t; + +/* FF_MIN_DURATION_SEL */ +typedef enum { + APEX_CONFIG12_FF_MIN_DURATION_10_CM = (0 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), + APEX_CONFIG12_FF_MIN_DURATION_12_CM = (1 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), + APEX_CONFIG12_FF_MIN_DURATION_13_CM = (2 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), + APEX_CONFIG12_FF_MIN_DURATION_16_CM = (3 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), + APEX_CONFIG12_FF_MIN_DURATION_18_CM = (4 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), + APEX_CONFIG12_FF_MIN_DURATION_20_CM = (5 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), + APEX_CONFIG12_FF_MIN_DURATION_23_CM = (6 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), + APEX_CONFIG12_FF_MIN_DURATION_25_CM = (7 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), + APEX_CONFIG12_FF_MIN_DURATION_28_CM = (8 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), + APEX_CONFIG12_FF_MIN_DURATION_31_CM = (9 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), + APEX_CONFIG12_FF_MIN_DURATION_34_CM = (10 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), + APEX_CONFIG12_FF_MIN_DURATION_38_CM = (11 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), + APEX_CONFIG12_FF_MIN_DURATION_41_CM = (12 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), + APEX_CONFIG12_FF_MIN_DURATION_45_CM = (13 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), + APEX_CONFIG12_FF_MIN_DURATION_48_CM = (14 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), + APEX_CONFIG12_FF_MIN_DURATION_52_CM = (15 << APEX_CONFIG12_FF_MIN_DURATION_SEL_POS), +} APEX_CONFIG12_FF_MIN_DURATION_t; + + + +/* --------------------------------------------------------------------------- + * register bank MREG2 + * ---------------------------------------------------------------------------- */ + +/* + * OTP_CTRL7_MREG2 + * Register Name: OTP_CTRL7 +*/ + +/* OTP_CTRL7 */ +typedef enum { + OTP_CTRL7_OTP_RELOAD_EN = (1 << OTP_CTRL7_OTP_RELOAD_POS), + OTP_CTRL7_OTP_RELOAD_DIS = (0 << OTP_CTRL7_OTP_RELOAD_POS), +} OTP_CTRL7_OTP_RELOAD_t; + +/* OTP_PWR_DOWN */ +typedef enum { + OTP_CTRL7_PWR_DOWN_EN = (1 << OTP_CTRL7_OTP_PWR_DOWN_POS), + OTP_CTRL7_PWR_DOWN_DIS = (0 << OTP_CTRL7_OTP_PWR_DOWN_POS), +} OTP_CTRL7_PWR_DOWN_t; + + +#ifdef __cplusplus +} +#endif + +#endif /* #ifndef _INV_IMU_DEFS_H_ */ diff --git a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_driver.c b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_driver.c similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_driver.c rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_driver.c index ca2e36a..a73754f 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_driver.c +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_driver.c @@ -1,1619 +1,1619 @@ -/* - * ________________________________________________________________________________________________________ - * Copyright (c) 2017 InvenSense Inc. All rights reserved. - * - * This software, related documentation and any modifications thereto (collectively "Software") is subject - * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright - * and other intellectual property rights laws. - * - * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software - * and any use, reproduction, disclosure or distribution of the Software without an express license agreement - * from InvenSense is strictly prohibited. - * - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS - * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED - * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL - * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY - * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, - * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE - * OF THE SOFTWARE. - * ________________________________________________________________________________________________________ - */ - -#include "inv_imu_defs.h" -#include "inv_imu_extfunc.h" -#include "inv_imu_driver.h" -#include "inv_imu_version.h" -#include "inv_imu_apex.h" - - -static int select_rcosc(struct inv_imu_device *s); -static int select_wuosc(struct inv_imu_device *s); -static int configure_serial_interface(struct inv_imu_device *s); -static int init_hardware_from_ui(struct inv_imu_device *s); -static int resume_dmp(struct inv_imu_device *s); -static int reload_otp(struct inv_imu_device *s); - -int inv_imu_init(struct inv_imu_device *s, - struct inv_imu_serif *serif, - void (*sensor_event_cb)(inv_imu_sensor_event_t *event)) -{ - int status = 0; - - memset(s, 0, sizeof(*s)); - - s->transport.serif = *serif; - - // Based on datasheet, start up time for register read/write after POR is 1ms and supply ramp time is 3ms - inv_imu_sleep_us(3000); - - if ((status |= configure_serial_interface(s)) != 0 ) - return status; - - /* register the callback to be executed each time inv_imu_get_data_from_fifo extracts - * a packet from fifo or inv_imu_get_data_from_registers read data */ - s->sensor_event_cb = sensor_event_cb; - - /* initialize hardware */ - status |= init_hardware_from_ui(s); - - /* First Gyro data wrong after enable - * Keep track of the time when enabling the Gyro and set a default value at init */ - s->gyro_start_time_us = UINT32_MAX; - /* First Accel data wrong after enable - * Keep track of the time when enabling the Accel and set a default value at init */ - s->accel_start_time_us = UINT32_MAX; - /* Gyro power-off to power-on transition can cause ring down issue - * This variable keeps track of timestamp when gyro is power off. Set to UINT32_MAX at init - */ - s->gyro_power_off_tmst = UINT32_MAX; - - return status; -} - -int inv_imu_device_reset(struct inv_imu_device *s) -{ - int status = INV_ERROR_SUCCESS; - uint8_t data; - uint8_t device_config_backup; - uint8_t intf_config1_backup; - - /* Backup registers to configure serial interface */ - status |= inv_imu_read_reg(s, DEVICE_CONFIG, 1, &device_config_backup); - status |= inv_imu_read_reg(s, INTF_CONFIG1, 1, &intf_config1_backup); - - /* Trigger soft reset (bit is automatically cleared once the reset is completed) */ - data = (uint8_t)SIGNAL_PATH_RESET_SOFT_RESET_DEVICE_CONFIG_EN; - status |= inv_imu_write_reg(s, SIGNAL_PATH_RESET, 1, &data); - - /* Check status and return if an error occured */ - if (status) - return status; - - /* Wait 1ms for soft reset to be effective */ - inv_imu_sleep_us(1000); - - /* Force SPI-4w hardware configuration (so that next read is correct) */ - if (s->transport.serif.serif_type == UI_SPI4) { - data = 1 << DEVICE_CONFIG_SPI_AP_4WIRE_POS; - status |= inv_imu_write_reg(s, DEVICE_CONFIG, 1, &data); - } - - /* Clear the reset done int */ - status |= inv_imu_read_reg(s, INT_STATUS, 1, &data); - if (data != INT_STATUS_RESET_DONE_INT_MASK) { - status |= INV_ERROR_UNEXPECTED; - return status; - } - - /* Make sure `need_mclk_cnt` is cleared (`reload_otp()` will need it)*/ - s->transport.need_mclk_cnt = 0; - /* Reload OTP procedure (See AN-000273) */ - status |= reload_otp(s); - - /* Restore registers to configure serial interface */ - status |= inv_imu_write_reg(s, DEVICE_CONFIG, 1, &device_config_backup); - status |= inv_imu_write_reg(s, INTF_CONFIG1, 1, &intf_config1_backup); - - /* Init transport layer */ - status |= inv_imu_init_transport(s); - - /* Read and set endianness for further processing */ - status |= inv_imu_get_endianness(s); - - return status; -} - -int inv_imu_get_who_am_i(struct inv_imu_device *s, uint8_t *who_am_i) -{ - return inv_imu_read_reg(s, WHO_AM_I, 1, who_am_i); -} - -static int select_rcosc(struct inv_imu_device *s) -{ - int status = 0; - uint8_t data; - - status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &data); - data &= ~PWR_MGMT0_ACCEL_LP_CLK_SEL_MASK; - data |= PWR_MGMT0_ACCEL_LP_CLK_RCOSC; - status |= inv_imu_write_reg(s, PWR_MGMT0, 1, &data); - - return status; -} - -static int select_wuosc(struct inv_imu_device *s) -{ - int status = 0; - uint8_t data; - - status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &data); - data &= ~PWR_MGMT0_ACCEL_LP_CLK_SEL_MASK; - data |= PWR_MGMT0_ACCEL_LP_CLK_WUOSC; - status |= inv_imu_write_reg(s, PWR_MGMT0, 1, &data); - - return status; - -} - -static int reload_otp(struct inv_imu_device *s) -{ - int status = INV_ERROR_SUCCESS; - uint8_t data; - - status |= inv_imu_switch_on_mclk(s); - - /* - * Set otp_copy_mode register field - */ - status |= inv_imu_read_reg(s, OTP_CONFIG_MREG1, 1, &data); - data &= ~OTP_CONFIG_OTP_COPY_MODE_MASK; - data |= OTP_CONFIG_OTP_COPY_TRIM; - status |= inv_imu_write_reg(s, OTP_CONFIG_MREG1, 1, &data); - - /* - * Set otp_power_down register field - */ - status |= inv_imu_read_reg(s, OTP_CTRL7_MREG2, 1, &data); - data &= ~OTP_CTRL7_OTP_PWR_DOWN_MASK; - data |= OTP_CTRL7_PWR_DOWN_DIS; - status |= inv_imu_write_reg(s, OTP_CTRL7_MREG2, 1, &data); - - /* - * Wait for 300us for the OTP to fully power up - */ - inv_imu_sleep_us(300); - - /* - * Set otp_reload register field - */ - status |= inv_imu_read_reg(s, OTP_CTRL7_MREG2, 1, &data); - data &= ~OTP_CTRL7_OTP_RELOAD_MASK; - data |= OTP_CTRL7_OTP_RELOAD_EN; - status |= inv_imu_write_reg(s, OTP_CTRL7_MREG2, 1, &data); - - /* - * Wait for 280 us for the OTP to load - */ - inv_imu_sleep_us(280); - - status |= inv_imu_switch_off_mclk(s); - - return status; -} - -int inv_imu_enable_accel_low_power_mode(struct inv_imu_device *s) -{ - int status = 0; - PWR_MGMT0_ACCEL_MODE_t accel_mode; - PWR_MGMT0_GYRO_MODE_t gyro_mode; - ACCEL_CONFIG0_ODR_t acc_odr_bitfield; - uint32_t accel_odr_us = 0; - uint8_t pwr_mgmt0_reg; - uint8_t accel_config0_reg; - uint8_t value; - - status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &pwr_mgmt0_reg); - accel_mode = (PWR_MGMT0_ACCEL_MODE_t)(pwr_mgmt0_reg & PWR_MGMT0_ACCEL_MODE_MASK); - gyro_mode = (PWR_MGMT0_GYRO_MODE_t)(pwr_mgmt0_reg & PWR_MGMT0_GYRO_MODE_MASK); - - /* Check if the accelerometer is the only one enabled */ - if ( (accel_mode != PWR_MGMT0_ACCEL_MODE_LP) - && ( (gyro_mode == PWR_MGMT0_GYRO_MODE_OFF) - || (gyro_mode == PWR_MGMT0_GYRO_MODE_STANDBY))) { - /* Get accelerometer's ODR for next required wait */ - status |= inv_imu_read_reg(s, ACCEL_CONFIG0, 1, &accel_config0_reg); - acc_odr_bitfield = (ACCEL_CONFIG0_ODR_t)(accel_config0_reg & ACCEL_CONFIG0_ACCEL_ODR_MASK); - accel_odr_us = inv_imu_convert_odr_bitfield_to_us(acc_odr_bitfield); - /* Select the RC OSC as clock source for the accelerometer */ - status |= select_rcosc(s); - } - - /* Enable/Switch the accelerometer in/to low power mode */ - /* Read a new time because select_rcosc() modified it */ - status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &pwr_mgmt0_reg); - pwr_mgmt0_reg &= ~PWR_MGMT0_ACCEL_MODE_MASK; - pwr_mgmt0_reg |= PWR_MGMT0_ACCEL_MODE_LP; - status |= inv_imu_write_reg(s, PWR_MGMT0, 1, &pwr_mgmt0_reg); - inv_imu_sleep_us(200); - - if ( (accel_mode != PWR_MGMT0_ACCEL_MODE_LP) - && ( (gyro_mode == PWR_MGMT0_GYRO_MODE_OFF) - || (gyro_mode == PWR_MGMT0_GYRO_MODE_STANDBY))) { - /* Wait one accelerometer ODR before switching to the WU OSC */ - if (accel_odr_us > 200) /* if ODR is smaller than 200 us, we already waited for one ODR above. */ - inv_imu_sleep_us(accel_odr_us - 200); - status |= select_wuosc(s); - } - - if (accel_mode == PWR_MGMT0_ACCEL_MODE_OFF) { - /* First data are wrong after accel enable using IIR filter - There is no signal that says accel start-up has completed and data are stable using FIR filter - So keep track of the time at start-up to discard the invalid data, about 20ms after enable - */ - if (s->fifo_is_used) - s->accel_start_time_us = inv_imu_get_time_us(); - } - - /* Enable the automatic RCOSC power on so that FIFO is entirely powered on */ - status |= inv_imu_read_reg(s, FIFO_CONFIG6_MREG1, 1, &value); - value &= ~FIFO_CONFIG6_RCOSC_REQ_ON_FIFO_THS_DIS_MASK; - status |= inv_imu_write_reg(s, FIFO_CONFIG6_MREG1, 1, &value); - - return status; -} - -int inv_imu_enable_accel_low_noise_mode(struct inv_imu_device *s) -{ - int status = 0; - PWR_MGMT0_ACCEL_MODE_t accel_mode; - PWR_MGMT0_GYRO_MODE_t gyro_mode; - ACCEL_CONFIG0_ODR_t acc_odr_bitfield; - uint32_t accel_odr_us; - uint8_t pwr_mgmt0_reg; - uint8_t accel_config0_reg; - - status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &pwr_mgmt0_reg); - accel_mode = (PWR_MGMT0_ACCEL_MODE_t)(pwr_mgmt0_reg & PWR_MGMT0_ACCEL_MODE_MASK); - gyro_mode = (PWR_MGMT0_GYRO_MODE_t)(pwr_mgmt0_reg & PWR_MGMT0_GYRO_MODE_MASK); - /* Check if the accelerometer is the only one enabled */ - if ( (accel_mode == PWR_MGMT0_ACCEL_MODE_LP) - && ( (gyro_mode == PWR_MGMT0_GYRO_MODE_OFF) - || (gyro_mode == PWR_MGMT0_GYRO_MODE_STANDBY))) { - /* Get accelerometer's ODR for next required wait */ - status |= inv_imu_read_reg(s, ACCEL_CONFIG0, 1, &accel_config0_reg); - acc_odr_bitfield = (ACCEL_CONFIG0_ODR_t)(accel_config0_reg & ACCEL_CONFIG0_ACCEL_ODR_MASK); - accel_odr_us = inv_imu_convert_odr_bitfield_to_us(acc_odr_bitfield); - /* Select the RC OSC as clock source for the accelerometer */ - status |= select_rcosc(s); - /* Wait one accel ODR before switching to low noise mode */ - inv_imu_sleep_us(accel_odr_us); - } - - /* Enable/Switch the accelerometer in/to low noise mode */ - /* Read a new time because select_rcosc() modified it */ - status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &pwr_mgmt0_reg); - pwr_mgmt0_reg &= ~PWR_MGMT0_ACCEL_MODE_MASK; - pwr_mgmt0_reg |= PWR_MGMT0_ACCEL_MODE_LN; - status |= inv_imu_write_reg(s, PWR_MGMT0, 1, &pwr_mgmt0_reg); - inv_imu_sleep_us(200); - - if (accel_mode == PWR_MGMT0_ACCEL_MODE_OFF) { - /* First data are wrong after accel enable using IIR filter - There is no signal that says accel start-up has completed and data are stable using FIR filter - So keep track of the time at start-up to discard the invalid data, about 20ms after enable - */ - if (s->fifo_is_used) - s->accel_start_time_us = inv_imu_get_time_us(); - } - - return status; -} - -int inv_imu_disable_accel(struct inv_imu_device *s) -{ - int status = 0; - int stop_fifo_usage = 0; - uint32_t accel_odr_us; - PWR_MGMT0_GYRO_MODE_t gyro_mode; - ACCEL_CONFIG0_ODR_t acc_odr_bitfield; - uint8_t pwr_mgmt0_reg; - uint8_t accel_config0_reg, fifo_cfg_6_reg; - - /* Get accelerometer's ODR for next required wait */ - status |= inv_imu_read_reg(s, ACCEL_CONFIG0, 1, &accel_config0_reg); - acc_odr_bitfield = (ACCEL_CONFIG0_ODR_t)(accel_config0_reg & ACCEL_CONFIG0_ACCEL_ODR_MASK); - accel_odr_us = inv_imu_convert_odr_bitfield_to_us(acc_odr_bitfield); - - status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &pwr_mgmt0_reg); - gyro_mode = (PWR_MGMT0_GYRO_MODE_t)(pwr_mgmt0_reg & PWR_MGMT0_GYRO_MODE_MASK); - if ((gyro_mode == PWR_MGMT0_GYRO_MODE_OFF) && s->fifo_is_used) { - /* - * Accel is off and gyro is about to be turned off. - * Flush FIFO so that there is no old data at next enable time - */ - stop_fifo_usage = 1; - } - - /* Check if accel is the last sensor enabled and bit rcosc dis is not set */ - status |= inv_imu_read_reg(s, FIFO_CONFIG6_MREG1, 1, &fifo_cfg_6_reg); - if ( (gyro_mode == PWR_MGMT0_GYRO_MODE_OFF) - && ((fifo_cfg_6_reg & FIFO_CONFIG6_RCOSC_REQ_ON_FIFO_THS_DIS_MASK) == 0)) { - /* - * Disable the automatic RCOSC power on to avoid extra power consumption - * in sleep mode (all sensors and clocks off) - */ - fifo_cfg_6_reg |= ((1 & FIFO_CONFIG6_RCOSC_REQ_ON_FIFO_THS_DIS_MASK) - << FIFO_CONFIG6_RCOSC_REQ_ON_FIFO_THS_DIS_POS); - status |= inv_imu_write_reg(s, FIFO_CONFIG6_MREG1, 1, &fifo_cfg_6_reg); - inv_imu_sleep_us(accel_odr_us); - } - - pwr_mgmt0_reg &= ~PWR_MGMT0_ACCEL_MODE_MASK; - pwr_mgmt0_reg |= PWR_MGMT0_ACCEL_MODE_OFF; - status |= inv_imu_write_reg(s, PWR_MGMT0, 1, &pwr_mgmt0_reg); - - if (stop_fifo_usage && s->fifo_is_used) { - /* Reset FIFO explicitly so there is no data left in FIFO once all sensors are off */ - status |= inv_imu_reset_fifo(s); - } - - return status; -} - -int inv_imu_enable_gyro_low_noise_mode(struct inv_imu_device *s) -{ - int status = 0; - PWR_MGMT0_ACCEL_MODE_t accel_mode; - PWR_MGMT0_GYRO_MODE_t gyro_mode; - ACCEL_CONFIG0_ODR_t acc_odr_bitfield; - uint32_t accel_odr_us; - uint8_t pwr_mgmt0_reg; - uint8_t accel_config0_reg; - uint64_t current_time; - - /* - * Powering the gyroscope on immediately after powering it off can result in device failure. - * The gyroscope proof mass can continue vibrating after it has been powered off, - * and powering it back on immediately can result in unpredictable proof mass movement. - * After powering the gyroscope off, a period of > 20 ms should be allowed - * to elapse before it is powered back on. - */ - if (s->gyro_power_off_tmst != UINT32_MAX) { - current_time = inv_imu_get_time_us(); - /* Handle rollover */ - if (current_time <= s->gyro_power_off_tmst) - current_time += UINT32_MAX; - /* If 20 ms are not elapsed since power-off error is returned */ - if ((current_time - s->gyro_power_off_tmst) <= GYR_POWER_OFF_DUR_US) - return INV_ERROR_HW; - } - - status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &pwr_mgmt0_reg); - accel_mode = (PWR_MGMT0_ACCEL_MODE_t)(pwr_mgmt0_reg & PWR_MGMT0_ACCEL_MODE_MASK); - gyro_mode = (PWR_MGMT0_GYRO_MODE_t)(pwr_mgmt0_reg & PWR_MGMT0_GYRO_MODE_MASK); - /* Check if the accelerometer is the only one enabled */ - if ( (accel_mode == PWR_MGMT0_ACCEL_MODE_LP) - && ( (gyro_mode == PWR_MGMT0_GYRO_MODE_OFF) - || (gyro_mode == PWR_MGMT0_GYRO_MODE_STANDBY))) { - /* Get accelerometer's ODR for next required wait */ - status |= inv_imu_read_reg(s, ACCEL_CONFIG0, 1, &accel_config0_reg); - acc_odr_bitfield = (ACCEL_CONFIG0_ODR_t)(accel_config0_reg & ACCEL_CONFIG0_ACCEL_ODR_MASK); - accel_odr_us = inv_imu_convert_odr_bitfield_to_us(acc_odr_bitfield); - /* Select the RC OSC as clock source for the accelerometer */ - status |= select_rcosc(s); - /* Wait one accel ODR before enabling the gyroscope */ - inv_imu_sleep_us(accel_odr_us); - } - - /* Enable/Switch the gyroscope in/to low noise mode */ - /* Read a new time because select_rcosc() modified it */ - status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &pwr_mgmt0_reg); - pwr_mgmt0_reg &= ~PWR_MGMT0_GYRO_MODE_MASK; - pwr_mgmt0_reg |= (uint8_t)PWR_MGMT0_GYRO_MODE_LN; - status |= inv_imu_write_reg(s, PWR_MGMT0, 1, &pwr_mgmt0_reg); - inv_imu_sleep_us(200); - - if (gyro_mode == PWR_MGMT0_GYRO_MODE_OFF) { - /* First data are wrong after gyro enable using IIR filter - There is no signal that says Gyro start-up has completed and data are stable using FIR filter - and the Gyro max start-up time is 40ms - So keep track of the time at start-up to discard the invalid data, about 60ms after enable - */ - if (s->fifo_is_used) - s->gyro_start_time_us = inv_imu_get_time_us(); - } - - return status; -} - -int inv_imu_disable_gyro(struct inv_imu_device *s) -{ - int status = 0; - int stop_fifo_usage = 0; - ACCEL_CONFIG0_ODR_t acc_odr_bitfield; - uint32_t accel_odr_us; - PWR_MGMT0_ACCEL_MODE_t accel_mode; - uint8_t pwr_mgmt0_reg; - uint8_t accel_config0_reg, fifo_cfg_6_reg; - - /* Get accelerometer's ODR for next required wait */ - status |= inv_imu_read_reg(s, ACCEL_CONFIG0, 1, &accel_config0_reg); - acc_odr_bitfield = (ACCEL_CONFIG0_ODR_t)(accel_config0_reg & ACCEL_CONFIG0_ACCEL_ODR_MASK); - accel_odr_us = inv_imu_convert_odr_bitfield_to_us(acc_odr_bitfield); - - status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &pwr_mgmt0_reg); - accel_mode = (PWR_MGMT0_ACCEL_MODE_t)(pwr_mgmt0_reg & PWR_MGMT0_ACCEL_MODE_MASK); - - if ((accel_mode == PWR_MGMT0_ACCEL_MODE_OFF) && s->fifo_is_used) { - /* - * Accel is off and gyro is about to be turned off. - * Flush FIFO so that there is no old data at next enable time - */ - stop_fifo_usage = 1; - } - - /* Check if the accelerometer is enabled in low power mode */ - if (accel_mode == PWR_MGMT0_ACCEL_MODE_LP) { - /* Select the RC OSC as clock source for the accelerometer */ - status |= select_rcosc(s); - } - - /* Check if gyro is the last sensor enabled and bit rcosc dis is not set */ - status |= inv_imu_read_reg(s, FIFO_CONFIG6_MREG1, 1, &fifo_cfg_6_reg); - if ( (accel_mode == PWR_MGMT0_ACCEL_MODE_OFF) - && ((fifo_cfg_6_reg & FIFO_CONFIG6_RCOSC_REQ_ON_FIFO_THS_DIS_MASK) == 0)) { - - GYRO_CONFIG0_ODR_t gyro_odr_bitfield; - uint32_t gyro_odr_us; - uint8_t gyro_config0_reg; - - /* Read gyro odr to apply it to the sleep */ - status |= inv_imu_read_reg(s, GYRO_CONFIG0, 1, &gyro_config0_reg); - gyro_odr_bitfield = (GYRO_CONFIG0_ODR_t)(gyro_config0_reg & GYRO_CONFIG0_GYRO_ODR_MASK); - gyro_odr_us = inv_imu_convert_odr_bitfield_to_us(gyro_odr_bitfield); - - /* - * Disable the automatic RCOSC power on to avoid extra power consumption - * in sleep mode (all sensors and clocks off) - */ - fifo_cfg_6_reg |= ((1 & FIFO_CONFIG6_RCOSC_REQ_ON_FIFO_THS_DIS_MASK) - << FIFO_CONFIG6_RCOSC_REQ_ON_FIFO_THS_DIS_POS); - status |= inv_imu_write_reg(s, FIFO_CONFIG6_MREG1, 1, &fifo_cfg_6_reg); - inv_imu_sleep_us(gyro_odr_us); - } - - /* Read a new time because select_rcosc() modified it */ - status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &pwr_mgmt0_reg); - pwr_mgmt0_reg &= ~PWR_MGMT0_GYRO_MODE_MASK; - pwr_mgmt0_reg |= PWR_MGMT0_GYRO_MODE_OFF; - status |= inv_imu_write_reg(s, PWR_MGMT0, 1, &pwr_mgmt0_reg); - /* keep track of gyro power-off time */ - s->gyro_power_off_tmst = inv_imu_get_time_us(); - - if (accel_mode == PWR_MGMT0_ACCEL_MODE_LP) { - /* Wait based on accelerometer ODR */ - inv_imu_sleep_us(2 * accel_odr_us); - /* Select the WU OSC as clock source for the accelerometer */ - status |= select_wuosc(s); - } - - if (stop_fifo_usage && s->fifo_is_used) { - /* Reset FIFO explicitly so there is no data left in FIFO once all sensors are off */ - status |= inv_imu_reset_fifo(s); - } - - return status; -} - -int inv_imu_enable_fsync(struct inv_imu_device *s) -{ - int status = 0; - uint8_t value; - - status |= inv_imu_switch_on_mclk(s); - - //Enable Fsync - status |= inv_imu_read_reg(s, FSYNC_CONFIG_MREG1, 1, &value); - value &= ~FSYNC_CONFIG_FSYNC_UI_SEL_MASK; - value |= (uint8_t)FSYNC_CONFIG_UI_SEL_TEMP; - status |= inv_imu_write_reg(s, FSYNC_CONFIG_MREG1, 1, &value); - - status |= inv_imu_read_reg(s, TMST_CONFIG1_MREG1, 1, &value); - value &= ~TMST_CONFIG1_TMST_FSYNC_EN_MASK; - value |= TMST_CONFIG1_TMST_FSYNC_EN; - status |= inv_imu_write_reg(s, TMST_CONFIG1_MREG1, 1, &value); - - status |= inv_imu_switch_off_mclk(s); - - return status; -} - -int inv_imu_disable_fsync(struct inv_imu_device *s) -{ - int status = 0; - uint8_t value; - - status |= inv_imu_switch_on_mclk(s); - - // Disable Fsync - status |= inv_imu_read_reg(s, FSYNC_CONFIG_MREG1, 1, &value); - value &= ~FSYNC_CONFIG_FSYNC_UI_SEL_MASK; - value |= (uint8_t)FSYNC_CONFIG_UI_SEL_NO; - status |= inv_imu_write_reg(s, FSYNC_CONFIG_MREG1, 1, &value); - - status |= inv_imu_read_reg(s, TMST_CONFIG1_MREG1, 1, &value); - value &= ~TMST_CONFIG1_TMST_FSYNC_EN_MASK; - value |= TMST_CONFIG1_TMST_FSYNC_DIS; - status |= inv_imu_write_reg(s, TMST_CONFIG1_MREG1, 1, &value); - - status |= inv_imu_switch_off_mclk(s); - - return status; -} - -int inv_imu_configure_wom(struct inv_imu_device *s, - const uint8_t wom_x_th, - const uint8_t wom_y_th, - const uint8_t wom_z_th, - WOM_CONFIG_WOM_INT_MODE_t wom_int, - WOM_CONFIG_WOM_INT_DUR_t wom_dur) -{ - int status = 0; - uint8_t data[3]; - uint8_t value; - - data[0] = wom_x_th; // Set X threshold - data[1] = wom_y_th; // Set Y threshold - data[2] = wom_z_th; // Set Z threshold - status |= inv_imu_write_reg(s, ACCEL_WOM_X_THR_MREG1, sizeof(data), &data[0]); - - // Compare current sample with the previous sample and WOM from the 3 axis are ORed or ANDed to produce WOM signal. - status |= inv_imu_read_reg(s, WOM_CONFIG, 1, &value); - value &= ~WOM_CONFIG_WOM_INT_MODE_MASK; - value |= (uint8_t)WOM_CONFIG_WOM_MODE_CMP_PREV | (uint8_t)wom_int; - - // Configure the number of overthreshold event to wait before producing the WOM signal. - value &= ~WOM_CONFIG_WOM_INT_DUR_MASK; - value |= (uint8_t)wom_dur; - status |= inv_imu_write_reg(s, WOM_CONFIG, 1, &value); - - return status; -} - -int inv_imu_enable_wom(struct inv_imu_device *s) -{ - int status = 0; - uint8_t value; - inv_imu_interrupt_parameter_t config_int = {(inv_imu_interrupt_value)0}; - - /* Disable fifo threshold int1 */ - status |= inv_imu_get_config_int1(s, &config_int); - config_int.INV_FIFO_THS = INV_IMU_DISABLE; - status |= inv_imu_set_config_int1(s, &config_int); - - /* Enable WOM */ - status |= inv_imu_read_reg(s, WOM_CONFIG, 1, &value); - value &= ~WOM_CONFIG_WOM_EN_MASK; - value |= (uint8_t)WOM_CONFIG_WOM_EN_ENABLE; - status |= inv_imu_write_reg(s, WOM_CONFIG, 1, &value); - - - return status; -} - -int inv_imu_disable_wom(struct inv_imu_device *s) -{ - int status = 0; - uint8_t value; - inv_imu_interrupt_parameter_t config_int = {(inv_imu_interrupt_value)0}; - - /* Disable WOM */ - status |= inv_imu_read_reg(s, WOM_CONFIG, 1, &value); - value &= ~WOM_CONFIG_WOM_EN_MASK; - value |= WOM_CONFIG_WOM_EN_DISABLE; - status |= inv_imu_write_reg(s, WOM_CONFIG, 1, &value); - - /* Enable fifo threshold int1 */ - status |= inv_imu_get_config_int1(s, &config_int); - config_int.INV_FIFO_THS = INV_IMU_ENABLE; - status |= inv_imu_set_config_int1(s, &config_int); - - return status; -} - -int inv_imu_get_config_int1(struct inv_imu_device *s, inv_imu_interrupt_parameter_t *it) -{ - int status = 0; - uint8_t data; - - status |= inv_imu_read_reg(s, INT_SOURCE0, 1, &data); - it->INV_UI_FSYNC = (inv_imu_interrupt_value)((data & INT_SOURCE0_FSYNC_INT1_EN_MASK) >> INT_SOURCE0_FSYNC_INT1_EN_POS); - it->INV_UI_DRDY = (inv_imu_interrupt_value)((data & INT_SOURCE0_DRDY_INT1_EN_MASK) >> INT_SOURCE0_DRDY_INT1_EN_POS); - it->INV_FIFO_THS = (inv_imu_interrupt_value)((data & INT_SOURCE0_FIFO_THS_INT1_EN_MASK) >> INT_SOURCE0_FIFO_THS_INT1_EN_POS); - it->INV_FIFO_FULL = (inv_imu_interrupt_value)((data & INT_SOURCE0_FIFO_FULL_INT1_EN_MASK) >> INT_SOURCE0_FIFO_FULL_INT1_EN_POS); - - status |= inv_imu_read_reg(s, INT_SOURCE1, 1, &data); - it->INV_SMD = (inv_imu_interrupt_value)((data & INT_SOURCE1_SMD_INT1_EN_MASK) >> INT_SOURCE1_SMD_INT1_EN_POS); - it->INV_WOM_X = (inv_imu_interrupt_value)((data & INT_SOURCE1_WOM_X_INT1_EN_MASK) >> INT_SOURCE1_WOM_X_INT1_EN_POS); - it->INV_WOM_Y = (inv_imu_interrupt_value)((data & INT_SOURCE1_WOM_Y_INT1_EN_MASK) >> INT_SOURCE1_WOM_Y_INT1_EN_POS); - it->INV_WOM_Z = (inv_imu_interrupt_value)((data & INT_SOURCE1_WOM_Z_INT1_EN_MASK) >> INT_SOURCE1_WOM_Z_INT1_EN_POS); - - status |= inv_imu_read_reg(s, INT_SOURCE6_MREG1, 1, &data); - it->INV_FF = (inv_imu_interrupt_value)((data & INT_SOURCE6_FF_INT1_EN_MASK) >> INT_SOURCE6_FF_INT1_EN_POS); - it->INV_LOWG = (inv_imu_interrupt_value)((data & INT_SOURCE6_LOWG_INT1_EN_MASK) >> INT_SOURCE6_LOWG_INT1_EN_POS); - it->INV_STEP_DET = (inv_imu_interrupt_value)((data & INT_SOURCE6_STEP_DET_INT1_EN_MASK) >> INT_SOURCE6_STEP_DET_INT1_EN_POS); - it->INV_STEP_CNT_OVFL = (inv_imu_interrupt_value)((data & INT_SOURCE6_STEP_CNT_OFL_INT1_EN_MASK) >> INT_SOURCE6_STEP_CNT_OFL_INT1_EN_POS); - it->INV_TILT_DET = (inv_imu_interrupt_value)((data & INT_SOURCE6_TILT_DET_INT1_EN_MASK) >> INT_SOURCE6_TILT_DET_INT1_EN_POS); - - return status; -} - -int inv_imu_get_config_int2(struct inv_imu_device *s, inv_imu_interrupt_parameter_t *it) -{ - int status = 0; - uint8_t data; - - status |= inv_imu_read_reg(s, INT_SOURCE3, 1, &data); - it->INV_UI_FSYNC = (inv_imu_interrupt_value)((data & INT_SOURCE3_FSYNC_INT2_EN_MASK) >> INT_SOURCE3_FSYNC_INT2_EN_POS); - it->INV_UI_DRDY = (inv_imu_interrupt_value)((data & INT_SOURCE3_DRDY_INT2_EN_MASK) >> INT_SOURCE3_DRDY_INT2_EN_POS); - it->INV_FIFO_THS = (inv_imu_interrupt_value)((data & INT_SOURCE3_FIFO_THS_INT2_EN_MASK) >> INT_SOURCE3_FIFO_THS_INT2_EN_POS); - it->INV_FIFO_FULL = (inv_imu_interrupt_value)((data & INT_SOURCE3_FIFO_FULL_INT2_EN_MASK) >> INT_SOURCE3_FIFO_FULL_INT2_EN_POS); - - status |= inv_imu_read_reg(s, INT_SOURCE4, 1, &data); - it->INV_SMD = (inv_imu_interrupt_value)((data & INT_SOURCE4_SMD_INT2_EN_MASK) >> INT_SOURCE4_SMD_INT2_EN_POS); - it->INV_WOM_X = (inv_imu_interrupt_value)((data & INT_SOURCE4_WOM_X_INT2_EN_MASK) >> INT_SOURCE4_WOM_X_INT2_EN_POS); - it->INV_WOM_Y = (inv_imu_interrupt_value)((data & INT_SOURCE4_WOM_Y_INT2_EN_MASK) >> INT_SOURCE4_WOM_Y_INT2_EN_POS); - it->INV_WOM_Z = (inv_imu_interrupt_value)((data & INT_SOURCE4_WOM_Z_INT2_EN_MASK) >> INT_SOURCE4_WOM_Z_INT2_EN_POS); - - status |= inv_imu_read_reg(s, INT_SOURCE7_MREG1, 1, &data); - it->INV_FF = (inv_imu_interrupt_value)((data & INT_SOURCE7_FF_INT2_EN_MASK) >> INT_SOURCE7_FF_INT2_EN_POS); - it->INV_LOWG = (inv_imu_interrupt_value)((data & INT_SOURCE7_LOWG_INT2_EN_MASK) >> INT_SOURCE7_LOWG_INT2_EN_POS); - it->INV_STEP_DET = (inv_imu_interrupt_value)((data & INT_SOURCE7_STEP_DET_INT2_EN_MASK) >> INT_SOURCE7_STEP_DET_INT2_EN_POS); - it->INV_STEP_CNT_OVFL = (inv_imu_interrupt_value)((data & INT_SOURCE7_STEP_CNT_OFL_INT2_EN_MASK) >> INT_SOURCE7_STEP_CNT_OFL_INT2_EN_POS); - it->INV_TILT_DET = (inv_imu_interrupt_value)((data & INT_SOURCE7_TILT_DET_INT2_EN_MASK) >> INT_SOURCE7_TILT_DET_INT2_EN_POS); - - return status; -} - -int inv_imu_set_config_int1(struct inv_imu_device *s, inv_imu_interrupt_parameter_t *it) -{ - int status = 0; - uint8_t data[2]; - - status |= inv_imu_read_reg(s, INT_SOURCE0, 2, &data[0]); - - data[0] &= ~(INT_SOURCE0_FSYNC_INT1_EN_MASK - | INT_SOURCE0_DRDY_INT1_EN_MASK - | INT_SOURCE0_FIFO_THS_INT1_EN_MASK - | INT_SOURCE0_FIFO_FULL_INT1_EN_MASK); - data[0] |= ((it->INV_UI_FSYNC != 0) << INT_SOURCE0_FSYNC_INT1_EN_POS); - data[0] |= ((it->INV_UI_DRDY != 0) << INT_SOURCE0_DRDY_INT1_EN_POS); - data[0] |= ((it->INV_FIFO_THS != 0) << INT_SOURCE0_FIFO_THS_INT1_EN_POS); - data[0] |= ((it->INV_FIFO_FULL != 0) << INT_SOURCE0_FIFO_FULL_INT1_EN_POS); - - data[1] &= ~(INT_SOURCE1_SMD_INT1_EN_MASK - | INT_SOURCE1_WOM_X_INT1_EN_MASK - | INT_SOURCE1_WOM_Y_INT1_EN_MASK - | INT_SOURCE1_WOM_Z_INT1_EN_MASK); - data[1] |= ((it->INV_SMD != 0) << INT_SOURCE1_SMD_INT1_EN_POS); - data[1] |= ((it->INV_WOM_X != 0) << INT_SOURCE1_WOM_X_INT1_EN_POS); - data[1] |= ((it->INV_WOM_Y != 0) << INT_SOURCE1_WOM_Y_INT1_EN_POS); - data[1] |= ((it->INV_WOM_Z != 0) << INT_SOURCE1_WOM_Z_INT1_EN_POS); - - status |= inv_imu_write_reg(s, INT_SOURCE0, 2, &data[0]); - - status |= inv_imu_read_reg(s, INT_SOURCE6_MREG1, 1, &data[0]); - - data[0] &= ~(INT_SOURCE6_FF_INT1_EN_MASK - | INT_SOURCE6_LOWG_INT1_EN_MASK - | INT_SOURCE6_STEP_DET_INT1_EN_MASK - | INT_SOURCE6_STEP_CNT_OFL_INT1_EN_MASK - | INT_SOURCE6_TILT_DET_INT1_EN_MASK); - data[0] |= ((it->INV_FF != 0) << INT_SOURCE6_FF_INT1_EN_POS); - data[0] |= ((it->INV_LOWG != 0) << INT_SOURCE6_LOWG_INT1_EN_POS); - data[0] |= ((it->INV_STEP_DET != 0) << INT_SOURCE6_STEP_DET_INT1_EN_POS); - data[0] |= ((it->INV_STEP_CNT_OVFL != 0) << INT_SOURCE6_STEP_CNT_OFL_INT1_EN_POS); - data[0] |= ((it->INV_TILT_DET != 0) << INT_SOURCE6_TILT_DET_INT1_EN_POS); - status |= inv_imu_write_reg(s, INT_SOURCE6_MREG1, 1, &data[0]); - - return status; -} - -int inv_imu_set_config_int2(struct inv_imu_device *s, inv_imu_interrupt_parameter_t *it) -{ - int status = 0; - uint8_t data[2]; - - status |= inv_imu_read_reg(s, INT_SOURCE3, 2, &data[0]); - - data[0] &= ~(INT_SOURCE3_FSYNC_INT2_EN_MASK - | INT_SOURCE3_DRDY_INT2_EN_MASK - | INT_SOURCE3_FIFO_THS_INT2_EN_MASK - | INT_SOURCE3_FIFO_FULL_INT2_EN_MASK); - data[0] |= ((it->INV_UI_FSYNC != 0) << INT_SOURCE3_FSYNC_INT2_EN_POS); - data[0] |= ((it->INV_UI_DRDY != 0) << INT_SOURCE3_DRDY_INT2_EN_POS); - data[0] |= ((it->INV_FIFO_THS != 0) << INT_SOURCE3_FIFO_THS_INT2_EN_POS); - data[0] |= ((it->INV_FIFO_FULL != 0) << INT_SOURCE3_FIFO_FULL_INT2_EN_POS); - - data[1] &= ~(INT_SOURCE4_SMD_INT2_EN_MASK - | INT_SOURCE4_WOM_X_INT2_EN_MASK - | INT_SOURCE4_WOM_Y_INT2_EN_MASK - | INT_SOURCE4_WOM_Z_INT2_EN_MASK); - data[1] |= ((it->INV_SMD != 0) << INT_SOURCE4_SMD_INT2_EN_POS); - data[1] |= ((it->INV_WOM_X != 0) << INT_SOURCE4_WOM_X_INT2_EN_POS); - data[1] |= ((it->INV_WOM_Y != 0) << INT_SOURCE4_WOM_Y_INT2_EN_POS); - data[1] |= ((it->INV_WOM_Z != 0) << INT_SOURCE4_WOM_Z_INT2_EN_POS); - - status |= inv_imu_write_reg(s, INT_SOURCE3, 2, &data[0]); - - status |= inv_imu_read_reg(s, INT_SOURCE7_MREG1, 1, &data[0]); - - data[0] &= ~(INT_SOURCE7_FF_INT2_EN_MASK - | INT_SOURCE7_LOWG_INT2_EN_MASK - | INT_SOURCE7_STEP_DET_INT2_EN_MASK - | INT_SOURCE7_STEP_CNT_OFL_INT2_EN_MASK - | INT_SOURCE7_TILT_DET_INT2_EN_MASK); - data[0] |= ((it->INV_FF != 0) << INT_SOURCE7_FF_INT2_EN_POS); - data[0] |= ((it->INV_LOWG != 0) << INT_SOURCE7_LOWG_INT2_EN_POS); - data[0] |= ((it->INV_STEP_DET != 0) << INT_SOURCE7_STEP_DET_INT2_EN_POS); - data[0] |= ((it->INV_STEP_CNT_OVFL != 0) << INT_SOURCE7_STEP_CNT_OFL_INT2_EN_POS); - data[0] |= ((it->INV_TILT_DET != 0) << INT_SOURCE7_TILT_DET_INT2_EN_POS); - - status |= inv_imu_write_reg(s, INT_SOURCE7_MREG1, 1, &data[0]); - - return status; -} - -int inv_imu_get_data_from_registers(struct inv_imu_device *s) -{ - int status = 0; - uint8_t int_status; - uint8_t temperature[2]; - uint8_t accel[ACCEL_DATA_SIZE]; - uint8_t gyro[GYRO_DATA_SIZE]; - inv_imu_sensor_event_t event; - - /* Ensure data ready status bit is set */ - if ((status |= inv_imu_read_reg(s, INT_STATUS_DRDY, 1, &int_status))) - return status; - - if (int_status & INT_STATUS_DRDY_DATA_RDY_INT_MASK) { - - status |= inv_imu_read_reg(s, TEMP_DATA1, 2, &temperature[0]); - - if (s->endianness_data == INTF_CONFIG0_DATA_BIG_ENDIAN) { - event.temperature = (((int16_t)temperature[0]) << 8) | temperature[1]; - } else { - event.temperature = (((int16_t)temperature[1]) << 8) | temperature[0]; - } - - status |= inv_imu_read_reg(s, ACCEL_DATA_X1, ACCEL_DATA_SIZE, &accel[0]); - - if (s->endianness_data == INTF_CONFIG0_DATA_BIG_ENDIAN) { - event.accel[0] = (accel[0] << 8) | accel[1]; - event.accel[1] = (accel[2] << 8) | accel[3]; - event.accel[2] = (accel[4] << 8) | accel[5]; - } else { - event.accel[0] = (accel[1] << 8) | accel[0]; - event.accel[1] = (accel[3] << 8) | accel[2]; - event.accel[2] = (accel[5] << 8) | accel[4]; - } - - status |= inv_imu_read_reg(s, GYRO_DATA_X1, GYRO_DATA_SIZE, &gyro[0]); - - if (s->endianness_data == INTF_CONFIG0_DATA_BIG_ENDIAN) { - event.gyro[0] = (gyro[0] << 8) | gyro[1]; - event.gyro[1] = (gyro[2] << 8) | gyro[3]; - event.gyro[2] = (gyro[4] << 8) | gyro[5]; - } else { - event.gyro[0] = (gyro[1] << 8) | gyro[0]; - event.gyro[1] = (gyro[3] << 8) | gyro[2]; - event.gyro[2] = (gyro[5] << 8) | gyro[4]; - } - - /* call sensor event callback */ - if (s->sensor_event_cb) - s->sensor_event_cb(&event); - } - /*else: Data Ready was not reached*/ - - return status; -} - -int inv_imu_get_data_from_fifo(struct inv_imu_device *s) -{ - int status = 0; - uint8_t int_status; - uint16_t packet_count_i, packet_count, total_packet_count = 0; - uint16_t packet_size = FIFO_HEADER_SIZE - + FIFO_ACCEL_DATA_SIZE - + FIFO_GYRO_DATA_SIZE - + FIFO_TEMP_DATA_SIZE - + FIFO_TS_FSYNC_SIZE; - fifo_header_t *header; - - /* Ensure data ready status bit is set */ - if ((status |= inv_imu_read_reg(s, INT_STATUS, 1, &int_status))) - return status; - - if ( (int_status & INT_STATUS_FIFO_THS_INT_MASK) - || (int_status & INT_STATUS_FIFO_FULL_INT_MASK)) { - uint8_t data[2]; - - /* - * Force the idle bit to disable - * The chip expects no delay between reading the FIFO count and reading FIFO data. - * If the program is interrupted for more than 1ms, the chip will switch the clock, - * and we won't guarantee the proper functioning of the "read fifo" operation. - */ - status |= inv_imu_switch_on_mclk(s); - - /* FIFO record mode configured at driver init, so we read packet number, not byte count */ - if ((status |= inv_imu_read_reg(s, FIFO_COUNTH, 2, &data[0])) != INV_ERROR_SUCCESS){ - status |= inv_imu_switch_off_mclk(s); - return status; - } - - total_packet_count = (uint16_t)(data[0] | (data[1] << 8)); - packet_count = total_packet_count; - while (packet_count > 0) { - uint16_t invalid_frame_cnt = 0; - /* Read FIFO only when data is expected in FIFO */ - /* fifo_idx type variable must be large enough to parse the FIFO_MIRRORING_SIZE */ - uint16_t fifo_idx = 0; - - if (s->fifo_highres_enabled) - packet_size = FIFO_20BYTES_PACKET_SIZE; - - if ((status |= inv_imu_read_reg(s, FIFO_DATA, packet_size *packet_count, s->fifo_data))) { - /* - * Sensor data is in FIFO according to FIFO_COUNT but failed to read FIFO, - * reset FIFO and try next chance - */ - status |= inv_imu_reset_fifo(s); - status |= inv_imu_switch_off_mclk(s); - return status; - } - - for (packet_count_i = 0; packet_count_i < packet_count; packet_count_i++) { - inv_imu_sensor_event_t event; - event.sensor_mask = 0; - header = (fifo_header_t *) &s->fifo_data[fifo_idx]; - fifo_idx += FIFO_HEADER_SIZE; - - /* Decode invalid frame, this typically happens if packet_count is greater - than 2 in case of WOM event since FIFO_THS IRQ is disabled if WOM is enabled, - and we wake up only upon a WOM event so we can have more than 1 ACC packet in FIFO - and we do not wait the oscillator wake-up time so we will receive 1 invalid packet, - which we will read again upon next FIFO read operation thanks to while() loop*/ - if (header->Byte == 0x80) { - uint8_t is_invalid_frame = 1; - /* Check N-FIFO_HEADER_SIZE remaining bytes are all 0 to be invalid frame */ - for (uint8_t i = 0 ; i < (packet_size - FIFO_HEADER_SIZE); i++) { - if (s->fifo_data[fifo_idx + i]) { - is_invalid_frame = 0; - break; - } - } - /* In case of invalid frame read FIFO will be retried for this packet */ - invalid_frame_cnt += is_invalid_frame; - } else { - /* Decode packet */ - if (header->bits.msg_bit) { - /* MSG BIT set in FIFO header, Resetting FIFO */ - status |= inv_imu_reset_fifo(s); - status |= inv_imu_switch_off_mclk(s); - return INV_ERROR; - } - - if (header->bits.accel_bit) { - if (s->endianness_data == INTF_CONFIG0_DATA_BIG_ENDIAN) { - event.accel[0] = (s->fifo_data[0 + fifo_idx] << 8) | s->fifo_data[1 + fifo_idx]; - event.accel[1] = (s->fifo_data[2 + fifo_idx] << 8) | s->fifo_data[3 + fifo_idx]; - event.accel[2] = (s->fifo_data[4 + fifo_idx] << 8) | s->fifo_data[5 + fifo_idx]; - } else { - event.accel[0] = (s->fifo_data[1 + fifo_idx] << 8) | s->fifo_data[0 + fifo_idx]; - event.accel[1] = (s->fifo_data[3 + fifo_idx] << 8) | s->fifo_data[2 + fifo_idx]; - event.accel[2] = (s->fifo_data[5 + fifo_idx] << 8) | s->fifo_data[4 + fifo_idx]; - } - fifo_idx += FIFO_ACCEL_DATA_SIZE; - } - - if (header->bits.gyro_bit) { - if (s->endianness_data == INTF_CONFIG0_DATA_BIG_ENDIAN) { - event.gyro[0] = (s->fifo_data[0 + fifo_idx] << 8) | s->fifo_data[1 + fifo_idx]; - event.gyro[1] = (s->fifo_data[2 + fifo_idx] << 8) | s->fifo_data[3 + fifo_idx]; - event.gyro[2] = (s->fifo_data[4 + fifo_idx] << 8) | s->fifo_data[5 + fifo_idx]; - } else { - event.gyro[0] = (s->fifo_data[1 + fifo_idx] << 8) | s->fifo_data[0 + fifo_idx]; - event.gyro[1] = (s->fifo_data[3 + fifo_idx] << 8) | s->fifo_data[2 + fifo_idx]; - event.gyro[2] = (s->fifo_data[5 + fifo_idx] << 8) | s->fifo_data[4 + fifo_idx]; - } - fifo_idx += FIFO_GYRO_DATA_SIZE; - } - - if ((header->bits.accel_bit) || (header->bits.gyro_bit)) { - /* - * The coarse temperature (8 or 16B FIFO packet format) - * range is ± 64 degrees with 0.5°C resolution. - * but the fine temperature range (2 bytes) (20B FIFO packet format) is - * ± 256 degrees with (1/128)°C resolution - */ - if (header->bits.twentybits_bit) { - if (s->endianness_data == INTF_CONFIG0_DATA_BIG_ENDIAN) { - event.temperature = (((int16_t)s->fifo_data[0 + fifo_idx]) << 8) - | s->fifo_data[1 + fifo_idx]; - } else { - event.temperature = (((int16_t)s->fifo_data[1 + fifo_idx]) << 8) - | s->fifo_data[0 + fifo_idx]; - } - fifo_idx += FIFO_TEMP_DATA_SIZE + FIFO_TEMP_HIGH_RES_SIZE; - - /* new temperature data */ - if (event.temperature != INVALID_VALUE_FIFO) - event.sensor_mask |= (1 << INV_SENSOR_TEMPERATURE); - } else { - /* cast to int8_t since FIFO is in 16 bits mode (temperature on 8 bits) */ - event.temperature = (int8_t)s->fifo_data[0 + fifo_idx]; - fifo_idx += FIFO_TEMP_DATA_SIZE; - - /* new temperature data */ - if (event.temperature != INVALID_VALUE_FIFO_1B) - event.sensor_mask |= (1 << INV_SENSOR_TEMPERATURE); - } - } - - if ((header->bits.timestamp_bit) || (header->bits.fsync_bit)) { - if (s->endianness_data == INTF_CONFIG0_DATA_BIG_ENDIAN) - event.timestamp_fsync = (s->fifo_data[0 + fifo_idx] << 8) | s->fifo_data[1 + fifo_idx]; - else - event.timestamp_fsync = (s->fifo_data[1 + fifo_idx] << 8) | s->fifo_data[0 + fifo_idx]; - fifo_idx += FIFO_TS_FSYNC_SIZE; - /* new fsync event */ - if (header->bits.fsync_bit) - event.sensor_mask |= (1 << INV_SENSOR_FSYNC_EVENT); - } - - if (header->bits.accel_bit) { - if ( (event.accel[0] != INVALID_VALUE_FIFO) - && (event.accel[1] != INVALID_VALUE_FIFO) - && (event.accel[2] != INVALID_VALUE_FIFO)) { - if (s->accel_start_time_us == UINT32_MAX) { - event.sensor_mask |= (1 << INV_SENSOR_ACCEL); - } else { - if (!header->bits.fsync_bit) { - /* Discard first data after startup to let output to settle */ - if ((inv_imu_get_time_us() - s->accel_start_time_us) >= ACC_STARTUP_TIME_US) { - s->accel_start_time_us = UINT32_MAX; - event.sensor_mask |= (1 << INV_SENSOR_ACCEL); - } - } - } - - if ((event.sensor_mask & (1 << INV_SENSOR_ACCEL)) && (header->bits.twentybits_bit)) { - event.accel_high_res[0] = (s->fifo_data[0 + fifo_idx] >> 4) & 0xF; - event.accel_high_res[1] = (s->fifo_data[1 + fifo_idx] >> 4) & 0xF; - event.accel_high_res[2] = (s->fifo_data[2 + fifo_idx] >> 4) & 0xF; - } - } - } - - if (header->bits.gyro_bit) { - if ( (event.gyro[0] != INVALID_VALUE_FIFO) - && (event.gyro[1] != INVALID_VALUE_FIFO) - && (event.gyro[2] != INVALID_VALUE_FIFO)) { - if (s->gyro_start_time_us == UINT32_MAX) { - event.sensor_mask |= (1 << INV_SENSOR_GYRO); - } else { - if (!header->bits.fsync_bit) { - /* Discard first data after startup to let output to settle */ - if ((inv_imu_get_time_us() - s->gyro_start_time_us) >= GYR_STARTUP_TIME_US) { - s->gyro_start_time_us = UINT32_MAX; - event.sensor_mask |= (1 << INV_SENSOR_GYRO); - } - } - } - - if ((event.sensor_mask & (1 << INV_SENSOR_GYRO)) && (header->bits.twentybits_bit)) { - event.gyro_high_res[0] = (s->fifo_data[0 + fifo_idx]) & 0xF; - event.gyro_high_res[1] = (s->fifo_data[1 + fifo_idx]) & 0xF; - event.gyro_high_res[2] = (s->fifo_data[2 + fifo_idx]) & 0xF; - } - } - } - - if (header->bits.twentybits_bit) - fifo_idx += FIFO_ACCEL_GYRO_HIGH_RES_SIZE; - - /* call sensor event callback */ - if (s->sensor_event_cb) - s->sensor_event_cb(&event); - - } /* end of else invalid frame */ - } /* end of FIFO read for loop */ - packet_count = invalid_frame_cnt; - } /*end of while: packet_count > 0*/ - - status |= inv_imu_switch_off_mclk(s); - - } /*else: FIFO threshold was not reached and FIFO was not full*/ - - return total_packet_count; -} - -uint32_t inv_imu_convert_odr_bitfield_to_us(uint32_t odr_bitfield) -{ - /* - odr bitfield - frequency : odr ms - 0 - N/A - 1 - N/A - 2 - N/A - 3 - N/A - 4 - N/A - 5 - 1.6k : 0.625ms - (default) 6 - 800 : 1.25ms - 7 - 400 : 2.5 ms - 8 - 200 : 5 ms - 9 - 100 : 10 ms - 10 - 50 : 20 ms - 11 - 25 : 40 ms - 12 - 12.5 : 80 ms - 13 - 6.25 : 160 ms - 14 - 3.125 : 320 ms - 15 - 1.5625 : 640 ms - */ - - switch(odr_bitfield ) { - case ACCEL_CONFIG0_ODR_1600_HZ: return 625; - case ACCEL_CONFIG0_ODR_800_HZ: return 1250; - case ACCEL_CONFIG0_ODR_400_HZ: return 2500; - case ACCEL_CONFIG0_ODR_200_HZ: return 5000; - case ACCEL_CONFIG0_ODR_100_HZ: return 10000; - case ACCEL_CONFIG0_ODR_50_HZ: return 20000; - case ACCEL_CONFIG0_ODR_25_HZ: return 40000; - case ACCEL_CONFIG0_ODR_12_5_HZ: return 80000; - case ACCEL_CONFIG0_ODR_6_25_HZ: return 160000; - case ACCEL_CONFIG0_ODR_3_125_HZ: return 320000; - case ACCEL_CONFIG0_ODR_1_5625_HZ: - default: return 640000; - } -} - -int inv_imu_set_accel_frequency(struct inv_imu_device *s, const ACCEL_CONFIG0_ODR_t frequency) -{ - int status = 0; - uint8_t data; - - status |= inv_imu_read_reg(s, ACCEL_CONFIG0, 1, &data); - data &= ~ACCEL_CONFIG0_ACCEL_ODR_MASK; - data |= frequency; - status |= inv_imu_write_reg(s, ACCEL_CONFIG0, 1, &data); - - return status; -} - -int inv_imu_set_gyro_frequency(struct inv_imu_device *s, const GYRO_CONFIG0_ODR_t frequency) -{ - int status = 0; - uint8_t data; - - status |= inv_imu_read_reg(s, GYRO_CONFIG0, 1, &data); - data &= ~GYRO_CONFIG0_GYRO_ODR_MASK; - data |= frequency; - status |= inv_imu_write_reg(s, GYRO_CONFIG0, 1, &data); - - return status; -} - -int inv_imu_set_accel_fsr(struct inv_imu_device *s, ACCEL_CONFIG0_FS_SEL_t accel_fsr_g) -{ - int status = 0; - uint8_t data; - - status |= inv_imu_read_reg(s, ACCEL_CONFIG0, 1, &data); - data &= ~ACCEL_CONFIG0_ACCEL_UI_FS_SEL_MASK; - data |= accel_fsr_g; - status |= inv_imu_write_reg(s, ACCEL_CONFIG0, 1, &data); - - return status; -} - -int inv_imu_set_gyro_fsr(struct inv_imu_device *s, GYRO_CONFIG0_FS_SEL_t gyro_fsr_dps) -{ - int status = 0; - uint8_t data; - - status |= inv_imu_read_reg(s, GYRO_CONFIG0, 1, &data); - data &= ~GYRO_CONFIG0_GYRO_UI_FS_SEL_MASK; - data |= gyro_fsr_dps; - status |= inv_imu_write_reg(s, GYRO_CONFIG0, 1, &data); - - return status; -} - -int inv_imu_get_accel_fsr(struct inv_imu_device *s, ACCEL_CONFIG0_FS_SEL_t *accel_fsr_g) -{ - int status = 0; - uint8_t accel_config0_reg; - - if ((s->fifo_highres_enabled) && (s->fifo_is_used == INV_IMU_FIFO_ENABLED)) - *accel_fsr_g = ACCEL_CONFIG0_FS_SEL_MAX; - else { - status |= inv_imu_read_reg(s, ACCEL_CONFIG0, 1, &accel_config0_reg); - *accel_fsr_g = (ACCEL_CONFIG0_FS_SEL_t)(accel_config0_reg & ACCEL_CONFIG0_ACCEL_UI_FS_SEL_MASK); - } - - return status; -} - -int inv_imu_get_gyro_fsr(struct inv_imu_device *s, GYRO_CONFIG0_FS_SEL_t *gyro_fsr_dps) -{ - int status = 0; - uint8_t gyro_config0_reg; - - if ((s->fifo_highres_enabled) && (s->fifo_is_used == INV_IMU_FIFO_ENABLED)) - *gyro_fsr_dps = GYRO_CONFIG0_FS_SEL_MAX; - else { - status |= inv_imu_read_reg(s, GYRO_CONFIG0, 1, &gyro_config0_reg); - *gyro_fsr_dps = (GYRO_CONFIG0_FS_SEL_t)(gyro_config0_reg & GYRO_CONFIG0_GYRO_UI_FS_SEL_MASK); - } - - return status; -} - -int inv_imu_set_accel_lp_avg(struct inv_imu_device *s, ACCEL_CONFIG1_ACCEL_FILT_AVG_t acc_avg) -{ - uint8_t value; - int status = 0; - - status |= inv_imu_read_reg(s, ACCEL_CONFIG1, 1, &value); - if (status) - return status; - - value &= ~ACCEL_CONFIG1_ACCEL_UI_AVG_MASK; - value |= acc_avg; - - status |= inv_imu_write_reg(s, ACCEL_CONFIG1, 1, &value); - - return status; -} - -int inv_imu_set_accel_ln_bw(struct inv_imu_device *s, ACCEL_CONFIG1_ACCEL_FILT_BW_t acc_bw) -{ - uint8_t value; - int status = 0; - - status |= inv_imu_read_reg(s, ACCEL_CONFIG1, 1, &value); - if (status) - return status; - - value &= ~ACCEL_CONFIG1_ACCEL_UI_FILT_BW_MASK; - value |= acc_bw; - - status |= inv_imu_write_reg(s, ACCEL_CONFIG1, 1, &value); - - return status; -} - -int inv_imu_set_gyro_ln_bw(struct inv_imu_device *s, GYRO_CONFIG1_GYRO_FILT_BW_t gyr_bw) -{ - uint8_t value; - int status = 0; - - status |= inv_imu_read_reg(s, GYRO_CONFIG1, 1, &value); - if (status) - return status; - - value &= ~GYRO_CONFIG1_GYRO_UI_FILT_BW_MASK; - value |= gyr_bw; - - status |= inv_imu_write_reg(s, GYRO_CONFIG1, 1, &value); - - return status; -} - -int inv_imu_set_timestamp_resolution(struct inv_imu_device *s, const TMST_CONFIG1_RESOL_t timestamp_resol) -{ - int status = 0; - uint8_t data; - - status |= inv_imu_read_reg(s, TMST_CONFIG1_MREG1, 1, &data); - data &= ~TMST_CONFIG1_TMST_RES_MASK; - data |= timestamp_resol; - status |= inv_imu_write_reg(s, TMST_CONFIG1_MREG1, 1, &data); - - return status; -} - -int inv_imu_reset_fifo(struct inv_imu_device *s) -{ - int status = 0; - uint8_t fifo_flush_status = (uint8_t)SIGNAL_PATH_RESET_FIFO_FLUSH_EN; - - status |= inv_imu_switch_on_mclk(s); - - status |= inv_imu_write_reg(s, SIGNAL_PATH_RESET, 1, &fifo_flush_status); - inv_imu_sleep_us(10); - - /* Wait for FIFO flush (idle bit will go high at appropriate time and unlock flush) */ - while ( (status == 0) - && ((fifo_flush_status & SIGNAL_PATH_RESET_FIFO_FLUSH_MASK) - == (uint8_t)SIGNAL_PATH_RESET_FIFO_FLUSH_EN)) { - status |= inv_imu_read_reg(s, SIGNAL_PATH_RESET, 1, &fifo_flush_status); - } - - status |= inv_imu_switch_off_mclk(s); - - return status; -} - -int inv_imu_enable_high_resolution_fifo(struct inv_imu_device *s) -{ - uint8_t value; - int status = 0; - - /* set FIFO packets to 20bit format (i.e. high res is enabled) */ - s->fifo_highres_enabled = 1; - - status |= inv_imu_read_reg(s, FIFO_CONFIG5_MREG1, 1, &value); - value &= ~FIFO_CONFIG5_FIFO_HIRES_EN_MASK; - value |= FIFO_CONFIG5_HIRES_EN; - status |= inv_imu_write_reg(s, FIFO_CONFIG5_MREG1, 1, &value); - - return status; -} - -int inv_imu_disable_high_resolution_fifo(struct inv_imu_device *s) -{ - uint8_t value; - int status = 0; - - /* set FIFO packets to 16bit format (i.e. high res is disabled) */ - s->fifo_highres_enabled = 0; - - status |= inv_imu_read_reg(s, FIFO_CONFIG5_MREG1, 1, &value); - value &= ~FIFO_CONFIG5_FIFO_HIRES_EN_MASK; - value |= FIFO_CONFIG5_HIRES_DIS; - status |= inv_imu_write_reg(s, FIFO_CONFIG5_MREG1, 1, &value); - - return status; -} - -int inv_imu_configure_fifo(struct inv_imu_device *s, INV_IMU_FIFO_CONFIG_t fifo_config) -{ - int status = 0; - uint8_t data; - inv_imu_interrupt_parameter_t config_int = {(inv_imu_interrupt_value)0}; - - s->fifo_is_used = fifo_config; - - inv_imu_switch_on_mclk(s); - - switch (fifo_config) { - - case INV_IMU_FIFO_ENABLED : - /* Configure: - - FIFO record mode i.e FIFO count unit is packet - - FIFO snapshot mode i.e drop the data when the FIFO overflows - - Timestamp is logged in FIFO - - Little Endian fifo_count - */ - - status |= inv_imu_read_reg(s, INTF_CONFIG0, 1, &data); - data &= ~(INTF_CONFIG0_FIFO_COUNT_FORMAT_MASK - | INTF_CONFIG0_FIFO_COUNT_ENDIAN_MASK); - data |= (uint8_t)INTF_CONFIG0_FIFO_COUNT_REC_RECORD - | (uint8_t)INTF_CONFIG0_FIFO_COUNT_LITTLE_ENDIAN; - status |= inv_imu_write_reg(s, INTF_CONFIG0, 1, &data); - - status |= inv_imu_read_reg(s, FIFO_CONFIG1, 1, &data); - data &= ~(FIFO_CONFIG1_FIFO_MODE_MASK - | FIFO_CONFIG1_FIFO_BYPASS_MASK); - data |= (uint8_t)FIFO_CONFIG1_FIFO_MODE_SNAPSHOT - | (uint8_t)FIFO_CONFIG1_FIFO_BYPASS_OFF; - status |= inv_imu_write_reg(s, FIFO_CONFIG1, 1, &data); - - status |= inv_imu_read_reg(s, TMST_CONFIG1_MREG1, 1, &data); - data &= ~TMST_CONFIG1_TMST_EN_MASK; - data |= TMST_CONFIG1_TMST_EN; - status |= inv_imu_write_reg(s, TMST_CONFIG1_MREG1, 1, &data); - - /* restart and reset FIFO configuration */ - status |= inv_imu_read_reg(s, FIFO_CONFIG5_MREG1, 1, &data); - data &= ~(FIFO_CONFIG5_FIFO_GYRO_EN_MASK - | FIFO_CONFIG5_FIFO_ACCEL_EN_MASK - | FIFO_CONFIG5_FIFO_TMST_FSYNC_EN_MASK - | FIFO_CONFIG5_FIFO_HIRES_EN_MASK); - data |= ( (uint8_t)FIFO_CONFIG5_GYRO_EN - | (uint8_t)FIFO_CONFIG5_ACCEL_EN - | (uint8_t)FIFO_CONFIG5_TMST_FSYNC_EN - | (uint8_t)FIFO_CONFIG5_WM_GT_TH_EN); - status |= inv_imu_write_reg(s, FIFO_CONFIG5_MREG1, 1, &data); - - // Configure FIFO WM so that INT is triggered for each packet - data = 0x1; - status |= inv_imu_write_reg(s, FIFO_CONFIG2, 1, &data); - - /* Disable Data Ready Interrupt */ - status |= inv_imu_get_config_int1(s, &config_int); - config_int.INV_UI_DRDY = INV_IMU_DISABLE; - status |= inv_imu_set_config_int1(s, &config_int); - break; - - - case INV_IMU_FIFO_DISABLED : - /* make sure FIFO is disabled */ - status |= inv_imu_read_reg(s, FIFO_CONFIG1, 1, &data); - data &= ~FIFO_CONFIG1_FIFO_BYPASS_MASK; - data |= (uint8_t)FIFO_CONFIG1_FIFO_BYPASS_ON; - status |= inv_imu_write_reg(s, FIFO_CONFIG1, 1, &data); - - /* restart and reset FIFO configuration */ - status |= inv_imu_read_reg(s, FIFO_CONFIG5_MREG1, 1, &data); - data &= ~(FIFO_CONFIG5_FIFO_GYRO_EN_MASK - | FIFO_CONFIG5_FIFO_ACCEL_EN_MASK - | FIFO_CONFIG5_FIFO_TMST_FSYNC_EN_MASK); - data |= ( (uint8_t)FIFO_CONFIG5_GYRO_DIS - | (uint8_t)FIFO_CONFIG5_ACCEL_DIS - | (uint8_t)FIFO_CONFIG5_TMST_FSYNC_EN); - status |= inv_imu_write_reg(s, FIFO_CONFIG5_MREG1, 1, &data); - - /* Enable Data Ready Interrupt */ - status |= inv_imu_get_config_int1(s, &config_int); - config_int.INV_UI_DRDY = INV_IMU_ENABLE; - status |= inv_imu_set_config_int1(s, &config_int); - break; - - default : - status = -1; - } - - status |= inv_imu_switch_off_mclk(s); - - return status; -} - -int32_t inv_imu_get_fifo_timestamp_resolution_us_q24(struct inv_imu_device *s) -{ - int status = 0; - uint8_t tmst_config1_reg; - TMST_CONFIG1_RESOL_t tmst_resol; - uint32_t scale_factor_q24 = 1<<24; - - status |= inv_imu_read_reg(s, TMST_CONFIG1_MREG1, 1, &tmst_config1_reg); - if (status < 0) - return INV_ERROR; - - tmst_resol = (TMST_CONFIG1_RESOL_t)(tmst_config1_reg & TMST_CONFIG1_TMST_RES_MASK); - - if (tmst_resol == TMST_CONFIG1_RESOL_16us) - return 16 * scale_factor_q24; - else if (tmst_resol == TMST_CONFIG1_RESOL_1us) - return 1 * scale_factor_q24; - - // Should not happen, return 0 - return 0; -} - -uint32_t inv_imu_get_reg_timestamp_resolution_us_q24(struct inv_imu_device *s) -{ - return 1 << 24; -} - -const char * inv_imu_get_version(void) -{ - return INV_IMU_VERSION_STRING; -} - -/* - * Static functions definition - */ -static int configure_serial_interface(struct inv_imu_device *s) -{ - uint8_t value; - int status = 0; - - switch(s->transport.serif.serif_type) { - - case UI_I2C: - // Enable I2C 50ns spike filtering - status |= inv_imu_read_reg(s, INTF_CONFIG1, 1, &value); - value &= ~(INTF_CONFIG1_I3C_SDR_EN_MASK | INTF_CONFIG1_I3C_DDR_EN_MASK); - //value |= (0 | 0); - status |= inv_imu_write_reg(s, INTF_CONFIG1, 1, &value); - break; - - case UI_SPI4: - // Force chip in SPI4w, no read-modify-write as MISO can't be trusted - value = 1<dmp_is_on) { - // Reset SRAM to 0's - status |= inv_imu_reset_dmp(s, APEX_CONFIG0_DMP_MEM_RESET_APEX_ST_EN); - if (status) - return status; - s->dmp_is_on = 1; - } - - // Initialize DMP - status |= resume_dmp(s); - - return status; -} - -int inv_imu_reset_dmp(struct inv_imu_device *s, const APEX_CONFIG0_DMP_MEM_RESET_t sram_reset) -{ - const int ref_timeout = 5000; /*50 ms*/ - int status = 0; - int timeout = ref_timeout; - uint8_t data_dmp_reset; - uint8_t value = 0; - - status |= inv_imu_switch_on_mclk(s); - - // Reset DMP internal memories - status |= inv_imu_read_reg(s, APEX_CONFIG0, 1, &value); - value &= ~APEX_CONFIG0_DMP_MEM_RESET_EN_MASK; - value |= (sram_reset & APEX_CONFIG0_DMP_MEM_RESET_EN_MASK); - status |= inv_imu_write_reg(s, APEX_CONFIG0, 1, &value); - - inv_imu_sleep_us(1000); - - // Make sure reset procedure has finished by reading back mem_reset_en bit - do { - inv_imu_sleep_us(10); - status |= inv_imu_read_reg(s, APEX_CONFIG0, 1, &data_dmp_reset); - } while (((data_dmp_reset & APEX_CONFIG0_DMP_MEM_RESET_EN_MASK) != APEX_CONFIG0_DMP_MEM_RESET_DIS) && timeout-- && !status); - - status |= inv_imu_switch_off_mclk(s); - - if (timeout <= 0) - return INV_ERROR_TIMEOUT; - - return status; -} - -int inv_imu_set_endianness(struct inv_imu_device *s, INTF_CONFIG0_DATA_ENDIAN_t endianness) -{ - int status = 0; - uint8_t value; - - status |= inv_imu_read_reg(s, INTF_CONFIG0, 1, &value); - value &= ~INTF_CONFIG0_SENSOR_DATA_ENDIAN_MASK; - value |= (uint8_t)endianness; - status |= inv_imu_write_reg(s, INTF_CONFIG0, 1, &value); - - if (!status) - s->endianness_data = (uint8_t)endianness; - - return status; -} - -int inv_imu_get_endianness(struct inv_imu_device *s) -{ - int status = 0; - uint8_t value; - - status |= inv_imu_read_reg(s, INTF_CONFIG0, 1, &value); - if (!status) - s->endianness_data = value & INTF_CONFIG0_SENSOR_DATA_ENDIAN_MASK; - - return status; -} +/* + * ________________________________________________________________________________________________________ + * Copyright (c) 2017 InvenSense Inc. All rights reserved. + * + * This software, related documentation and any modifications thereto (collectively "Software") is subject + * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright + * and other intellectual property rights laws. + * + * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software + * and any use, reproduction, disclosure or distribution of the Software without an express license agreement + * from InvenSense is strictly prohibited. + * + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS + * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED + * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL + * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, + * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THE SOFTWARE. + * ________________________________________________________________________________________________________ + */ + +#include "inv_imu_defs.h" +#include "inv_imu_extfunc.h" +#include "inv_imu_driver.h" +#include "inv_imu_version.h" +#include "inv_imu_apex.h" + + +static int select_rcosc(struct inv_imu_device *s); +static int select_wuosc(struct inv_imu_device *s); +static int configure_serial_interface(struct inv_imu_device *s); +static int init_hardware_from_ui(struct inv_imu_device *s); +static int resume_dmp(struct inv_imu_device *s); +static int reload_otp(struct inv_imu_device *s); + +int inv_imu_init(struct inv_imu_device *s, + struct inv_imu_serif *serif, + void (*sensor_event_cb)(inv_imu_sensor_event_t *event)) +{ + int status = 0; + + memset(s, 0, sizeof(*s)); + + s->transport.serif = *serif; + + // Based on datasheet, start up time for register read/write after POR is 1ms and supply ramp time is 3ms + inv_imu_sleep_us(3000); + + if ((status |= configure_serial_interface(s)) != 0 ) + return status; + + /* register the callback to be executed each time inv_imu_get_data_from_fifo extracts + * a packet from fifo or inv_imu_get_data_from_registers read data */ + s->sensor_event_cb = sensor_event_cb; + + /* initialize hardware */ + status |= init_hardware_from_ui(s); + + /* First Gyro data wrong after enable + * Keep track of the time when enabling the Gyro and set a default value at init */ + s->gyro_start_time_us = UINT32_MAX; + /* First Accel data wrong after enable + * Keep track of the time when enabling the Accel and set a default value at init */ + s->accel_start_time_us = UINT32_MAX; + /* Gyro power-off to power-on transition can cause ring down issue + * This variable keeps track of timestamp when gyro is power off. Set to UINT32_MAX at init + */ + s->gyro_power_off_tmst = UINT32_MAX; + + return status; +} + +int inv_imu_device_reset(struct inv_imu_device *s) +{ + int status = INV_ERROR_SUCCESS; + uint8_t data; + uint8_t device_config_backup; + uint8_t intf_config1_backup; + + /* Backup registers to configure serial interface */ + status |= inv_imu_read_reg(s, DEVICE_CONFIG, 1, &device_config_backup); + status |= inv_imu_read_reg(s, INTF_CONFIG1, 1, &intf_config1_backup); + + /* Trigger soft reset (bit is automatically cleared once the reset is completed) */ + data = (uint8_t)SIGNAL_PATH_RESET_SOFT_RESET_DEVICE_CONFIG_EN; + status |= inv_imu_write_reg(s, SIGNAL_PATH_RESET, 1, &data); + + /* Check status and return if an error occured */ + if (status) + return status; + + /* Wait 1ms for soft reset to be effective */ + inv_imu_sleep_us(1000); + + /* Force SPI-4w hardware configuration (so that next read is correct) */ + if (s->transport.serif.serif_type == UI_SPI4) { + data = 1 << DEVICE_CONFIG_SPI_AP_4WIRE_POS; + status |= inv_imu_write_reg(s, DEVICE_CONFIG, 1, &data); + } + + /* Clear the reset done int */ + status |= inv_imu_read_reg(s, INT_STATUS, 1, &data); + if (data != INT_STATUS_RESET_DONE_INT_MASK) { + status |= INV_ERROR_UNEXPECTED; + return status; + } + + /* Make sure `need_mclk_cnt` is cleared (`reload_otp()` will need it)*/ + s->transport.need_mclk_cnt = 0; + /* Reload OTP procedure (See AN-000273) */ + status |= reload_otp(s); + + /* Restore registers to configure serial interface */ + status |= inv_imu_write_reg(s, DEVICE_CONFIG, 1, &device_config_backup); + status |= inv_imu_write_reg(s, INTF_CONFIG1, 1, &intf_config1_backup); + + /* Init transport layer */ + status |= inv_imu_init_transport(s); + + /* Read and set endianness for further processing */ + status |= inv_imu_get_endianness(s); + + return status; +} + +int inv_imu_get_who_am_i(struct inv_imu_device *s, uint8_t *who_am_i) +{ + return inv_imu_read_reg(s, WHO_AM_I, 1, who_am_i); +} + +static int select_rcosc(struct inv_imu_device *s) +{ + int status = 0; + uint8_t data; + + status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &data); + data &= ~PWR_MGMT0_ACCEL_LP_CLK_SEL_MASK; + data |= PWR_MGMT0_ACCEL_LP_CLK_RCOSC; + status |= inv_imu_write_reg(s, PWR_MGMT0, 1, &data); + + return status; +} + +static int select_wuosc(struct inv_imu_device *s) +{ + int status = 0; + uint8_t data; + + status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &data); + data &= ~PWR_MGMT0_ACCEL_LP_CLK_SEL_MASK; + data |= PWR_MGMT0_ACCEL_LP_CLK_WUOSC; + status |= inv_imu_write_reg(s, PWR_MGMT0, 1, &data); + + return status; + +} + +static int reload_otp(struct inv_imu_device *s) +{ + int status = INV_ERROR_SUCCESS; + uint8_t data; + + status |= inv_imu_switch_on_mclk(s); + + /* + * Set otp_copy_mode register field + */ + status |= inv_imu_read_reg(s, OTP_CONFIG_MREG1, 1, &data); + data &= ~OTP_CONFIG_OTP_COPY_MODE_MASK; + data |= OTP_CONFIG_OTP_COPY_TRIM; + status |= inv_imu_write_reg(s, OTP_CONFIG_MREG1, 1, &data); + + /* + * Set otp_power_down register field + */ + status |= inv_imu_read_reg(s, OTP_CTRL7_MREG2, 1, &data); + data &= ~OTP_CTRL7_OTP_PWR_DOWN_MASK; + data |= OTP_CTRL7_PWR_DOWN_DIS; + status |= inv_imu_write_reg(s, OTP_CTRL7_MREG2, 1, &data); + + /* + * Wait for 300us for the OTP to fully power up + */ + inv_imu_sleep_us(300); + + /* + * Set otp_reload register field + */ + status |= inv_imu_read_reg(s, OTP_CTRL7_MREG2, 1, &data); + data &= ~OTP_CTRL7_OTP_RELOAD_MASK; + data |= OTP_CTRL7_OTP_RELOAD_EN; + status |= inv_imu_write_reg(s, OTP_CTRL7_MREG2, 1, &data); + + /* + * Wait for 280 us for the OTP to load + */ + inv_imu_sleep_us(280); + + status |= inv_imu_switch_off_mclk(s); + + return status; +} + +int inv_imu_enable_accel_low_power_mode(struct inv_imu_device *s) +{ + int status = 0; + PWR_MGMT0_ACCEL_MODE_t accel_mode; + PWR_MGMT0_GYRO_MODE_t gyro_mode; + ACCEL_CONFIG0_ODR_t acc_odr_bitfield; + uint32_t accel_odr_us = 0; + uint8_t pwr_mgmt0_reg; + uint8_t accel_config0_reg; + uint8_t value; + + status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &pwr_mgmt0_reg); + accel_mode = (PWR_MGMT0_ACCEL_MODE_t)(pwr_mgmt0_reg & PWR_MGMT0_ACCEL_MODE_MASK); + gyro_mode = (PWR_MGMT0_GYRO_MODE_t)(pwr_mgmt0_reg & PWR_MGMT0_GYRO_MODE_MASK); + + /* Check if the accelerometer is the only one enabled */ + if ( (accel_mode != PWR_MGMT0_ACCEL_MODE_LP) + && ( (gyro_mode == PWR_MGMT0_GYRO_MODE_OFF) + || (gyro_mode == PWR_MGMT0_GYRO_MODE_STANDBY))) { + /* Get accelerometer's ODR for next required wait */ + status |= inv_imu_read_reg(s, ACCEL_CONFIG0, 1, &accel_config0_reg); + acc_odr_bitfield = (ACCEL_CONFIG0_ODR_t)(accel_config0_reg & ACCEL_CONFIG0_ACCEL_ODR_MASK); + accel_odr_us = inv_imu_convert_odr_bitfield_to_us(acc_odr_bitfield); + /* Select the RC OSC as clock source for the accelerometer */ + status |= select_rcosc(s); + } + + /* Enable/Switch the accelerometer in/to low power mode */ + /* Read a new time because select_rcosc() modified it */ + status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &pwr_mgmt0_reg); + pwr_mgmt0_reg &= ~PWR_MGMT0_ACCEL_MODE_MASK; + pwr_mgmt0_reg |= PWR_MGMT0_ACCEL_MODE_LP; + status |= inv_imu_write_reg(s, PWR_MGMT0, 1, &pwr_mgmt0_reg); + inv_imu_sleep_us(200); + + if ( (accel_mode != PWR_MGMT0_ACCEL_MODE_LP) + && ( (gyro_mode == PWR_MGMT0_GYRO_MODE_OFF) + || (gyro_mode == PWR_MGMT0_GYRO_MODE_STANDBY))) { + /* Wait one accelerometer ODR before switching to the WU OSC */ + if (accel_odr_us > 200) /* if ODR is smaller than 200 us, we already waited for one ODR above. */ + inv_imu_sleep_us(accel_odr_us - 200); + status |= select_wuosc(s); + } + + if (accel_mode == PWR_MGMT0_ACCEL_MODE_OFF) { + /* First data are wrong after accel enable using IIR filter + There is no signal that says accel start-up has completed and data are stable using FIR filter + So keep track of the time at start-up to discard the invalid data, about 20ms after enable + */ + if (s->fifo_is_used) + s->accel_start_time_us = inv_imu_get_time_us(); + } + + /* Enable the automatic RCOSC power on so that FIFO is entirely powered on */ + status |= inv_imu_read_reg(s, FIFO_CONFIG6_MREG1, 1, &value); + value &= ~FIFO_CONFIG6_RCOSC_REQ_ON_FIFO_THS_DIS_MASK; + status |= inv_imu_write_reg(s, FIFO_CONFIG6_MREG1, 1, &value); + + return status; +} + +int inv_imu_enable_accel_low_noise_mode(struct inv_imu_device *s) +{ + int status = 0; + PWR_MGMT0_ACCEL_MODE_t accel_mode; + PWR_MGMT0_GYRO_MODE_t gyro_mode; + ACCEL_CONFIG0_ODR_t acc_odr_bitfield; + uint32_t accel_odr_us; + uint8_t pwr_mgmt0_reg; + uint8_t accel_config0_reg; + + status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &pwr_mgmt0_reg); + accel_mode = (PWR_MGMT0_ACCEL_MODE_t)(pwr_mgmt0_reg & PWR_MGMT0_ACCEL_MODE_MASK); + gyro_mode = (PWR_MGMT0_GYRO_MODE_t)(pwr_mgmt0_reg & PWR_MGMT0_GYRO_MODE_MASK); + /* Check if the accelerometer is the only one enabled */ + if ( (accel_mode == PWR_MGMT0_ACCEL_MODE_LP) + && ( (gyro_mode == PWR_MGMT0_GYRO_MODE_OFF) + || (gyro_mode == PWR_MGMT0_GYRO_MODE_STANDBY))) { + /* Get accelerometer's ODR for next required wait */ + status |= inv_imu_read_reg(s, ACCEL_CONFIG0, 1, &accel_config0_reg); + acc_odr_bitfield = (ACCEL_CONFIG0_ODR_t)(accel_config0_reg & ACCEL_CONFIG0_ACCEL_ODR_MASK); + accel_odr_us = inv_imu_convert_odr_bitfield_to_us(acc_odr_bitfield); + /* Select the RC OSC as clock source for the accelerometer */ + status |= select_rcosc(s); + /* Wait one accel ODR before switching to low noise mode */ + inv_imu_sleep_us(accel_odr_us); + } + + /* Enable/Switch the accelerometer in/to low noise mode */ + /* Read a new time because select_rcosc() modified it */ + status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &pwr_mgmt0_reg); + pwr_mgmt0_reg &= ~PWR_MGMT0_ACCEL_MODE_MASK; + pwr_mgmt0_reg |= PWR_MGMT0_ACCEL_MODE_LN; + status |= inv_imu_write_reg(s, PWR_MGMT0, 1, &pwr_mgmt0_reg); + inv_imu_sleep_us(200); + + if (accel_mode == PWR_MGMT0_ACCEL_MODE_OFF) { + /* First data are wrong after accel enable using IIR filter + There is no signal that says accel start-up has completed and data are stable using FIR filter + So keep track of the time at start-up to discard the invalid data, about 20ms after enable + */ + if (s->fifo_is_used) + s->accel_start_time_us = inv_imu_get_time_us(); + } + + return status; +} + +int inv_imu_disable_accel(struct inv_imu_device *s) +{ + int status = 0; + int stop_fifo_usage = 0; + uint32_t accel_odr_us; + PWR_MGMT0_GYRO_MODE_t gyro_mode; + ACCEL_CONFIG0_ODR_t acc_odr_bitfield; + uint8_t pwr_mgmt0_reg; + uint8_t accel_config0_reg, fifo_cfg_6_reg; + + /* Get accelerometer's ODR for next required wait */ + status |= inv_imu_read_reg(s, ACCEL_CONFIG0, 1, &accel_config0_reg); + acc_odr_bitfield = (ACCEL_CONFIG0_ODR_t)(accel_config0_reg & ACCEL_CONFIG0_ACCEL_ODR_MASK); + accel_odr_us = inv_imu_convert_odr_bitfield_to_us(acc_odr_bitfield); + + status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &pwr_mgmt0_reg); + gyro_mode = (PWR_MGMT0_GYRO_MODE_t)(pwr_mgmt0_reg & PWR_MGMT0_GYRO_MODE_MASK); + if ((gyro_mode == PWR_MGMT0_GYRO_MODE_OFF) && s->fifo_is_used) { + /* + * Accel is off and gyro is about to be turned off. + * Flush FIFO so that there is no old data at next enable time + */ + stop_fifo_usage = 1; + } + + /* Check if accel is the last sensor enabled and bit rcosc dis is not set */ + status |= inv_imu_read_reg(s, FIFO_CONFIG6_MREG1, 1, &fifo_cfg_6_reg); + if ( (gyro_mode == PWR_MGMT0_GYRO_MODE_OFF) + && ((fifo_cfg_6_reg & FIFO_CONFIG6_RCOSC_REQ_ON_FIFO_THS_DIS_MASK) == 0)) { + /* + * Disable the automatic RCOSC power on to avoid extra power consumption + * in sleep mode (all sensors and clocks off) + */ + fifo_cfg_6_reg |= ((1 & FIFO_CONFIG6_RCOSC_REQ_ON_FIFO_THS_DIS_MASK) + << FIFO_CONFIG6_RCOSC_REQ_ON_FIFO_THS_DIS_POS); + status |= inv_imu_write_reg(s, FIFO_CONFIG6_MREG1, 1, &fifo_cfg_6_reg); + inv_imu_sleep_us(accel_odr_us); + } + + pwr_mgmt0_reg &= ~PWR_MGMT0_ACCEL_MODE_MASK; + pwr_mgmt0_reg |= PWR_MGMT0_ACCEL_MODE_OFF; + status |= inv_imu_write_reg(s, PWR_MGMT0, 1, &pwr_mgmt0_reg); + + if (stop_fifo_usage && s->fifo_is_used) { + /* Reset FIFO explicitly so there is no data left in FIFO once all sensors are off */ + status |= inv_imu_reset_fifo(s); + } + + return status; +} + +int inv_imu_enable_gyro_low_noise_mode(struct inv_imu_device *s) +{ + int status = 0; + PWR_MGMT0_ACCEL_MODE_t accel_mode; + PWR_MGMT0_GYRO_MODE_t gyro_mode; + ACCEL_CONFIG0_ODR_t acc_odr_bitfield; + uint32_t accel_odr_us; + uint8_t pwr_mgmt0_reg; + uint8_t accel_config0_reg; + uint64_t current_time; + + /* + * Powering the gyroscope on immediately after powering it off can result in device failure. + * The gyroscope proof mass can continue vibrating after it has been powered off, + * and powering it back on immediately can result in unpredictable proof mass movement. + * After powering the gyroscope off, a period of > 20 ms should be allowed + * to elapse before it is powered back on. + */ + if (s->gyro_power_off_tmst != UINT32_MAX) { + current_time = inv_imu_get_time_us(); + /* Handle rollover */ + if (current_time <= s->gyro_power_off_tmst) + current_time += UINT32_MAX; + /* If 20 ms are not elapsed since power-off error is returned */ + if ((current_time - s->gyro_power_off_tmst) <= GYR_POWER_OFF_DUR_US) + return INV_ERROR_HW; + } + + status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &pwr_mgmt0_reg); + accel_mode = (PWR_MGMT0_ACCEL_MODE_t)(pwr_mgmt0_reg & PWR_MGMT0_ACCEL_MODE_MASK); + gyro_mode = (PWR_MGMT0_GYRO_MODE_t)(pwr_mgmt0_reg & PWR_MGMT0_GYRO_MODE_MASK); + /* Check if the accelerometer is the only one enabled */ + if ( (accel_mode == PWR_MGMT0_ACCEL_MODE_LP) + && ( (gyro_mode == PWR_MGMT0_GYRO_MODE_OFF) + || (gyro_mode == PWR_MGMT0_GYRO_MODE_STANDBY))) { + /* Get accelerometer's ODR for next required wait */ + status |= inv_imu_read_reg(s, ACCEL_CONFIG0, 1, &accel_config0_reg); + acc_odr_bitfield = (ACCEL_CONFIG0_ODR_t)(accel_config0_reg & ACCEL_CONFIG0_ACCEL_ODR_MASK); + accel_odr_us = inv_imu_convert_odr_bitfield_to_us(acc_odr_bitfield); + /* Select the RC OSC as clock source for the accelerometer */ + status |= select_rcosc(s); + /* Wait one accel ODR before enabling the gyroscope */ + inv_imu_sleep_us(accel_odr_us); + } + + /* Enable/Switch the gyroscope in/to low noise mode */ + /* Read a new time because select_rcosc() modified it */ + status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &pwr_mgmt0_reg); + pwr_mgmt0_reg &= ~PWR_MGMT0_GYRO_MODE_MASK; + pwr_mgmt0_reg |= (uint8_t)PWR_MGMT0_GYRO_MODE_LN; + status |= inv_imu_write_reg(s, PWR_MGMT0, 1, &pwr_mgmt0_reg); + inv_imu_sleep_us(200); + + if (gyro_mode == PWR_MGMT0_GYRO_MODE_OFF) { + /* First data are wrong after gyro enable using IIR filter + There is no signal that says Gyro start-up has completed and data are stable using FIR filter + and the Gyro max start-up time is 40ms + So keep track of the time at start-up to discard the invalid data, about 60ms after enable + */ + if (s->fifo_is_used) + s->gyro_start_time_us = inv_imu_get_time_us(); + } + + return status; +} + +int inv_imu_disable_gyro(struct inv_imu_device *s) +{ + int status = 0; + int stop_fifo_usage = 0; + ACCEL_CONFIG0_ODR_t acc_odr_bitfield; + uint32_t accel_odr_us; + PWR_MGMT0_ACCEL_MODE_t accel_mode; + uint8_t pwr_mgmt0_reg; + uint8_t accel_config0_reg, fifo_cfg_6_reg; + + /* Get accelerometer's ODR for next required wait */ + status |= inv_imu_read_reg(s, ACCEL_CONFIG0, 1, &accel_config0_reg); + acc_odr_bitfield = (ACCEL_CONFIG0_ODR_t)(accel_config0_reg & ACCEL_CONFIG0_ACCEL_ODR_MASK); + accel_odr_us = inv_imu_convert_odr_bitfield_to_us(acc_odr_bitfield); + + status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &pwr_mgmt0_reg); + accel_mode = (PWR_MGMT0_ACCEL_MODE_t)(pwr_mgmt0_reg & PWR_MGMT0_ACCEL_MODE_MASK); + + if ((accel_mode == PWR_MGMT0_ACCEL_MODE_OFF) && s->fifo_is_used) { + /* + * Accel is off and gyro is about to be turned off. + * Flush FIFO so that there is no old data at next enable time + */ + stop_fifo_usage = 1; + } + + /* Check if the accelerometer is enabled in low power mode */ + if (accel_mode == PWR_MGMT0_ACCEL_MODE_LP) { + /* Select the RC OSC as clock source for the accelerometer */ + status |= select_rcosc(s); + } + + /* Check if gyro is the last sensor enabled and bit rcosc dis is not set */ + status |= inv_imu_read_reg(s, FIFO_CONFIG6_MREG1, 1, &fifo_cfg_6_reg); + if ( (accel_mode == PWR_MGMT0_ACCEL_MODE_OFF) + && ((fifo_cfg_6_reg & FIFO_CONFIG6_RCOSC_REQ_ON_FIFO_THS_DIS_MASK) == 0)) { + + GYRO_CONFIG0_ODR_t gyro_odr_bitfield; + uint32_t gyro_odr_us; + uint8_t gyro_config0_reg; + + /* Read gyro odr to apply it to the sleep */ + status |= inv_imu_read_reg(s, GYRO_CONFIG0, 1, &gyro_config0_reg); + gyro_odr_bitfield = (GYRO_CONFIG0_ODR_t)(gyro_config0_reg & GYRO_CONFIG0_GYRO_ODR_MASK); + gyro_odr_us = inv_imu_convert_odr_bitfield_to_us(gyro_odr_bitfield); + + /* + * Disable the automatic RCOSC power on to avoid extra power consumption + * in sleep mode (all sensors and clocks off) + */ + fifo_cfg_6_reg |= ((1 & FIFO_CONFIG6_RCOSC_REQ_ON_FIFO_THS_DIS_MASK) + << FIFO_CONFIG6_RCOSC_REQ_ON_FIFO_THS_DIS_POS); + status |= inv_imu_write_reg(s, FIFO_CONFIG6_MREG1, 1, &fifo_cfg_6_reg); + inv_imu_sleep_us(gyro_odr_us); + } + + /* Read a new time because select_rcosc() modified it */ + status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &pwr_mgmt0_reg); + pwr_mgmt0_reg &= ~PWR_MGMT0_GYRO_MODE_MASK; + pwr_mgmt0_reg |= PWR_MGMT0_GYRO_MODE_OFF; + status |= inv_imu_write_reg(s, PWR_MGMT0, 1, &pwr_mgmt0_reg); + /* keep track of gyro power-off time */ + s->gyro_power_off_tmst = inv_imu_get_time_us(); + + if (accel_mode == PWR_MGMT0_ACCEL_MODE_LP) { + /* Wait based on accelerometer ODR */ + inv_imu_sleep_us(2 * accel_odr_us); + /* Select the WU OSC as clock source for the accelerometer */ + status |= select_wuosc(s); + } + + if (stop_fifo_usage && s->fifo_is_used) { + /* Reset FIFO explicitly so there is no data left in FIFO once all sensors are off */ + status |= inv_imu_reset_fifo(s); + } + + return status; +} + +int inv_imu_enable_fsync(struct inv_imu_device *s) +{ + int status = 0; + uint8_t value; + + status |= inv_imu_switch_on_mclk(s); + + //Enable Fsync + status |= inv_imu_read_reg(s, FSYNC_CONFIG_MREG1, 1, &value); + value &= ~FSYNC_CONFIG_FSYNC_UI_SEL_MASK; + value |= (uint8_t)FSYNC_CONFIG_UI_SEL_TEMP; + status |= inv_imu_write_reg(s, FSYNC_CONFIG_MREG1, 1, &value); + + status |= inv_imu_read_reg(s, TMST_CONFIG1_MREG1, 1, &value); + value &= ~TMST_CONFIG1_TMST_FSYNC_EN_MASK; + value |= TMST_CONFIG1_TMST_FSYNC_EN; + status |= inv_imu_write_reg(s, TMST_CONFIG1_MREG1, 1, &value); + + status |= inv_imu_switch_off_mclk(s); + + return status; +} + +int inv_imu_disable_fsync(struct inv_imu_device *s) +{ + int status = 0; + uint8_t value; + + status |= inv_imu_switch_on_mclk(s); + + // Disable Fsync + status |= inv_imu_read_reg(s, FSYNC_CONFIG_MREG1, 1, &value); + value &= ~FSYNC_CONFIG_FSYNC_UI_SEL_MASK; + value |= (uint8_t)FSYNC_CONFIG_UI_SEL_NO; + status |= inv_imu_write_reg(s, FSYNC_CONFIG_MREG1, 1, &value); + + status |= inv_imu_read_reg(s, TMST_CONFIG1_MREG1, 1, &value); + value &= ~TMST_CONFIG1_TMST_FSYNC_EN_MASK; + value |= TMST_CONFIG1_TMST_FSYNC_DIS; + status |= inv_imu_write_reg(s, TMST_CONFIG1_MREG1, 1, &value); + + status |= inv_imu_switch_off_mclk(s); + + return status; +} + +int inv_imu_configure_wom(struct inv_imu_device *s, + const uint8_t wom_x_th, + const uint8_t wom_y_th, + const uint8_t wom_z_th, + WOM_CONFIG_WOM_INT_MODE_t wom_int, + WOM_CONFIG_WOM_INT_DUR_t wom_dur) +{ + int status = 0; + uint8_t data[3]; + uint8_t value; + + data[0] = wom_x_th; // Set X threshold + data[1] = wom_y_th; // Set Y threshold + data[2] = wom_z_th; // Set Z threshold + status |= inv_imu_write_reg(s, ACCEL_WOM_X_THR_MREG1, sizeof(data), &data[0]); + + // Compare current sample with the previous sample and WOM from the 3 axis are ORed or ANDed to produce WOM signal. + status |= inv_imu_read_reg(s, WOM_CONFIG, 1, &value); + value &= ~WOM_CONFIG_WOM_INT_MODE_MASK; + value |= (uint8_t)WOM_CONFIG_WOM_MODE_CMP_PREV | (uint8_t)wom_int; + + // Configure the number of overthreshold event to wait before producing the WOM signal. + value &= ~WOM_CONFIG_WOM_INT_DUR_MASK; + value |= (uint8_t)wom_dur; + status |= inv_imu_write_reg(s, WOM_CONFIG, 1, &value); + + return status; +} + +int inv_imu_enable_wom(struct inv_imu_device *s) +{ + int status = 0; + uint8_t value; + inv_imu_interrupt_parameter_t config_int = {(inv_imu_interrupt_value)0}; + + /* Disable fifo threshold int1 */ + status |= inv_imu_get_config_int1(s, &config_int); + config_int.INV_FIFO_THS = INV_IMU_DISABLE; + status |= inv_imu_set_config_int1(s, &config_int); + + /* Enable WOM */ + status |= inv_imu_read_reg(s, WOM_CONFIG, 1, &value); + value &= ~WOM_CONFIG_WOM_EN_MASK; + value |= (uint8_t)WOM_CONFIG_WOM_EN_ENABLE; + status |= inv_imu_write_reg(s, WOM_CONFIG, 1, &value); + + + return status; +} + +int inv_imu_disable_wom(struct inv_imu_device *s) +{ + int status = 0; + uint8_t value; + inv_imu_interrupt_parameter_t config_int = {(inv_imu_interrupt_value)0}; + + /* Disable WOM */ + status |= inv_imu_read_reg(s, WOM_CONFIG, 1, &value); + value &= ~WOM_CONFIG_WOM_EN_MASK; + value |= WOM_CONFIG_WOM_EN_DISABLE; + status |= inv_imu_write_reg(s, WOM_CONFIG, 1, &value); + + /* Enable fifo threshold int1 */ + status |= inv_imu_get_config_int1(s, &config_int); + config_int.INV_FIFO_THS = INV_IMU_ENABLE; + status |= inv_imu_set_config_int1(s, &config_int); + + return status; +} + +int inv_imu_get_config_int1(struct inv_imu_device *s, inv_imu_interrupt_parameter_t *it) +{ + int status = 0; + uint8_t data; + + status |= inv_imu_read_reg(s, INT_SOURCE0, 1, &data); + it->INV_UI_FSYNC = (inv_imu_interrupt_value)((data & INT_SOURCE0_FSYNC_INT1_EN_MASK) >> INT_SOURCE0_FSYNC_INT1_EN_POS); + it->INV_UI_DRDY = (inv_imu_interrupt_value)((data & INT_SOURCE0_DRDY_INT1_EN_MASK) >> INT_SOURCE0_DRDY_INT1_EN_POS); + it->INV_FIFO_THS = (inv_imu_interrupt_value)((data & INT_SOURCE0_FIFO_THS_INT1_EN_MASK) >> INT_SOURCE0_FIFO_THS_INT1_EN_POS); + it->INV_FIFO_FULL = (inv_imu_interrupt_value)((data & INT_SOURCE0_FIFO_FULL_INT1_EN_MASK) >> INT_SOURCE0_FIFO_FULL_INT1_EN_POS); + + status |= inv_imu_read_reg(s, INT_SOURCE1, 1, &data); + it->INV_SMD = (inv_imu_interrupt_value)((data & INT_SOURCE1_SMD_INT1_EN_MASK) >> INT_SOURCE1_SMD_INT1_EN_POS); + it->INV_WOM_X = (inv_imu_interrupt_value)((data & INT_SOURCE1_WOM_X_INT1_EN_MASK) >> INT_SOURCE1_WOM_X_INT1_EN_POS); + it->INV_WOM_Y = (inv_imu_interrupt_value)((data & INT_SOURCE1_WOM_Y_INT1_EN_MASK) >> INT_SOURCE1_WOM_Y_INT1_EN_POS); + it->INV_WOM_Z = (inv_imu_interrupt_value)((data & INT_SOURCE1_WOM_Z_INT1_EN_MASK) >> INT_SOURCE1_WOM_Z_INT1_EN_POS); + + status |= inv_imu_read_reg(s, INT_SOURCE6_MREG1, 1, &data); + it->INV_FF = (inv_imu_interrupt_value)((data & INT_SOURCE6_FF_INT1_EN_MASK) >> INT_SOURCE6_FF_INT1_EN_POS); + it->INV_LOWG = (inv_imu_interrupt_value)((data & INT_SOURCE6_LOWG_INT1_EN_MASK) >> INT_SOURCE6_LOWG_INT1_EN_POS); + it->INV_STEP_DET = (inv_imu_interrupt_value)((data & INT_SOURCE6_STEP_DET_INT1_EN_MASK) >> INT_SOURCE6_STEP_DET_INT1_EN_POS); + it->INV_STEP_CNT_OVFL = (inv_imu_interrupt_value)((data & INT_SOURCE6_STEP_CNT_OFL_INT1_EN_MASK) >> INT_SOURCE6_STEP_CNT_OFL_INT1_EN_POS); + it->INV_TILT_DET = (inv_imu_interrupt_value)((data & INT_SOURCE6_TILT_DET_INT1_EN_MASK) >> INT_SOURCE6_TILT_DET_INT1_EN_POS); + + return status; +} + +int inv_imu_get_config_int2(struct inv_imu_device *s, inv_imu_interrupt_parameter_t *it) +{ + int status = 0; + uint8_t data; + + status |= inv_imu_read_reg(s, INT_SOURCE3, 1, &data); + it->INV_UI_FSYNC = (inv_imu_interrupt_value)((data & INT_SOURCE3_FSYNC_INT2_EN_MASK) >> INT_SOURCE3_FSYNC_INT2_EN_POS); + it->INV_UI_DRDY = (inv_imu_interrupt_value)((data & INT_SOURCE3_DRDY_INT2_EN_MASK) >> INT_SOURCE3_DRDY_INT2_EN_POS); + it->INV_FIFO_THS = (inv_imu_interrupt_value)((data & INT_SOURCE3_FIFO_THS_INT2_EN_MASK) >> INT_SOURCE3_FIFO_THS_INT2_EN_POS); + it->INV_FIFO_FULL = (inv_imu_interrupt_value)((data & INT_SOURCE3_FIFO_FULL_INT2_EN_MASK) >> INT_SOURCE3_FIFO_FULL_INT2_EN_POS); + + status |= inv_imu_read_reg(s, INT_SOURCE4, 1, &data); + it->INV_SMD = (inv_imu_interrupt_value)((data & INT_SOURCE4_SMD_INT2_EN_MASK) >> INT_SOURCE4_SMD_INT2_EN_POS); + it->INV_WOM_X = (inv_imu_interrupt_value)((data & INT_SOURCE4_WOM_X_INT2_EN_MASK) >> INT_SOURCE4_WOM_X_INT2_EN_POS); + it->INV_WOM_Y = (inv_imu_interrupt_value)((data & INT_SOURCE4_WOM_Y_INT2_EN_MASK) >> INT_SOURCE4_WOM_Y_INT2_EN_POS); + it->INV_WOM_Z = (inv_imu_interrupt_value)((data & INT_SOURCE4_WOM_Z_INT2_EN_MASK) >> INT_SOURCE4_WOM_Z_INT2_EN_POS); + + status |= inv_imu_read_reg(s, INT_SOURCE7_MREG1, 1, &data); + it->INV_FF = (inv_imu_interrupt_value)((data & INT_SOURCE7_FF_INT2_EN_MASK) >> INT_SOURCE7_FF_INT2_EN_POS); + it->INV_LOWG = (inv_imu_interrupt_value)((data & INT_SOURCE7_LOWG_INT2_EN_MASK) >> INT_SOURCE7_LOWG_INT2_EN_POS); + it->INV_STEP_DET = (inv_imu_interrupt_value)((data & INT_SOURCE7_STEP_DET_INT2_EN_MASK) >> INT_SOURCE7_STEP_DET_INT2_EN_POS); + it->INV_STEP_CNT_OVFL = (inv_imu_interrupt_value)((data & INT_SOURCE7_STEP_CNT_OFL_INT2_EN_MASK) >> INT_SOURCE7_STEP_CNT_OFL_INT2_EN_POS); + it->INV_TILT_DET = (inv_imu_interrupt_value)((data & INT_SOURCE7_TILT_DET_INT2_EN_MASK) >> INT_SOURCE7_TILT_DET_INT2_EN_POS); + + return status; +} + +int inv_imu_set_config_int1(struct inv_imu_device *s, inv_imu_interrupt_parameter_t *it) +{ + int status = 0; + uint8_t data[2]; + + status |= inv_imu_read_reg(s, INT_SOURCE0, 2, &data[0]); + + data[0] &= ~(INT_SOURCE0_FSYNC_INT1_EN_MASK + | INT_SOURCE0_DRDY_INT1_EN_MASK + | INT_SOURCE0_FIFO_THS_INT1_EN_MASK + | INT_SOURCE0_FIFO_FULL_INT1_EN_MASK); + data[0] |= ((it->INV_UI_FSYNC != 0) << INT_SOURCE0_FSYNC_INT1_EN_POS); + data[0] |= ((it->INV_UI_DRDY != 0) << INT_SOURCE0_DRDY_INT1_EN_POS); + data[0] |= ((it->INV_FIFO_THS != 0) << INT_SOURCE0_FIFO_THS_INT1_EN_POS); + data[0] |= ((it->INV_FIFO_FULL != 0) << INT_SOURCE0_FIFO_FULL_INT1_EN_POS); + + data[1] &= ~(INT_SOURCE1_SMD_INT1_EN_MASK + | INT_SOURCE1_WOM_X_INT1_EN_MASK + | INT_SOURCE1_WOM_Y_INT1_EN_MASK + | INT_SOURCE1_WOM_Z_INT1_EN_MASK); + data[1] |= ((it->INV_SMD != 0) << INT_SOURCE1_SMD_INT1_EN_POS); + data[1] |= ((it->INV_WOM_X != 0) << INT_SOURCE1_WOM_X_INT1_EN_POS); + data[1] |= ((it->INV_WOM_Y != 0) << INT_SOURCE1_WOM_Y_INT1_EN_POS); + data[1] |= ((it->INV_WOM_Z != 0) << INT_SOURCE1_WOM_Z_INT1_EN_POS); + + status |= inv_imu_write_reg(s, INT_SOURCE0, 2, &data[0]); + + status |= inv_imu_read_reg(s, INT_SOURCE6_MREG1, 1, &data[0]); + + data[0] &= ~(INT_SOURCE6_FF_INT1_EN_MASK + | INT_SOURCE6_LOWG_INT1_EN_MASK + | INT_SOURCE6_STEP_DET_INT1_EN_MASK + | INT_SOURCE6_STEP_CNT_OFL_INT1_EN_MASK + | INT_SOURCE6_TILT_DET_INT1_EN_MASK); + data[0] |= ((it->INV_FF != 0) << INT_SOURCE6_FF_INT1_EN_POS); + data[0] |= ((it->INV_LOWG != 0) << INT_SOURCE6_LOWG_INT1_EN_POS); + data[0] |= ((it->INV_STEP_DET != 0) << INT_SOURCE6_STEP_DET_INT1_EN_POS); + data[0] |= ((it->INV_STEP_CNT_OVFL != 0) << INT_SOURCE6_STEP_CNT_OFL_INT1_EN_POS); + data[0] |= ((it->INV_TILT_DET != 0) << INT_SOURCE6_TILT_DET_INT1_EN_POS); + status |= inv_imu_write_reg(s, INT_SOURCE6_MREG1, 1, &data[0]); + + return status; +} + +int inv_imu_set_config_int2(struct inv_imu_device *s, inv_imu_interrupt_parameter_t *it) +{ + int status = 0; + uint8_t data[2]; + + status |= inv_imu_read_reg(s, INT_SOURCE3, 2, &data[0]); + + data[0] &= ~(INT_SOURCE3_FSYNC_INT2_EN_MASK + | INT_SOURCE3_DRDY_INT2_EN_MASK + | INT_SOURCE3_FIFO_THS_INT2_EN_MASK + | INT_SOURCE3_FIFO_FULL_INT2_EN_MASK); + data[0] |= ((it->INV_UI_FSYNC != 0) << INT_SOURCE3_FSYNC_INT2_EN_POS); + data[0] |= ((it->INV_UI_DRDY != 0) << INT_SOURCE3_DRDY_INT2_EN_POS); + data[0] |= ((it->INV_FIFO_THS != 0) << INT_SOURCE3_FIFO_THS_INT2_EN_POS); + data[0] |= ((it->INV_FIFO_FULL != 0) << INT_SOURCE3_FIFO_FULL_INT2_EN_POS); + + data[1] &= ~(INT_SOURCE4_SMD_INT2_EN_MASK + | INT_SOURCE4_WOM_X_INT2_EN_MASK + | INT_SOURCE4_WOM_Y_INT2_EN_MASK + | INT_SOURCE4_WOM_Z_INT2_EN_MASK); + data[1] |= ((it->INV_SMD != 0) << INT_SOURCE4_SMD_INT2_EN_POS); + data[1] |= ((it->INV_WOM_X != 0) << INT_SOURCE4_WOM_X_INT2_EN_POS); + data[1] |= ((it->INV_WOM_Y != 0) << INT_SOURCE4_WOM_Y_INT2_EN_POS); + data[1] |= ((it->INV_WOM_Z != 0) << INT_SOURCE4_WOM_Z_INT2_EN_POS); + + status |= inv_imu_write_reg(s, INT_SOURCE3, 2, &data[0]); + + status |= inv_imu_read_reg(s, INT_SOURCE7_MREG1, 1, &data[0]); + + data[0] &= ~(INT_SOURCE7_FF_INT2_EN_MASK + | INT_SOURCE7_LOWG_INT2_EN_MASK + | INT_SOURCE7_STEP_DET_INT2_EN_MASK + | INT_SOURCE7_STEP_CNT_OFL_INT2_EN_MASK + | INT_SOURCE7_TILT_DET_INT2_EN_MASK); + data[0] |= ((it->INV_FF != 0) << INT_SOURCE7_FF_INT2_EN_POS); + data[0] |= ((it->INV_LOWG != 0) << INT_SOURCE7_LOWG_INT2_EN_POS); + data[0] |= ((it->INV_STEP_DET != 0) << INT_SOURCE7_STEP_DET_INT2_EN_POS); + data[0] |= ((it->INV_STEP_CNT_OVFL != 0) << INT_SOURCE7_STEP_CNT_OFL_INT2_EN_POS); + data[0] |= ((it->INV_TILT_DET != 0) << INT_SOURCE7_TILT_DET_INT2_EN_POS); + + status |= inv_imu_write_reg(s, INT_SOURCE7_MREG1, 1, &data[0]); + + return status; +} + +int inv_imu_get_data_from_registers(struct inv_imu_device *s) +{ + int status = 0; + uint8_t int_status; + uint8_t temperature[2]; + uint8_t accel[ACCEL_DATA_SIZE]; + uint8_t gyro[GYRO_DATA_SIZE]; + inv_imu_sensor_event_t event; + + /* Ensure data ready status bit is set */ + if ((status |= inv_imu_read_reg(s, INT_STATUS_DRDY, 1, &int_status))) + return status; + + if (int_status & INT_STATUS_DRDY_DATA_RDY_INT_MASK) { + + status |= inv_imu_read_reg(s, TEMP_DATA1, 2, &temperature[0]); + + if (s->endianness_data == INTF_CONFIG0_DATA_BIG_ENDIAN) { + event.temperature = (((int16_t)temperature[0]) << 8) | temperature[1]; + } else { + event.temperature = (((int16_t)temperature[1]) << 8) | temperature[0]; + } + + status |= inv_imu_read_reg(s, ACCEL_DATA_X1, ACCEL_DATA_SIZE, &accel[0]); + + if (s->endianness_data == INTF_CONFIG0_DATA_BIG_ENDIAN) { + event.accel[0] = (accel[0] << 8) | accel[1]; + event.accel[1] = (accel[2] << 8) | accel[3]; + event.accel[2] = (accel[4] << 8) | accel[5]; + } else { + event.accel[0] = (accel[1] << 8) | accel[0]; + event.accel[1] = (accel[3] << 8) | accel[2]; + event.accel[2] = (accel[5] << 8) | accel[4]; + } + + status |= inv_imu_read_reg(s, GYRO_DATA_X1, GYRO_DATA_SIZE, &gyro[0]); + + if (s->endianness_data == INTF_CONFIG0_DATA_BIG_ENDIAN) { + event.gyro[0] = (gyro[0] << 8) | gyro[1]; + event.gyro[1] = (gyro[2] << 8) | gyro[3]; + event.gyro[2] = (gyro[4] << 8) | gyro[5]; + } else { + event.gyro[0] = (gyro[1] << 8) | gyro[0]; + event.gyro[1] = (gyro[3] << 8) | gyro[2]; + event.gyro[2] = (gyro[5] << 8) | gyro[4]; + } + + /* call sensor event callback */ + if (s->sensor_event_cb) + s->sensor_event_cb(&event); + } + /*else: Data Ready was not reached*/ + + return status; +} + +int inv_imu_get_data_from_fifo(struct inv_imu_device *s) +{ + int status = 0; + uint8_t int_status; + uint16_t packet_count_i, packet_count, total_packet_count = 0; + uint16_t packet_size = FIFO_HEADER_SIZE + + FIFO_ACCEL_DATA_SIZE + + FIFO_GYRO_DATA_SIZE + + FIFO_TEMP_DATA_SIZE + + FIFO_TS_FSYNC_SIZE; + fifo_header_t *header; + + /* Ensure data ready status bit is set */ + if ((status |= inv_imu_read_reg(s, INT_STATUS, 1, &int_status))) + return status; + + if ( (int_status & INT_STATUS_FIFO_THS_INT_MASK) + || (int_status & INT_STATUS_FIFO_FULL_INT_MASK)) { + uint8_t data[2]; + + /* + * Force the idle bit to disable + * The chip expects no delay between reading the FIFO count and reading FIFO data. + * If the program is interrupted for more than 1ms, the chip will switch the clock, + * and we won't guarantee the proper functioning of the "read fifo" operation. + */ + status |= inv_imu_switch_on_mclk(s); + + /* FIFO record mode configured at driver init, so we read packet number, not byte count */ + if ((status |= inv_imu_read_reg(s, FIFO_COUNTH, 2, &data[0])) != INV_ERROR_SUCCESS){ + status |= inv_imu_switch_off_mclk(s); + return status; + } + + total_packet_count = (uint16_t)(data[0] | (data[1] << 8)); + packet_count = total_packet_count; + while (packet_count > 0) { + uint16_t invalid_frame_cnt = 0; + /* Read FIFO only when data is expected in FIFO */ + /* fifo_idx type variable must be large enough to parse the FIFO_MIRRORING_SIZE */ + uint16_t fifo_idx = 0; + + if (s->fifo_highres_enabled) + packet_size = FIFO_20BYTES_PACKET_SIZE; + + if ((status |= inv_imu_read_reg(s, FIFO_DATA, packet_size *packet_count, s->fifo_data))) { + /* + * Sensor data is in FIFO according to FIFO_COUNT but failed to read FIFO, + * reset FIFO and try next chance + */ + status |= inv_imu_reset_fifo(s); + status |= inv_imu_switch_off_mclk(s); + return status; + } + + for (packet_count_i = 0; packet_count_i < packet_count; packet_count_i++) { + inv_imu_sensor_event_t event; + event.sensor_mask = 0; + header = (fifo_header_t *) &s->fifo_data[fifo_idx]; + fifo_idx += FIFO_HEADER_SIZE; + + /* Decode invalid frame, this typically happens if packet_count is greater + than 2 in case of WOM event since FIFO_THS IRQ is disabled if WOM is enabled, + and we wake up only upon a WOM event so we can have more than 1 ACC packet in FIFO + and we do not wait the oscillator wake-up time so we will receive 1 invalid packet, + which we will read again upon next FIFO read operation thanks to while() loop*/ + if (header->Byte == 0x80) { + uint8_t is_invalid_frame = 1; + /* Check N-FIFO_HEADER_SIZE remaining bytes are all 0 to be invalid frame */ + for (uint8_t i = 0 ; i < (packet_size - FIFO_HEADER_SIZE); i++) { + if (s->fifo_data[fifo_idx + i]) { + is_invalid_frame = 0; + break; + } + } + /* In case of invalid frame read FIFO will be retried for this packet */ + invalid_frame_cnt += is_invalid_frame; + } else { + /* Decode packet */ + if (header->bits.msg_bit) { + /* MSG BIT set in FIFO header, Resetting FIFO */ + status |= inv_imu_reset_fifo(s); + status |= inv_imu_switch_off_mclk(s); + return INV_ERROR; + } + + if (header->bits.accel_bit) { + if (s->endianness_data == INTF_CONFIG0_DATA_BIG_ENDIAN) { + event.accel[0] = (s->fifo_data[0 + fifo_idx] << 8) | s->fifo_data[1 + fifo_idx]; + event.accel[1] = (s->fifo_data[2 + fifo_idx] << 8) | s->fifo_data[3 + fifo_idx]; + event.accel[2] = (s->fifo_data[4 + fifo_idx] << 8) | s->fifo_data[5 + fifo_idx]; + } else { + event.accel[0] = (s->fifo_data[1 + fifo_idx] << 8) | s->fifo_data[0 + fifo_idx]; + event.accel[1] = (s->fifo_data[3 + fifo_idx] << 8) | s->fifo_data[2 + fifo_idx]; + event.accel[2] = (s->fifo_data[5 + fifo_idx] << 8) | s->fifo_data[4 + fifo_idx]; + } + fifo_idx += FIFO_ACCEL_DATA_SIZE; + } + + if (header->bits.gyro_bit) { + if (s->endianness_data == INTF_CONFIG0_DATA_BIG_ENDIAN) { + event.gyro[0] = (s->fifo_data[0 + fifo_idx] << 8) | s->fifo_data[1 + fifo_idx]; + event.gyro[1] = (s->fifo_data[2 + fifo_idx] << 8) | s->fifo_data[3 + fifo_idx]; + event.gyro[2] = (s->fifo_data[4 + fifo_idx] << 8) | s->fifo_data[5 + fifo_idx]; + } else { + event.gyro[0] = (s->fifo_data[1 + fifo_idx] << 8) | s->fifo_data[0 + fifo_idx]; + event.gyro[1] = (s->fifo_data[3 + fifo_idx] << 8) | s->fifo_data[2 + fifo_idx]; + event.gyro[2] = (s->fifo_data[5 + fifo_idx] << 8) | s->fifo_data[4 + fifo_idx]; + } + fifo_idx += FIFO_GYRO_DATA_SIZE; + } + + if ((header->bits.accel_bit) || (header->bits.gyro_bit)) { + /* + * The coarse temperature (8 or 16B FIFO packet format) + * range is ± 64 degrees with 0.5°C resolution. + * but the fine temperature range (2 bytes) (20B FIFO packet format) is + * ± 256 degrees with (1/128)°C resolution + */ + if (header->bits.twentybits_bit) { + if (s->endianness_data == INTF_CONFIG0_DATA_BIG_ENDIAN) { + event.temperature = (((int16_t)s->fifo_data[0 + fifo_idx]) << 8) + | s->fifo_data[1 + fifo_idx]; + } else { + event.temperature = (((int16_t)s->fifo_data[1 + fifo_idx]) << 8) + | s->fifo_data[0 + fifo_idx]; + } + fifo_idx += FIFO_TEMP_DATA_SIZE + FIFO_TEMP_HIGH_RES_SIZE; + + /* new temperature data */ + if (event.temperature != INVALID_VALUE_FIFO) + event.sensor_mask |= (1 << INV_SENSOR_TEMPERATURE); + } else { + /* cast to int8_t since FIFO is in 16 bits mode (temperature on 8 bits) */ + event.temperature = (int8_t)s->fifo_data[0 + fifo_idx]; + fifo_idx += FIFO_TEMP_DATA_SIZE; + + /* new temperature data */ + if (event.temperature != INVALID_VALUE_FIFO_1B) + event.sensor_mask |= (1 << INV_SENSOR_TEMPERATURE); + } + } + + if ((header->bits.timestamp_bit) || (header->bits.fsync_bit)) { + if (s->endianness_data == INTF_CONFIG0_DATA_BIG_ENDIAN) + event.timestamp_fsync = (s->fifo_data[0 + fifo_idx] << 8) | s->fifo_data[1 + fifo_idx]; + else + event.timestamp_fsync = (s->fifo_data[1 + fifo_idx] << 8) | s->fifo_data[0 + fifo_idx]; + fifo_idx += FIFO_TS_FSYNC_SIZE; + /* new fsync event */ + if (header->bits.fsync_bit) + event.sensor_mask |= (1 << INV_SENSOR_FSYNC_EVENT); + } + + if (header->bits.accel_bit) { + if ( (event.accel[0] != INVALID_VALUE_FIFO) + && (event.accel[1] != INVALID_VALUE_FIFO) + && (event.accel[2] != INVALID_VALUE_FIFO)) { + if (s->accel_start_time_us == UINT32_MAX) { + event.sensor_mask |= (1 << INV_SENSOR_ACCEL); + } else { + if (!header->bits.fsync_bit) { + /* Discard first data after startup to let output to settle */ + if ((inv_imu_get_time_us() - s->accel_start_time_us) >= ACC_STARTUP_TIME_US) { + s->accel_start_time_us = UINT32_MAX; + event.sensor_mask |= (1 << INV_SENSOR_ACCEL); + } + } + } + + if ((event.sensor_mask & (1 << INV_SENSOR_ACCEL)) && (header->bits.twentybits_bit)) { + event.accel_high_res[0] = (s->fifo_data[0 + fifo_idx] >> 4) & 0xF; + event.accel_high_res[1] = (s->fifo_data[1 + fifo_idx] >> 4) & 0xF; + event.accel_high_res[2] = (s->fifo_data[2 + fifo_idx] >> 4) & 0xF; + } + } + } + + if (header->bits.gyro_bit) { + if ( (event.gyro[0] != INVALID_VALUE_FIFO) + && (event.gyro[1] != INVALID_VALUE_FIFO) + && (event.gyro[2] != INVALID_VALUE_FIFO)) { + if (s->gyro_start_time_us == UINT32_MAX) { + event.sensor_mask |= (1 << INV_SENSOR_GYRO); + } else { + if (!header->bits.fsync_bit) { + /* Discard first data after startup to let output to settle */ + if ((inv_imu_get_time_us() - s->gyro_start_time_us) >= GYR_STARTUP_TIME_US) { + s->gyro_start_time_us = UINT32_MAX; + event.sensor_mask |= (1 << INV_SENSOR_GYRO); + } + } + } + + if ((event.sensor_mask & (1 << INV_SENSOR_GYRO)) && (header->bits.twentybits_bit)) { + event.gyro_high_res[0] = (s->fifo_data[0 + fifo_idx]) & 0xF; + event.gyro_high_res[1] = (s->fifo_data[1 + fifo_idx]) & 0xF; + event.gyro_high_res[2] = (s->fifo_data[2 + fifo_idx]) & 0xF; + } + } + } + + if (header->bits.twentybits_bit) + fifo_idx += FIFO_ACCEL_GYRO_HIGH_RES_SIZE; + + /* call sensor event callback */ + if (s->sensor_event_cb) + s->sensor_event_cb(&event); + + } /* end of else invalid frame */ + } /* end of FIFO read for loop */ + packet_count = invalid_frame_cnt; + } /*end of while: packet_count > 0*/ + + status |= inv_imu_switch_off_mclk(s); + + } /*else: FIFO threshold was not reached and FIFO was not full*/ + + return total_packet_count; +} + +uint32_t inv_imu_convert_odr_bitfield_to_us(uint32_t odr_bitfield) +{ + /* + odr bitfield - frequency : odr ms + 0 - N/A + 1 - N/A + 2 - N/A + 3 - N/A + 4 - N/A + 5 - 1.6k : 0.625ms + (default) 6 - 800 : 1.25ms + 7 - 400 : 2.5 ms + 8 - 200 : 5 ms + 9 - 100 : 10 ms + 10 - 50 : 20 ms + 11 - 25 : 40 ms + 12 - 12.5 : 80 ms + 13 - 6.25 : 160 ms + 14 - 3.125 : 320 ms + 15 - 1.5625 : 640 ms + */ + + switch(odr_bitfield ) { + case ACCEL_CONFIG0_ODR_1600_HZ: return 625; + case ACCEL_CONFIG0_ODR_800_HZ: return 1250; + case ACCEL_CONFIG0_ODR_400_HZ: return 2500; + case ACCEL_CONFIG0_ODR_200_HZ: return 5000; + case ACCEL_CONFIG0_ODR_100_HZ: return 10000; + case ACCEL_CONFIG0_ODR_50_HZ: return 20000; + case ACCEL_CONFIG0_ODR_25_HZ: return 40000; + case ACCEL_CONFIG0_ODR_12_5_HZ: return 80000; + case ACCEL_CONFIG0_ODR_6_25_HZ: return 160000; + case ACCEL_CONFIG0_ODR_3_125_HZ: return 320000; + case ACCEL_CONFIG0_ODR_1_5625_HZ: + default: return 640000; + } +} + +int inv_imu_set_accel_frequency(struct inv_imu_device *s, const ACCEL_CONFIG0_ODR_t frequency) +{ + int status = 0; + uint8_t data; + + status |= inv_imu_read_reg(s, ACCEL_CONFIG0, 1, &data); + data &= ~ACCEL_CONFIG0_ACCEL_ODR_MASK; + data |= frequency; + status |= inv_imu_write_reg(s, ACCEL_CONFIG0, 1, &data); + + return status; +} + +int inv_imu_set_gyro_frequency(struct inv_imu_device *s, const GYRO_CONFIG0_ODR_t frequency) +{ + int status = 0; + uint8_t data; + + status |= inv_imu_read_reg(s, GYRO_CONFIG0, 1, &data); + data &= ~GYRO_CONFIG0_GYRO_ODR_MASK; + data |= frequency; + status |= inv_imu_write_reg(s, GYRO_CONFIG0, 1, &data); + + return status; +} + +int inv_imu_set_accel_fsr(struct inv_imu_device *s, ACCEL_CONFIG0_FS_SEL_t accel_fsr_g) +{ + int status = 0; + uint8_t data; + + status |= inv_imu_read_reg(s, ACCEL_CONFIG0, 1, &data); + data &= ~ACCEL_CONFIG0_ACCEL_UI_FS_SEL_MASK; + data |= accel_fsr_g; + status |= inv_imu_write_reg(s, ACCEL_CONFIG0, 1, &data); + + return status; +} + +int inv_imu_set_gyro_fsr(struct inv_imu_device *s, GYRO_CONFIG0_FS_SEL_t gyro_fsr_dps) +{ + int status = 0; + uint8_t data; + + status |= inv_imu_read_reg(s, GYRO_CONFIG0, 1, &data); + data &= ~GYRO_CONFIG0_GYRO_UI_FS_SEL_MASK; + data |= gyro_fsr_dps; + status |= inv_imu_write_reg(s, GYRO_CONFIG0, 1, &data); + + return status; +} + +int inv_imu_get_accel_fsr(struct inv_imu_device *s, ACCEL_CONFIG0_FS_SEL_t *accel_fsr_g) +{ + int status = 0; + uint8_t accel_config0_reg; + + if ((s->fifo_highres_enabled) && (s->fifo_is_used == INV_IMU_FIFO_ENABLED)) + *accel_fsr_g = ACCEL_CONFIG0_FS_SEL_MAX; + else { + status |= inv_imu_read_reg(s, ACCEL_CONFIG0, 1, &accel_config0_reg); + *accel_fsr_g = (ACCEL_CONFIG0_FS_SEL_t)(accel_config0_reg & ACCEL_CONFIG0_ACCEL_UI_FS_SEL_MASK); + } + + return status; +} + +int inv_imu_get_gyro_fsr(struct inv_imu_device *s, GYRO_CONFIG0_FS_SEL_t *gyro_fsr_dps) +{ + int status = 0; + uint8_t gyro_config0_reg; + + if ((s->fifo_highres_enabled) && (s->fifo_is_used == INV_IMU_FIFO_ENABLED)) + *gyro_fsr_dps = GYRO_CONFIG0_FS_SEL_MAX; + else { + status |= inv_imu_read_reg(s, GYRO_CONFIG0, 1, &gyro_config0_reg); + *gyro_fsr_dps = (GYRO_CONFIG0_FS_SEL_t)(gyro_config0_reg & GYRO_CONFIG0_GYRO_UI_FS_SEL_MASK); + } + + return status; +} + +int inv_imu_set_accel_lp_avg(struct inv_imu_device *s, ACCEL_CONFIG1_ACCEL_FILT_AVG_t acc_avg) +{ + uint8_t value; + int status = 0; + + status |= inv_imu_read_reg(s, ACCEL_CONFIG1, 1, &value); + if (status) + return status; + + value &= ~ACCEL_CONFIG1_ACCEL_UI_AVG_MASK; + value |= acc_avg; + + status |= inv_imu_write_reg(s, ACCEL_CONFIG1, 1, &value); + + return status; +} + +int inv_imu_set_accel_ln_bw(struct inv_imu_device *s, ACCEL_CONFIG1_ACCEL_FILT_BW_t acc_bw) +{ + uint8_t value; + int status = 0; + + status |= inv_imu_read_reg(s, ACCEL_CONFIG1, 1, &value); + if (status) + return status; + + value &= ~ACCEL_CONFIG1_ACCEL_UI_FILT_BW_MASK; + value |= acc_bw; + + status |= inv_imu_write_reg(s, ACCEL_CONFIG1, 1, &value); + + return status; +} + +int inv_imu_set_gyro_ln_bw(struct inv_imu_device *s, GYRO_CONFIG1_GYRO_FILT_BW_t gyr_bw) +{ + uint8_t value; + int status = 0; + + status |= inv_imu_read_reg(s, GYRO_CONFIG1, 1, &value); + if (status) + return status; + + value &= ~GYRO_CONFIG1_GYRO_UI_FILT_BW_MASK; + value |= gyr_bw; + + status |= inv_imu_write_reg(s, GYRO_CONFIG1, 1, &value); + + return status; +} + +int inv_imu_set_timestamp_resolution(struct inv_imu_device *s, const TMST_CONFIG1_RESOL_t timestamp_resol) +{ + int status = 0; + uint8_t data; + + status |= inv_imu_read_reg(s, TMST_CONFIG1_MREG1, 1, &data); + data &= ~TMST_CONFIG1_TMST_RES_MASK; + data |= timestamp_resol; + status |= inv_imu_write_reg(s, TMST_CONFIG1_MREG1, 1, &data); + + return status; +} + +int inv_imu_reset_fifo(struct inv_imu_device *s) +{ + int status = 0; + uint8_t fifo_flush_status = (uint8_t)SIGNAL_PATH_RESET_FIFO_FLUSH_EN; + + status |= inv_imu_switch_on_mclk(s); + + status |= inv_imu_write_reg(s, SIGNAL_PATH_RESET, 1, &fifo_flush_status); + inv_imu_sleep_us(10); + + /* Wait for FIFO flush (idle bit will go high at appropriate time and unlock flush) */ + while ( (status == 0) + && ((fifo_flush_status & SIGNAL_PATH_RESET_FIFO_FLUSH_MASK) + == (uint8_t)SIGNAL_PATH_RESET_FIFO_FLUSH_EN)) { + status |= inv_imu_read_reg(s, SIGNAL_PATH_RESET, 1, &fifo_flush_status); + } + + status |= inv_imu_switch_off_mclk(s); + + return status; +} + +int inv_imu_enable_high_resolution_fifo(struct inv_imu_device *s) +{ + uint8_t value; + int status = 0; + + /* set FIFO packets to 20bit format (i.e. high res is enabled) */ + s->fifo_highres_enabled = 1; + + status |= inv_imu_read_reg(s, FIFO_CONFIG5_MREG1, 1, &value); + value &= ~FIFO_CONFIG5_FIFO_HIRES_EN_MASK; + value |= FIFO_CONFIG5_HIRES_EN; + status |= inv_imu_write_reg(s, FIFO_CONFIG5_MREG1, 1, &value); + + return status; +} + +int inv_imu_disable_high_resolution_fifo(struct inv_imu_device *s) +{ + uint8_t value; + int status = 0; + + /* set FIFO packets to 16bit format (i.e. high res is disabled) */ + s->fifo_highres_enabled = 0; + + status |= inv_imu_read_reg(s, FIFO_CONFIG5_MREG1, 1, &value); + value &= ~FIFO_CONFIG5_FIFO_HIRES_EN_MASK; + value |= FIFO_CONFIG5_HIRES_DIS; + status |= inv_imu_write_reg(s, FIFO_CONFIG5_MREG1, 1, &value); + + return status; +} + +int inv_imu_configure_fifo(struct inv_imu_device *s, INV_IMU_FIFO_CONFIG_t fifo_config) +{ + int status = 0; + uint8_t data; + inv_imu_interrupt_parameter_t config_int = {(inv_imu_interrupt_value)0}; + + s->fifo_is_used = fifo_config; + + inv_imu_switch_on_mclk(s); + + switch (fifo_config) { + + case INV_IMU_FIFO_ENABLED : + /* Configure: + - FIFO record mode i.e FIFO count unit is packet + - FIFO snapshot mode i.e drop the data when the FIFO overflows + - Timestamp is logged in FIFO + - Little Endian fifo_count + */ + + status |= inv_imu_read_reg(s, INTF_CONFIG0, 1, &data); + data &= ~(INTF_CONFIG0_FIFO_COUNT_FORMAT_MASK + | INTF_CONFIG0_FIFO_COUNT_ENDIAN_MASK); + data |= (uint8_t)INTF_CONFIG0_FIFO_COUNT_REC_RECORD + | (uint8_t)INTF_CONFIG0_FIFO_COUNT_LITTLE_ENDIAN; + status |= inv_imu_write_reg(s, INTF_CONFIG0, 1, &data); + + status |= inv_imu_read_reg(s, FIFO_CONFIG1, 1, &data); + data &= ~(FIFO_CONFIG1_FIFO_MODE_MASK + | FIFO_CONFIG1_FIFO_BYPASS_MASK); + data |= (uint8_t)FIFO_CONFIG1_FIFO_MODE_SNAPSHOT + | (uint8_t)FIFO_CONFIG1_FIFO_BYPASS_OFF; + status |= inv_imu_write_reg(s, FIFO_CONFIG1, 1, &data); + + status |= inv_imu_read_reg(s, TMST_CONFIG1_MREG1, 1, &data); + data &= ~TMST_CONFIG1_TMST_EN_MASK; + data |= TMST_CONFIG1_TMST_EN; + status |= inv_imu_write_reg(s, TMST_CONFIG1_MREG1, 1, &data); + + /* restart and reset FIFO configuration */ + status |= inv_imu_read_reg(s, FIFO_CONFIG5_MREG1, 1, &data); + data &= ~(FIFO_CONFIG5_FIFO_GYRO_EN_MASK + | FIFO_CONFIG5_FIFO_ACCEL_EN_MASK + | FIFO_CONFIG5_FIFO_TMST_FSYNC_EN_MASK + | FIFO_CONFIG5_FIFO_HIRES_EN_MASK); + data |= ( (uint8_t)FIFO_CONFIG5_GYRO_EN + | (uint8_t)FIFO_CONFIG5_ACCEL_EN + | (uint8_t)FIFO_CONFIG5_TMST_FSYNC_EN + | (uint8_t)FIFO_CONFIG5_WM_GT_TH_EN); + status |= inv_imu_write_reg(s, FIFO_CONFIG5_MREG1, 1, &data); + + // Configure FIFO WM so that INT is triggered for each packet + data = 0x1; + status |= inv_imu_write_reg(s, FIFO_CONFIG2, 1, &data); + + /* Disable Data Ready Interrupt */ + status |= inv_imu_get_config_int1(s, &config_int); + config_int.INV_UI_DRDY = INV_IMU_DISABLE; + status |= inv_imu_set_config_int1(s, &config_int); + break; + + + case INV_IMU_FIFO_DISABLED : + /* make sure FIFO is disabled */ + status |= inv_imu_read_reg(s, FIFO_CONFIG1, 1, &data); + data &= ~FIFO_CONFIG1_FIFO_BYPASS_MASK; + data |= (uint8_t)FIFO_CONFIG1_FIFO_BYPASS_ON; + status |= inv_imu_write_reg(s, FIFO_CONFIG1, 1, &data); + + /* restart and reset FIFO configuration */ + status |= inv_imu_read_reg(s, FIFO_CONFIG5_MREG1, 1, &data); + data &= ~(FIFO_CONFIG5_FIFO_GYRO_EN_MASK + | FIFO_CONFIG5_FIFO_ACCEL_EN_MASK + | FIFO_CONFIG5_FIFO_TMST_FSYNC_EN_MASK); + data |= ( (uint8_t)FIFO_CONFIG5_GYRO_DIS + | (uint8_t)FIFO_CONFIG5_ACCEL_DIS + | (uint8_t)FIFO_CONFIG5_TMST_FSYNC_EN); + status |= inv_imu_write_reg(s, FIFO_CONFIG5_MREG1, 1, &data); + + /* Enable Data Ready Interrupt */ + status |= inv_imu_get_config_int1(s, &config_int); + config_int.INV_UI_DRDY = INV_IMU_ENABLE; + status |= inv_imu_set_config_int1(s, &config_int); + break; + + default : + status = -1; + } + + status |= inv_imu_switch_off_mclk(s); + + return status; +} + +int32_t inv_imu_get_fifo_timestamp_resolution_us_q24(struct inv_imu_device *s) +{ + int status = 0; + uint8_t tmst_config1_reg; + TMST_CONFIG1_RESOL_t tmst_resol; + uint32_t scale_factor_q24 = 1<<24; + + status |= inv_imu_read_reg(s, TMST_CONFIG1_MREG1, 1, &tmst_config1_reg); + if (status < 0) + return INV_ERROR; + + tmst_resol = (TMST_CONFIG1_RESOL_t)(tmst_config1_reg & TMST_CONFIG1_TMST_RES_MASK); + + if (tmst_resol == TMST_CONFIG1_RESOL_16us) + return 16 * scale_factor_q24; + else if (tmst_resol == TMST_CONFIG1_RESOL_1us) + return 1 * scale_factor_q24; + + // Should not happen, return 0 + return 0; +} + +uint32_t inv_imu_get_reg_timestamp_resolution_us_q24(struct inv_imu_device *s) +{ + return 1 << 24; +} + +const char * inv_imu_get_version(void) +{ + return INV_IMU_VERSION_STRING; +} + +/* + * Static functions definition + */ +static int configure_serial_interface(struct inv_imu_device *s) +{ + uint8_t value; + int status = 0; + + switch(s->transport.serif.serif_type) { + + case UI_I2C: + // Enable I2C 50ns spike filtering + status |= inv_imu_read_reg(s, INTF_CONFIG1, 1, &value); + value &= ~(INTF_CONFIG1_I3C_SDR_EN_MASK | INTF_CONFIG1_I3C_DDR_EN_MASK); + //value |= (0 | 0); + status |= inv_imu_write_reg(s, INTF_CONFIG1, 1, &value); + break; + + case UI_SPI4: + // Force chip in SPI4w, no read-modify-write as MISO can't be trusted + value = 1<dmp_is_on) { + // Reset SRAM to 0's + status |= inv_imu_reset_dmp(s, APEX_CONFIG0_DMP_MEM_RESET_APEX_ST_EN); + if (status) + return status; + s->dmp_is_on = 1; + } + + // Initialize DMP + status |= resume_dmp(s); + + return status; +} + +int inv_imu_reset_dmp(struct inv_imu_device *s, const APEX_CONFIG0_DMP_MEM_RESET_t sram_reset) +{ + const int ref_timeout = 5000; /*50 ms*/ + int status = 0; + int timeout = ref_timeout; + uint8_t data_dmp_reset; + uint8_t value = 0; + + status |= inv_imu_switch_on_mclk(s); + + // Reset DMP internal memories + status |= inv_imu_read_reg(s, APEX_CONFIG0, 1, &value); + value &= ~APEX_CONFIG0_DMP_MEM_RESET_EN_MASK; + value |= (sram_reset & APEX_CONFIG0_DMP_MEM_RESET_EN_MASK); + status |= inv_imu_write_reg(s, APEX_CONFIG0, 1, &value); + + inv_imu_sleep_us(1000); + + // Make sure reset procedure has finished by reading back mem_reset_en bit + do { + inv_imu_sleep_us(10); + status |= inv_imu_read_reg(s, APEX_CONFIG0, 1, &data_dmp_reset); + } while (((data_dmp_reset & APEX_CONFIG0_DMP_MEM_RESET_EN_MASK) != APEX_CONFIG0_DMP_MEM_RESET_DIS) && timeout-- && !status); + + status |= inv_imu_switch_off_mclk(s); + + if (timeout <= 0) + return INV_ERROR_TIMEOUT; + + return status; +} + +int inv_imu_set_endianness(struct inv_imu_device *s, INTF_CONFIG0_DATA_ENDIAN_t endianness) +{ + int status = 0; + uint8_t value; + + status |= inv_imu_read_reg(s, INTF_CONFIG0, 1, &value); + value &= ~INTF_CONFIG0_SENSOR_DATA_ENDIAN_MASK; + value |= (uint8_t)endianness; + status |= inv_imu_write_reg(s, INTF_CONFIG0, 1, &value); + + if (!status) + s->endianness_data = (uint8_t)endianness; + + return status; +} + +int inv_imu_get_endianness(struct inv_imu_device *s) +{ + int status = 0; + uint8_t value; + + status |= inv_imu_read_reg(s, INTF_CONFIG0, 1, &value); + if (!status) + s->endianness_data = value & INTF_CONFIG0_SENSOR_DATA_ENDIAN_MASK; + + return status; +} diff --git a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_driver.h b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_driver.h similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_driver.h rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_driver.h index 0f65cc2..1d9e001 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_driver.h +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_driver.h @@ -1,520 +1,520 @@ -/* - * ________________________________________________________________________________________________________ - * Copyright (c) 2017 InvenSense Inc. All rights reserved. - * - * This software, related documentation and any modifications thereto (collectively "Software") is subject - * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright - * and other intellectual property rights laws. - * - * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software - * and any use, reproduction, disclosure or distribution of the Software without an express license agreement - * from InvenSense is strictly prohibited. - * - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS - * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED - * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL - * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY - * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, - * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE - * OF THE SOFTWARE. - * ________________________________________________________________________________________________________ - */ - -/** @defgroup Driver IMU driver high level functions - * @brief High-level function to setup an IMU device - * @ingroup DriverIcm - * @{ - */ - -/** @file inv_imu_driver.h - * High-level function to setup an IMU device - */ - -#ifndef _INV_IMU_DRIVER_H_ -#define _INV_IMU_DRIVER_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -#include "inv_imu_defs.h" -#include "inv_imu_transport.h" - -#include "InvError.h" - -#include -#include - - -/** @brief IMU max FSR values for accel and gyro - * Dependent on chip - */ -#define ACCEL_CONFIG0_FS_SEL_MAX ACCEL_CONFIG0_FS_SEL_16g -#define GYRO_CONFIG0_FS_SEL_MAX GYRO_CONFIG0_FS_SEL_2000dps - -#define ACCEL_OFFUSER_MAX_MG 1000 -#define GYRO_OFFUSER_MAX_DPS 64 - -/** @brief IMU maximum buffer size mirrored from FIFO at polling time - * @warning fifo_idx type variable must be large enough to parse the FIFO_MIRRORING_SIZE - */ -#define FIFO_MIRRORING_SIZE 16 * 258 // packet size * max_count = 4kB - -/** @brief IMU Accelerometer start-up time before having correct data - */ -#define ACC_STARTUP_TIME_US 10000 - -/** @brief IMU Gyroscope start-up time before having correct data - */ -#define GYR_STARTUP_TIME_US 70000 - -/** @brief IMU Gyroscope power off to power on duration - */ -#define GYR_POWER_OFF_DUR_US 20000 - -/** @brief Sensor identifier for UI control function - */ -enum inv_imu_sensor { - INV_SENSOR_ACCEL, /**< Accelerometer */ - INV_SENSOR_GYRO, /**< Gyroscope */ - INV_SENSOR_FSYNC_EVENT, /**< FSYNC */ - INV_SENSOR_TEMPERATURE, /**< Chip temperature */ - INV_SENSOR_DMP_PEDOMETER_EVENT, /**< Pedometer: step detected */ - INV_SENSOR_DMP_PEDOMETER_COUNT, /**< Pedometer: step counter */ - INV_SENSOR_DMP_TILT, /**< Tilt */ - INV_SENSOR_DMP_FF, /**< FreeFall */ - INV_SENSOR_DMP_LOWG, /**< Low G */ - INV_SENSOR_DMP_SMD, /**< Significant Motion Detection */ - INV_SENSOR_MAX -}; - -/** @brief Configure Fifo usage - */ -typedef enum { - INV_IMU_FIFO_DISABLED = 0, /**< Fifo is disabled and data source is sensors registers */ - INV_IMU_FIFO_ENABLED = 1, /**< Fifo is used as data source */ -}INV_IMU_FIFO_CONFIG_t; - -/** @brief Sensor event structure definition - */ -typedef struct { - int sensor_mask; - uint16_t timestamp_fsync; - int16_t accel[3]; - int16_t gyro[3]; - int16_t temperature; - int8_t accel_high_res[3]; - int8_t gyro_high_res[3]; -} inv_imu_sensor_event_t; - -/** @brief IMU driver states definition - */ -struct inv_imu_device { - struct inv_imu_transport transport; /**< Transport layer - Must be the first one of struct inv_imu_device */ - void (*sensor_event_cb)(inv_imu_sensor_event_t *event); /**< callback executed by: - inv_imu_get_data_from_fifo (if FIFO is used) - inv_imu_get_data_from_registers (if FIFO isn't used) - May be NULL if above API are not used by application */ - uint8_t fifo_data[FIFO_MIRRORING_SIZE]; /**< FIFO mirroring memory area */ - uint8_t dmp_is_on; /**< DMP started status */ - uint8_t endianness_data; /**< Data endianness configuration */ - uint8_t fifo_highres_enabled; /**< Highres mode configuration */ - INV_IMU_FIFO_CONFIG_t fifo_is_used; /**< FIFO configuration */ - uint64_t gyro_start_time_us; /**< Gyro start time used to discard first samples */ - uint64_t accel_start_time_us; /**< Accel start time used to discard first samples */ - uint64_t gyro_power_off_tmst; /**< Gyro power off time */ -}; - - -/* Interrupt enum state for INT1, INT2, and IBI */ -typedef enum { - INV_IMU_DISABLE = 0, - INV_IMU_ENABLE -} inv_imu_interrupt_value; - -/** @brief Interrupt definition - */ -typedef struct { - inv_imu_interrupt_value INV_UI_FSYNC; - inv_imu_interrupt_value INV_UI_DRDY; - inv_imu_interrupt_value INV_FIFO_THS; - inv_imu_interrupt_value INV_FIFO_FULL; - inv_imu_interrupt_value INV_SMD; - inv_imu_interrupt_value INV_WOM_X; - inv_imu_interrupt_value INV_WOM_Y; - inv_imu_interrupt_value INV_WOM_Z; - inv_imu_interrupt_value INV_FF; - inv_imu_interrupt_value INV_LOWG; - inv_imu_interrupt_value INV_STEP_DET; - inv_imu_interrupt_value INV_STEP_CNT_OVFL; - inv_imu_interrupt_value INV_TILT_DET; -} inv_imu_interrupt_parameter_t; - - -/** @brief Configure the serial interface used to access the device and execute hardware initialization. - * - * This functions first configures serial interface passed in parameter to make sure device - * is accessible both in read and write. Thus no serial access should be done before - * successfully executing the present function. - * - * Then if requested serial interface is a primary interface (aka UI interface or AP - * interface), this function initializes the device using the following hardware settings: - * - set timestamp resolution to 16us - * - enable FIFO mechanism with the following configuration: - * - FIFO record mode i.e FIFO count unit is packet - * - FIFO snapshot mode i.e drop the data when the FIFO overflows - * - Timestamp is logged in FIFO - * - Little Endian fifo_count and fifo_data - * - generate FIFO threshold interrupt when packet count reaches FIFO watermark - * - set FIFO watermark to 1 packet - * - enable temperature and timestamp data to go to FIFO - * - * - * @param[in] s driver structure. Note that first field of this structure MUST be a struct - * inv_imu_serif. - * - * @param[in] serif pointer on serial interface structure to be used to access inv_device. - * - * @param[in] sensor_event_cb callback executed by inv_imu_get_data_from_fifo function - * each time it extracts some valid data from fifo. Or inv_imu_get_data_from_registers read data - * from register. Thus this parameter is optional as long - * as inv_imu_get_data_from_fifo/inv_imu_get_data_from_registers function is not used. - * - * @return 0 on success, negative value on error. - */ -int inv_imu_init(struct inv_imu_device *s, - struct inv_imu_serif *serif, - void (*sensor_event_cb)(inv_imu_sensor_event_t *event)); - -/** @brief Perform a soft reset of the device - * @return 0 on success, negative value on error. - */ -int inv_imu_device_reset(struct inv_imu_device *s); - -/** @brief return WHOAMI value - * @param[out] who_am_i WHOAMI for device - * @return 0 on success, negative value on error - */ -int inv_imu_get_who_am_i(struct inv_imu_device *s, uint8_t *who_am_i); - -/** @brief Enable/put accel in low power mode - * @return 0 on success, negative value on error. - * @details - * It enables accel and gyro data in the FIFO (so - * the packet format is 16 bytes). If called first, - * the configuration will be applied, otherwise it - * will be ignored if the FIFO is not empty (but since - * the new configuration is identical it is not a issue). - * @warning inv_device::register_cache::pwr_mgmt0_reg is modified by this function - */ -int inv_imu_enable_accel_low_power_mode(struct inv_imu_device *s); - -/** @brief Enable/put accel in low noise mode - * @return 0 on success, negative value on error. - * @details - * It enables accel and gyro data in the FIFO (so - * the packet format is 16 bytes). If called first, - * the configuration will be applied, otherwise it - * will be ignored if the FIFO is not empty (but since - * the new configuration is identical it is not a issue). - * @warning inv_device::register_cache::pwr_mgmt0_reg is modified by this function - */ -int inv_imu_enable_accel_low_noise_mode(struct inv_imu_device *s); - -/** @brief Disable all 3 axes of accel - * @return 0 on success, negative value on error. - * @details - * If both accel and gyro are turned off as a result of this - * function, they will also be removed from the FIFO and a - * FIFO reset will be performed (to guarantee no side effects - * until the next enable sensor call) - * @warning inv_device::register_cache::pwr_mgmt0_reg is modified by this function - */ -int inv_imu_disable_accel(struct inv_imu_device *s); - -/** @brief Enable/put gyro in low noise mode - * @return 0 on success, negative value on error. - * @details - * It enables gyro and accel data in the FIFO (so - * the packet format is 16 bytes). If called first, - * the configuration will be applied, otherwise it - * will be ignored if the FIFO is not empty (but since - * the new configuration is identical it is not a issue). - * @warning inv_device::register_cache::pwr_mgmt0_reg is modified by this function - */ -int inv_imu_enable_gyro_low_noise_mode(struct inv_imu_device *s); - -/** @brief Disable all 3 axes of gyro - * @return 0 on success, negative value on error. - * @details - * If both accel and gyro are turned off as a result of this - * function, they will also be removed from the FIFO and a - * FIFO reset will be performed (to guarantee no side effects - * until the next enable sensor call) - * @warning inv_device::register_cache::pwr_mgmt0_reg is modified by this function - */ -int inv_imu_disable_gyro(struct inv_imu_device *s); - -/** @brief Enable fsync tagging functionality. - * In details it: - * - enables fsync - * - enables timestamp to registers. Once fsync is enabled fsync counter is pushed to - * fifo instead of timestamp. So timestamp is made available in registers. Note that - * this increase power consumption. - * - enables fsync related interrupt - * @return 0 on success, negative value on error. - */ -int inv_imu_enable_fsync(struct inv_imu_device *s); - -/** @brief Disable fsync tagging functionality. - * In details it: - * - disables fsync - * - disables timestamp to registers. Once fsync is disabled timestamp is pushed to fifo - * instead of fsync counter. So in order to decrease power consumption, timestamp is no - * more available in registers. - * - disables fsync related interrupt - * @return 0 on success, negative value on error. - */ -int inv_imu_disable_fsync(struct inv_imu_device *s); - -/** @brief Configure which interrupt source can trigger INT1. - * @param[in] interrupt_to_configure structure with the corresponding state to manage INT1. - * @return 0 on success, negative value on error. - */ -int inv_imu_set_config_int1(struct inv_imu_device *s, - inv_imu_interrupt_parameter_t *interrupt_to_configure); - -/** @brief Retrieve interrupts configuration. - * @param[in] interrupt_to_configure structure with the corresponding state to manage INT1. - * @return 0 on success, negative value on error. - */ -int inv_imu_get_config_int1(struct inv_imu_device *s, - inv_imu_interrupt_parameter_t *interrupt_to_configure); - -/** @brief Configure which interrupt source can trigger INT2. - * @param[in] interrupt_to_configure structure with the corresponding state to INT2. - * @return 0 on success, negative value on error. - */ -int inv_imu_set_config_int2(struct inv_imu_device *s, - inv_imu_interrupt_parameter_t *interrupt_to_configure); - -/** @brief Retrieve interrupts configuration. - * @param[in] interrupt_to_configure structure with the corresponding state to manage INT2. - * @return 0 on success, negative value on error. - */ -int inv_imu_get_config_int2(struct inv_imu_device *s, - inv_imu_interrupt_parameter_t *interrupt_to_configure); - -/** @brief Read all registers containing data (temperature, accelerometer and gyroscope). Then it calls - * sensor_event_cb function passed in parameter of inv_imu_init function for each packet - * @return 0 on success, negative value on error. - */ -int inv_imu_get_data_from_registers(struct inv_imu_device *s); - -/** @brief Read all available packets from the FIFO. For each packet function builds a - * sensor event containing packet data and validity information. Then it calls - * sensor_event_cb funtion passed in parameter of inv_imu_init function for each - * packet. - * @return number of valid packets read on success, negative value on error. - */ -int inv_imu_get_data_from_fifo(struct inv_imu_device *s); - -/** @brief Converts ACCEL_CONFIG0_ODR_t or GYRO_CONFIG0_ODR_t enums to period expressed in us - * @param[in] odr_bitfield An ACCEL_CONFIG0_ODR_t or GYRO_CONFIG0_ODR_t enum - * @return The corresponding period expressed in us - */ -uint32_t inv_imu_convert_odr_bitfield_to_us(uint32_t odr_bitfield); - -/** @brief Configure accel Output Data Rate - * @param[in] frequency The requested frequency. - * @sa ACCEL_CONFIG0_ODR_t - * @return 0 on success, negative value on error. - * @warning inv_device::register_cache::accel_config0_reg is modified by this function - */ -int inv_imu_set_accel_frequency(struct inv_imu_device *s, - const ACCEL_CONFIG0_ODR_t frequency); - -/** @brief Configure gyro Output Data Rate - * @param[in] frequency The requested frequency. - * @sa GYRO_CONFIG0_ODR_t - * @return 0 on success, negative value on error. - * @warning inv_device::register_cache::gyro_config0_reg is modified by this function - */ -int inv_imu_set_gyro_frequency(struct inv_imu_device *s, - const GYRO_CONFIG0_ODR_t frequency); - -/** @brief Set accel full scale range - * @param[in] accel_fsr_g requested full scale range. - * @sa ACCEL_CONFIG0_FS_SEL_t. - * @return 0 on success, negative value on error. - * @warning inv_device::register_cache::accel_config0_reg is modified by this function - */ -int inv_imu_set_accel_fsr(struct inv_imu_device *s, - ACCEL_CONFIG0_FS_SEL_t accel_fsr_g); - -/** @brief Access accel full scale range - * @param[out] accel_fsr_g current full scale range. - * @sa ACCEL_CONFIG0_FS_SEL_t. - * @return 0 on success, negative value on error. - * @warning inv_device::register_cache::accel_config0_reg is relied upon by this function - */ -int inv_imu_get_accel_fsr(struct inv_imu_device *s, - ACCEL_CONFIG0_FS_SEL_t *accel_fsr_g); - -/** @brief Set gyro full scale range - * @param[in] gyro_fsr_dps requested full scale range. - * @sa GYRO_CONFIG0_FS_SEL_t. - * @return 0 on success, negative value on error. - * @warning inv_device::register_cache::gyro_config0_reg is modified by this function - */ -int inv_imu_set_gyro_fsr(struct inv_imu_device *s, - GYRO_CONFIG0_FS_SEL_t gyro_fsr_dps); - -/** @brief Access gyro full scale range - * @param[out] gyro_fsr_dps current full scale range. - * @sa GYRO_CONFIG0_FS_SEL_t. - * @return 0 on success, negative value on error. - * @warning inv_device::register_cache::gyro_config0_reg is relied upon by this function - */ -int inv_imu_get_gyro_fsr(struct inv_imu_device *s, - GYRO_CONFIG0_FS_SEL_t *gyro_fsr_dps); - -/** @brief Set accel Low-Power averaging value - * @param[in] acc_avg requested averaging value - * @sa ACCEL_CONFIG1_ACCEL_FILT_AVG_t - * @return 0 on success, negative value on error. - */ -int inv_imu_set_accel_lp_avg(struct inv_imu_device *s, - ACCEL_CONFIG1_ACCEL_FILT_AVG_t acc_avg); - -/** @brief Set accel Low-Noise bandwidth value - * @param[in] acc_bw requested averaging value - * @sa ACCEL_CONFIG1_ACCEL_FILT_BW_t - * @return 0 on success, negative value on error. - */ -int inv_imu_set_accel_ln_bw(struct inv_imu_device *s, - ACCEL_CONFIG1_ACCEL_FILT_BW_t acc_bw); - -/** @brief Set gyro Low-Noise bandwidth value - * @param[in] gyr_bw requested averaging value - * @sa GYRO_CONFIG1_GYRO_FILT_BW_t - * @return 0 on success, negative value on error. - */ -int inv_imu_set_gyro_ln_bw(struct inv_imu_device *s, - GYRO_CONFIG1_GYRO_FILT_BW_t gyr_bw); - -/** @brief Set timestamp resolution - * @param[in] timestamp_resol requested timestamp resolution - * @sa TMST_CONFIG1_RESOL_t - * @return 0 on success, negative value on error. - */ -int inv_imu_set_timestamp_resolution(struct inv_imu_device *s, - const TMST_CONFIG1_RESOL_t timestamp_resol); - -/** @brief reset IMU fifo - * @return 0 on success, negative value on error. - */ -int inv_imu_reset_fifo(struct inv_imu_device *s); - -/** @brief Enable 20 bits raw acc and raw gyr data in fifo. - * @return 0 on success, negative return code otherwise - */ -int inv_imu_enable_high_resolution_fifo(struct inv_imu_device *s); - -/** @brief Disable 20 bits raw acc and raw gyr data in fifo. - * @return 0 on success, negative return code otherwise - */ -int inv_imu_disable_high_resolution_fifo(struct inv_imu_device *s); - - /** @brief Configure Fifo - * @param[in] fifo_config Fifo configuration method : - * if FIFO is enabled, data are pushed to FIFO and FIFO THS interrupt is set - * if FIFO is disabled, data are not pused to FIFO and DRDY interrupt is set - * @sa INV_IMU_FIFO_CONFIG_t - */ -int inv_imu_configure_fifo(struct inv_imu_device *s, - INV_IMU_FIFO_CONFIG_t fifo_config); - -/** @brief Get FIFO timestamp resolution - * @return the timestamp resolution in us as a q24 or 0 in case of error - */ -int32_t inv_imu_get_fifo_timestamp_resolution_us_q24(struct inv_imu_device *s); - -/** @brief Get register timestamp resolution - * @return the timestamp resolution in us as a q24 or 0 in case of error - */ -uint32_t inv_imu_get_reg_timestamp_resolution_us_q24(struct inv_imu_device *s); - -/** @brief Enable Wake On Motion. - * @param[in] wom_x_th threshold value for the Wake on Motion Interrupt for X-axis accelerometer. - * @param[in] wom_y_th threshold value for the Wake on Motion Interrupt for Y-axis accelerometer. - * @param[in] wom_z_th threshold value for the Wake on Motion Interrupt for Z-axis accelerometer. - * @param[in] wom_int select which mode between AND/OR is used to generate interrupt. - * @param[in] wom_dur select the number of overthreshold event to wait before generating interrupt. - * @return 0 on success, negative value on error. - */ -int inv_imu_configure_wom(struct inv_imu_device *s, - const uint8_t wom_x_th, - const uint8_t wom_y_th, - const uint8_t wom_z_th, - WOM_CONFIG_WOM_INT_MODE_t wom_int, - WOM_CONFIG_WOM_INT_DUR_t wom_dur); - -/** @brief Enable Wake On Motion. - * note : WoM requests to have the accelerometer enabled to work. - * As a consequence Fifo water-mark interrupt is disabled to only trigger WoM interrupts. - * To have good performance, it's recommended to set accelerometer ODR (Output Data Rate) to 20ms - * and the accelerometer in Low Power Mode. - * @return 0 on success, negative value on error. - */ -int inv_imu_enable_wom(struct inv_imu_device *s); - -/** @brief Disable Wake On Motion. - * note : Fifo water-mark interrupt is re-enabled when WoM is disabled. - * @return 0 on success, negative value on error. - */ -int inv_imu_disable_wom(struct inv_imu_device *s); - -/** @brief Start DMP for APEX algorithms and selftest - * @return 0 on success, negative value on error. - */ -int inv_imu_start_dmp(struct inv_imu_device *s); - -/** @brief Reset DMP for APEX algorithms and selftest - * @return 0 on success, negative value on error. - */ -int inv_imu_reset_dmp(struct inv_imu_device *s, - const APEX_CONFIG0_DMP_MEM_RESET_t sram_reset); - -/** @breif Set the UI endianness and set the inv_device endianness field - * @return 0 on success, negative value on error. - */ -int inv_imu_set_endianness(struct inv_imu_device *s, - INTF_CONFIG0_DATA_ENDIAN_t endianness); - -/** @breif Read the UI endianness and set the inv_device endianness field - * @return 0 on success, negative value on error. - */ -int inv_imu_get_endianness(struct inv_imu_device *s); - - /** @brief Configure Fifo decimation - * @param[in] requested decimation factor value from 2 to 256 - * @return 0 on success, negative value on error. - */ -int inv_imu_configure_fifo_data_rate(struct inv_imu_device *s, - FDR_CONFIG_FDR_SEL_t dec_factor); - -/** @brief Return driver version x.y.z-suffix as a char array - * @retval driver version a char array "x.y.z-suffix" - */ -const char * inv_imu_get_version(void); - -#ifdef __cplusplus -} -#endif - -#endif /* _INV_IMU_DRIVER_H_ */ - -/** @} */ +/* + * ________________________________________________________________________________________________________ + * Copyright (c) 2017 InvenSense Inc. All rights reserved. + * + * This software, related documentation and any modifications thereto (collectively "Software") is subject + * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright + * and other intellectual property rights laws. + * + * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software + * and any use, reproduction, disclosure or distribution of the Software without an express license agreement + * from InvenSense is strictly prohibited. + * + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS + * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED + * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL + * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, + * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THE SOFTWARE. + * ________________________________________________________________________________________________________ + */ + +/** @defgroup Driver IMU driver high level functions + * @brief High-level function to setup an IMU device + * @ingroup DriverIcm + * @{ + */ + +/** @file inv_imu_driver.h + * High-level function to setup an IMU device + */ + +#ifndef _INV_IMU_DRIVER_H_ +#define _INV_IMU_DRIVER_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "inv_imu_defs.h" +#include "inv_imu_transport.h" + +#include "InvError.h" + +#include +#include + + +/** @brief IMU max FSR values for accel and gyro + * Dependent on chip + */ +#define ACCEL_CONFIG0_FS_SEL_MAX ACCEL_CONFIG0_FS_SEL_16g +#define GYRO_CONFIG0_FS_SEL_MAX GYRO_CONFIG0_FS_SEL_2000dps + +#define ACCEL_OFFUSER_MAX_MG 1000 +#define GYRO_OFFUSER_MAX_DPS 64 + +/** @brief IMU maximum buffer size mirrored from FIFO at polling time + * @warning fifo_idx type variable must be large enough to parse the FIFO_MIRRORING_SIZE + */ +#define FIFO_MIRRORING_SIZE 16 * 258 // packet size * max_count = 4kB + +/** @brief IMU Accelerometer start-up time before having correct data + */ +#define ACC_STARTUP_TIME_US 10000 + +/** @brief IMU Gyroscope start-up time before having correct data + */ +#define GYR_STARTUP_TIME_US 70000 + +/** @brief IMU Gyroscope power off to power on duration + */ +#define GYR_POWER_OFF_DUR_US 20000 + +/** @brief Sensor identifier for UI control function + */ +enum inv_imu_sensor { + INV_SENSOR_ACCEL, /**< Accelerometer */ + INV_SENSOR_GYRO, /**< Gyroscope */ + INV_SENSOR_FSYNC_EVENT, /**< FSYNC */ + INV_SENSOR_TEMPERATURE, /**< Chip temperature */ + INV_SENSOR_DMP_PEDOMETER_EVENT, /**< Pedometer: step detected */ + INV_SENSOR_DMP_PEDOMETER_COUNT, /**< Pedometer: step counter */ + INV_SENSOR_DMP_TILT, /**< Tilt */ + INV_SENSOR_DMP_FF, /**< FreeFall */ + INV_SENSOR_DMP_LOWG, /**< Low G */ + INV_SENSOR_DMP_SMD, /**< Significant Motion Detection */ + INV_SENSOR_MAX +}; + +/** @brief Configure Fifo usage + */ +typedef enum { + INV_IMU_FIFO_DISABLED = 0, /**< Fifo is disabled and data source is sensors registers */ + INV_IMU_FIFO_ENABLED = 1, /**< Fifo is used as data source */ +}INV_IMU_FIFO_CONFIG_t; + +/** @brief Sensor event structure definition + */ +typedef struct { + int sensor_mask; + uint16_t timestamp_fsync; + int16_t accel[3]; + int16_t gyro[3]; + int16_t temperature; + int8_t accel_high_res[3]; + int8_t gyro_high_res[3]; +} inv_imu_sensor_event_t; + +/** @brief IMU driver states definition + */ +struct inv_imu_device { + struct inv_imu_transport transport; /**< Transport layer + Must be the first one of struct inv_imu_device */ + void (*sensor_event_cb)(inv_imu_sensor_event_t *event); /**< callback executed by: + inv_imu_get_data_from_fifo (if FIFO is used) + inv_imu_get_data_from_registers (if FIFO isn't used) + May be NULL if above API are not used by application */ + uint8_t fifo_data[FIFO_MIRRORING_SIZE]; /**< FIFO mirroring memory area */ + uint8_t dmp_is_on; /**< DMP started status */ + uint8_t endianness_data; /**< Data endianness configuration */ + uint8_t fifo_highres_enabled; /**< Highres mode configuration */ + INV_IMU_FIFO_CONFIG_t fifo_is_used; /**< FIFO configuration */ + uint64_t gyro_start_time_us; /**< Gyro start time used to discard first samples */ + uint64_t accel_start_time_us; /**< Accel start time used to discard first samples */ + uint64_t gyro_power_off_tmst; /**< Gyro power off time */ +}; + + +/* Interrupt enum state for INT1, INT2, and IBI */ +typedef enum { + INV_IMU_DISABLE = 0, + INV_IMU_ENABLE +} inv_imu_interrupt_value; + +/** @brief Interrupt definition + */ +typedef struct { + inv_imu_interrupt_value INV_UI_FSYNC; + inv_imu_interrupt_value INV_UI_DRDY; + inv_imu_interrupt_value INV_FIFO_THS; + inv_imu_interrupt_value INV_FIFO_FULL; + inv_imu_interrupt_value INV_SMD; + inv_imu_interrupt_value INV_WOM_X; + inv_imu_interrupt_value INV_WOM_Y; + inv_imu_interrupt_value INV_WOM_Z; + inv_imu_interrupt_value INV_FF; + inv_imu_interrupt_value INV_LOWG; + inv_imu_interrupt_value INV_STEP_DET; + inv_imu_interrupt_value INV_STEP_CNT_OVFL; + inv_imu_interrupt_value INV_TILT_DET; +} inv_imu_interrupt_parameter_t; + + +/** @brief Configure the serial interface used to access the device and execute hardware initialization. + * + * This functions first configures serial interface passed in parameter to make sure device + * is accessible both in read and write. Thus no serial access should be done before + * successfully executing the present function. + * + * Then if requested serial interface is a primary interface (aka UI interface or AP + * interface), this function initializes the device using the following hardware settings: + * - set timestamp resolution to 16us + * - enable FIFO mechanism with the following configuration: + * - FIFO record mode i.e FIFO count unit is packet + * - FIFO snapshot mode i.e drop the data when the FIFO overflows + * - Timestamp is logged in FIFO + * - Little Endian fifo_count and fifo_data + * - generate FIFO threshold interrupt when packet count reaches FIFO watermark + * - set FIFO watermark to 1 packet + * - enable temperature and timestamp data to go to FIFO + * + * + * @param[in] s driver structure. Note that first field of this structure MUST be a struct + * inv_imu_serif. + * + * @param[in] serif pointer on serial interface structure to be used to access inv_device. + * + * @param[in] sensor_event_cb callback executed by inv_imu_get_data_from_fifo function + * each time it extracts some valid data from fifo. Or inv_imu_get_data_from_registers read data + * from register. Thus this parameter is optional as long + * as inv_imu_get_data_from_fifo/inv_imu_get_data_from_registers function is not used. + * + * @return 0 on success, negative value on error. + */ +int inv_imu_init(struct inv_imu_device *s, + struct inv_imu_serif *serif, + void (*sensor_event_cb)(inv_imu_sensor_event_t *event)); + +/** @brief Perform a soft reset of the device + * @return 0 on success, negative value on error. + */ +int inv_imu_device_reset(struct inv_imu_device *s); + +/** @brief return WHOAMI value + * @param[out] who_am_i WHOAMI for device + * @return 0 on success, negative value on error + */ +int inv_imu_get_who_am_i(struct inv_imu_device *s, uint8_t *who_am_i); + +/** @brief Enable/put accel in low power mode + * @return 0 on success, negative value on error. + * @details + * It enables accel and gyro data in the FIFO (so + * the packet format is 16 bytes). If called first, + * the configuration will be applied, otherwise it + * will be ignored if the FIFO is not empty (but since + * the new configuration is identical it is not a issue). + * @warning inv_device::register_cache::pwr_mgmt0_reg is modified by this function + */ +int inv_imu_enable_accel_low_power_mode(struct inv_imu_device *s); + +/** @brief Enable/put accel in low noise mode + * @return 0 on success, negative value on error. + * @details + * It enables accel and gyro data in the FIFO (so + * the packet format is 16 bytes). If called first, + * the configuration will be applied, otherwise it + * will be ignored if the FIFO is not empty (but since + * the new configuration is identical it is not a issue). + * @warning inv_device::register_cache::pwr_mgmt0_reg is modified by this function + */ +int inv_imu_enable_accel_low_noise_mode(struct inv_imu_device *s); + +/** @brief Disable all 3 axes of accel + * @return 0 on success, negative value on error. + * @details + * If both accel and gyro are turned off as a result of this + * function, they will also be removed from the FIFO and a + * FIFO reset will be performed (to guarantee no side effects + * until the next enable sensor call) + * @warning inv_device::register_cache::pwr_mgmt0_reg is modified by this function + */ +int inv_imu_disable_accel(struct inv_imu_device *s); + +/** @brief Enable/put gyro in low noise mode + * @return 0 on success, negative value on error. + * @details + * It enables gyro and accel data in the FIFO (so + * the packet format is 16 bytes). If called first, + * the configuration will be applied, otherwise it + * will be ignored if the FIFO is not empty (but since + * the new configuration is identical it is not a issue). + * @warning inv_device::register_cache::pwr_mgmt0_reg is modified by this function + */ +int inv_imu_enable_gyro_low_noise_mode(struct inv_imu_device *s); + +/** @brief Disable all 3 axes of gyro + * @return 0 on success, negative value on error. + * @details + * If both accel and gyro are turned off as a result of this + * function, they will also be removed from the FIFO and a + * FIFO reset will be performed (to guarantee no side effects + * until the next enable sensor call) + * @warning inv_device::register_cache::pwr_mgmt0_reg is modified by this function + */ +int inv_imu_disable_gyro(struct inv_imu_device *s); + +/** @brief Enable fsync tagging functionality. + * In details it: + * - enables fsync + * - enables timestamp to registers. Once fsync is enabled fsync counter is pushed to + * fifo instead of timestamp. So timestamp is made available in registers. Note that + * this increase power consumption. + * - enables fsync related interrupt + * @return 0 on success, negative value on error. + */ +int inv_imu_enable_fsync(struct inv_imu_device *s); + +/** @brief Disable fsync tagging functionality. + * In details it: + * - disables fsync + * - disables timestamp to registers. Once fsync is disabled timestamp is pushed to fifo + * instead of fsync counter. So in order to decrease power consumption, timestamp is no + * more available in registers. + * - disables fsync related interrupt + * @return 0 on success, negative value on error. + */ +int inv_imu_disable_fsync(struct inv_imu_device *s); + +/** @brief Configure which interrupt source can trigger INT1. + * @param[in] interrupt_to_configure structure with the corresponding state to manage INT1. + * @return 0 on success, negative value on error. + */ +int inv_imu_set_config_int1(struct inv_imu_device *s, + inv_imu_interrupt_parameter_t *interrupt_to_configure); + +/** @brief Retrieve interrupts configuration. + * @param[in] interrupt_to_configure structure with the corresponding state to manage INT1. + * @return 0 on success, negative value on error. + */ +int inv_imu_get_config_int1(struct inv_imu_device *s, + inv_imu_interrupt_parameter_t *interrupt_to_configure); + +/** @brief Configure which interrupt source can trigger INT2. + * @param[in] interrupt_to_configure structure with the corresponding state to INT2. + * @return 0 on success, negative value on error. + */ +int inv_imu_set_config_int2(struct inv_imu_device *s, + inv_imu_interrupt_parameter_t *interrupt_to_configure); + +/** @brief Retrieve interrupts configuration. + * @param[in] interrupt_to_configure structure with the corresponding state to manage INT2. + * @return 0 on success, negative value on error. + */ +int inv_imu_get_config_int2(struct inv_imu_device *s, + inv_imu_interrupt_parameter_t *interrupt_to_configure); + +/** @brief Read all registers containing data (temperature, accelerometer and gyroscope). Then it calls + * sensor_event_cb function passed in parameter of inv_imu_init function for each packet + * @return 0 on success, negative value on error. + */ +int inv_imu_get_data_from_registers(struct inv_imu_device *s); + +/** @brief Read all available packets from the FIFO. For each packet function builds a + * sensor event containing packet data and validity information. Then it calls + * sensor_event_cb funtion passed in parameter of inv_imu_init function for each + * packet. + * @return number of valid packets read on success, negative value on error. + */ +int inv_imu_get_data_from_fifo(struct inv_imu_device *s); + +/** @brief Converts ACCEL_CONFIG0_ODR_t or GYRO_CONFIG0_ODR_t enums to period expressed in us + * @param[in] odr_bitfield An ACCEL_CONFIG0_ODR_t or GYRO_CONFIG0_ODR_t enum + * @return The corresponding period expressed in us + */ +uint32_t inv_imu_convert_odr_bitfield_to_us(uint32_t odr_bitfield); + +/** @brief Configure accel Output Data Rate + * @param[in] frequency The requested frequency. + * @sa ACCEL_CONFIG0_ODR_t + * @return 0 on success, negative value on error. + * @warning inv_device::register_cache::accel_config0_reg is modified by this function + */ +int inv_imu_set_accel_frequency(struct inv_imu_device *s, + const ACCEL_CONFIG0_ODR_t frequency); + +/** @brief Configure gyro Output Data Rate + * @param[in] frequency The requested frequency. + * @sa GYRO_CONFIG0_ODR_t + * @return 0 on success, negative value on error. + * @warning inv_device::register_cache::gyro_config0_reg is modified by this function + */ +int inv_imu_set_gyro_frequency(struct inv_imu_device *s, + const GYRO_CONFIG0_ODR_t frequency); + +/** @brief Set accel full scale range + * @param[in] accel_fsr_g requested full scale range. + * @sa ACCEL_CONFIG0_FS_SEL_t. + * @return 0 on success, negative value on error. + * @warning inv_device::register_cache::accel_config0_reg is modified by this function + */ +int inv_imu_set_accel_fsr(struct inv_imu_device *s, + ACCEL_CONFIG0_FS_SEL_t accel_fsr_g); + +/** @brief Access accel full scale range + * @param[out] accel_fsr_g current full scale range. + * @sa ACCEL_CONFIG0_FS_SEL_t. + * @return 0 on success, negative value on error. + * @warning inv_device::register_cache::accel_config0_reg is relied upon by this function + */ +int inv_imu_get_accel_fsr(struct inv_imu_device *s, + ACCEL_CONFIG0_FS_SEL_t *accel_fsr_g); + +/** @brief Set gyro full scale range + * @param[in] gyro_fsr_dps requested full scale range. + * @sa GYRO_CONFIG0_FS_SEL_t. + * @return 0 on success, negative value on error. + * @warning inv_device::register_cache::gyro_config0_reg is modified by this function + */ +int inv_imu_set_gyro_fsr(struct inv_imu_device *s, + GYRO_CONFIG0_FS_SEL_t gyro_fsr_dps); + +/** @brief Access gyro full scale range + * @param[out] gyro_fsr_dps current full scale range. + * @sa GYRO_CONFIG0_FS_SEL_t. + * @return 0 on success, negative value on error. + * @warning inv_device::register_cache::gyro_config0_reg is relied upon by this function + */ +int inv_imu_get_gyro_fsr(struct inv_imu_device *s, + GYRO_CONFIG0_FS_SEL_t *gyro_fsr_dps); + +/** @brief Set accel Low-Power averaging value + * @param[in] acc_avg requested averaging value + * @sa ACCEL_CONFIG1_ACCEL_FILT_AVG_t + * @return 0 on success, negative value on error. + */ +int inv_imu_set_accel_lp_avg(struct inv_imu_device *s, + ACCEL_CONFIG1_ACCEL_FILT_AVG_t acc_avg); + +/** @brief Set accel Low-Noise bandwidth value + * @param[in] acc_bw requested averaging value + * @sa ACCEL_CONFIG1_ACCEL_FILT_BW_t + * @return 0 on success, negative value on error. + */ +int inv_imu_set_accel_ln_bw(struct inv_imu_device *s, + ACCEL_CONFIG1_ACCEL_FILT_BW_t acc_bw); + +/** @brief Set gyro Low-Noise bandwidth value + * @param[in] gyr_bw requested averaging value + * @sa GYRO_CONFIG1_GYRO_FILT_BW_t + * @return 0 on success, negative value on error. + */ +int inv_imu_set_gyro_ln_bw(struct inv_imu_device *s, + GYRO_CONFIG1_GYRO_FILT_BW_t gyr_bw); + +/** @brief Set timestamp resolution + * @param[in] timestamp_resol requested timestamp resolution + * @sa TMST_CONFIG1_RESOL_t + * @return 0 on success, negative value on error. + */ +int inv_imu_set_timestamp_resolution(struct inv_imu_device *s, + const TMST_CONFIG1_RESOL_t timestamp_resol); + +/** @brief reset IMU fifo + * @return 0 on success, negative value on error. + */ +int inv_imu_reset_fifo(struct inv_imu_device *s); + +/** @brief Enable 20 bits raw acc and raw gyr data in fifo. + * @return 0 on success, negative return code otherwise + */ +int inv_imu_enable_high_resolution_fifo(struct inv_imu_device *s); + +/** @brief Disable 20 bits raw acc and raw gyr data in fifo. + * @return 0 on success, negative return code otherwise + */ +int inv_imu_disable_high_resolution_fifo(struct inv_imu_device *s); + + /** @brief Configure Fifo + * @param[in] fifo_config Fifo configuration method : + * if FIFO is enabled, data are pushed to FIFO and FIFO THS interrupt is set + * if FIFO is disabled, data are not pused to FIFO and DRDY interrupt is set + * @sa INV_IMU_FIFO_CONFIG_t + */ +int inv_imu_configure_fifo(struct inv_imu_device *s, + INV_IMU_FIFO_CONFIG_t fifo_config); + +/** @brief Get FIFO timestamp resolution + * @return the timestamp resolution in us as a q24 or 0 in case of error + */ +int32_t inv_imu_get_fifo_timestamp_resolution_us_q24(struct inv_imu_device *s); + +/** @brief Get register timestamp resolution + * @return the timestamp resolution in us as a q24 or 0 in case of error + */ +uint32_t inv_imu_get_reg_timestamp_resolution_us_q24(struct inv_imu_device *s); + +/** @brief Enable Wake On Motion. + * @param[in] wom_x_th threshold value for the Wake on Motion Interrupt for X-axis accelerometer. + * @param[in] wom_y_th threshold value for the Wake on Motion Interrupt for Y-axis accelerometer. + * @param[in] wom_z_th threshold value for the Wake on Motion Interrupt for Z-axis accelerometer. + * @param[in] wom_int select which mode between AND/OR is used to generate interrupt. + * @param[in] wom_dur select the number of overthreshold event to wait before generating interrupt. + * @return 0 on success, negative value on error. + */ +int inv_imu_configure_wom(struct inv_imu_device *s, + const uint8_t wom_x_th, + const uint8_t wom_y_th, + const uint8_t wom_z_th, + WOM_CONFIG_WOM_INT_MODE_t wom_int, + WOM_CONFIG_WOM_INT_DUR_t wom_dur); + +/** @brief Enable Wake On Motion. + * note : WoM requests to have the accelerometer enabled to work. + * As a consequence Fifo water-mark interrupt is disabled to only trigger WoM interrupts. + * To have good performance, it's recommended to set accelerometer ODR (Output Data Rate) to 20ms + * and the accelerometer in Low Power Mode. + * @return 0 on success, negative value on error. + */ +int inv_imu_enable_wom(struct inv_imu_device *s); + +/** @brief Disable Wake On Motion. + * note : Fifo water-mark interrupt is re-enabled when WoM is disabled. + * @return 0 on success, negative value on error. + */ +int inv_imu_disable_wom(struct inv_imu_device *s); + +/** @brief Start DMP for APEX algorithms and selftest + * @return 0 on success, negative value on error. + */ +int inv_imu_start_dmp(struct inv_imu_device *s); + +/** @brief Reset DMP for APEX algorithms and selftest + * @return 0 on success, negative value on error. + */ +int inv_imu_reset_dmp(struct inv_imu_device *s, + const APEX_CONFIG0_DMP_MEM_RESET_t sram_reset); + +/** @breif Set the UI endianness and set the inv_device endianness field + * @return 0 on success, negative value on error. + */ +int inv_imu_set_endianness(struct inv_imu_device *s, + INTF_CONFIG0_DATA_ENDIAN_t endianness); + +/** @breif Read the UI endianness and set the inv_device endianness field + * @return 0 on success, negative value on error. + */ +int inv_imu_get_endianness(struct inv_imu_device *s); + + /** @brief Configure Fifo decimation + * @param[in] requested decimation factor value from 2 to 256 + * @return 0 on success, negative value on error. + */ +int inv_imu_configure_fifo_data_rate(struct inv_imu_device *s, + FDR_CONFIG_FDR_SEL_t dec_factor); + +/** @brief Return driver version x.y.z-suffix as a char array + * @retval driver version a char array "x.y.z-suffix" + */ +const char * inv_imu_get_version(void); + +#ifdef __cplusplus +} +#endif + +#endif /* _INV_IMU_DRIVER_H_ */ + +/** @} */ diff --git a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_extfunc.h b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_extfunc.h similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_extfunc.h rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_extfunc.h index f31946a..83886d7 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_extfunc.h +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_extfunc.h @@ -1,64 +1,64 @@ -/* - * ________________________________________________________________________________________________________ - * Copyright (c) 2017 InvenSense Inc. All rights reserved. - * - * This software, related documentation and any modifications thereto (collectively "Software") is subject - * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright - * and other intellectual property rights laws. - * - * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software - * and any use, reproduction, disclosure or distribution of the Software without an express license agreement - * from InvenSense is strictly prohibited. - * - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS - * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED - * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL - * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY - * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, - * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE - * OF THE SOFTWARE. - * ________________________________________________________________________________________________________ - */ - -/** @defgroup DriverExt IMU driver extern functions - * @brief Extern functions for IMU devices - * @ingroup Driver - * @{ - */ - -/** @file inv_imu_extfunc.h - * Extern functions for IMU devices - */ - -#ifndef _INV_IMU_EXTFUNC_H_ -#define _INV_IMU_EXTFUNC_H_ - - -#include - -#ifdef __cplusplus -extern "C" { -#endif - - -/** @brief Hook for low-level high res system sleep() function to be implemented by upper layer - * ~100us resolution is sufficient - * @param[in] us number of us the calling thread should sleep - */ -extern void inv_imu_sleep_us(uint32_t us); - -/** @brief Hook for low-level high res system get_time() function to be implemented by upper layer - * Value shall be on 64bit with a 1 us resolution - * @return The current time in us - */ -extern uint64_t inv_imu_get_time_us(void); - - -#ifdef __cplusplus -} -#endif - -#endif /* _INV_IMU_EXTFUNC_H_ */ - -/** @} */ +/* + * ________________________________________________________________________________________________________ + * Copyright (c) 2017 InvenSense Inc. All rights reserved. + * + * This software, related documentation and any modifications thereto (collectively "Software") is subject + * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright + * and other intellectual property rights laws. + * + * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software + * and any use, reproduction, disclosure or distribution of the Software without an express license agreement + * from InvenSense is strictly prohibited. + * + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS + * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED + * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL + * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, + * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THE SOFTWARE. + * ________________________________________________________________________________________________________ + */ + +/** @defgroup DriverExt IMU driver extern functions + * @brief Extern functions for IMU devices + * @ingroup Driver + * @{ + */ + +/** @file inv_imu_extfunc.h + * Extern functions for IMU devices + */ + +#ifndef _INV_IMU_EXTFUNC_H_ +#define _INV_IMU_EXTFUNC_H_ + + +#include + +#ifdef __cplusplus +extern "C" { +#endif + + +/** @brief Hook for low-level high res system sleep() function to be implemented by upper layer + * ~100us resolution is sufficient + * @param[in] us number of us the calling thread should sleep + */ +extern void inv_imu_sleep_us(uint32_t us); + +/** @brief Hook for low-level high res system get_time() function to be implemented by upper layer + * Value shall be on 64bit with a 1 us resolution + * @return The current time in us + */ +extern uint64_t inv_imu_get_time_us(void); + + +#ifdef __cplusplus +} +#endif + +#endif /* _INV_IMU_EXTFUNC_H_ */ + +/** @} */ diff --git a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_regmap.h b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_regmap.h similarity index 96% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_regmap.h rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_regmap.h index 935b3df..954fd6b 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_regmap.h +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_regmap.h @@ -1,3391 +1,3391 @@ -/* - *________________________________________________________________________________________________________ - * Copyright (c) 2017 InvenSense Inc. All rights reserved. - * - * This software, related documentation and any modifications thereto (collectively "Software") is subject - * to InvenSense and its licensors intellectual property rights under U.S. and international copyright - * and other intellectual property rights laws. - * - * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software - * and any use, reproduction, disclosure or distribution of the Software without an express license agreement - * from InvenSense is strictly prohibited. - * - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS - * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED - * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL - * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY - * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, - * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE - OF THE SOFTWARE. - * ________________________________________________________________________________________________________ - */ -#ifndef _INV_IMU_REGMAP_H_ -#define _INV_IMU_REGMAP_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -/** @file inv_imu_regmap.h - * File exposing the device register map - */ - -#include - -/* forward declaration */ -struct inv_imu_device; - - - -/* ---------------------------------------------------------------------------- - * Device Register map - * - * Next macros defines address for all registers as listed by device - * datasheet. - * Macros name is with REGISTER_NAME being the name of - * the corresponding register in datasheet. - * Note that macro name is _Bx with x being the bank - * number for registers that are in bank 1 and further (suffix is ommitted for - * bank 0 registers) - * ---------------------------------------------------------------------------- */ - -/* BANK0 */ -#define MCLK_RDY 0x10000 -#define DEVICE_CONFIG 0x10001 -#define SIGNAL_PATH_RESET 0x10002 -#define DRIVE_CONFIG1 0x10003 -#define DRIVE_CONFIG2 0x10004 -#define DRIVE_CONFIG3 0x10005 -#define INT_CONFIG 0x10006 -#define TEMP_DATA1 0x10009 -#define TEMP_DATA0 0x1000a -#define ACCEL_DATA_X1 0x1000b -#define ACCEL_DATA_X0 0x1000c -#define ACCEL_DATA_Y1 0x1000d -#define ACCEL_DATA_Y0 0x1000e -#define ACCEL_DATA_Z1 0x1000f -#define ACCEL_DATA_Z0 0x10010 -#define GYRO_DATA_X1 0x10011 -#define GYRO_DATA_X0 0x10012 -#define GYRO_DATA_Y1 0x10013 -#define GYRO_DATA_Y0 0x10014 -#define GYRO_DATA_Z1 0x10015 -#define GYRO_DATA_Z0 0x10016 -#define TMST_FSYNCH 0x10017 -#define TMST_FSYNCL 0x10018 -#define APEX_DATA4 0x1001d -#define APEX_DATA5 0x1001e -#define PWR_MGMT0 0x1001f -#define GYRO_CONFIG0 0x10020 -#define ACCEL_CONFIG0 0x10021 -#define TEMP_CONFIG0 0x10022 -#define GYRO_CONFIG1 0x10023 -#define ACCEL_CONFIG1 0x10024 -#define APEX_CONFIG0 0x10025 -#define APEX_CONFIG1 0x10026 -#define WOM_CONFIG 0x10027 -#define FIFO_CONFIG1 0x10028 -#define FIFO_CONFIG2 0x10029 -#define FIFO_CONFIG3 0x1002a -#define INT_SOURCE0 0x1002b -#define INT_SOURCE1 0x1002c -#define INT_SOURCE3 0x1002d -#define INT_SOURCE4 0x1002e -#define FIFO_LOST_PKT0 0x1002f -#define FIFO_LOST_PKT1 0x10030 -#define APEX_DATA0 0x10031 -#define APEX_DATA1 0x10032 -#define APEX_DATA2 0x10033 -#define APEX_DATA3 0x10034 -#define INTF_CONFIG0 0x10035 -#define INTF_CONFIG1 0x10036 -#define INT_STATUS_DRDY 0x10039 -#define INT_STATUS 0x1003a -#define INT_STATUS2 0x1003b -#define INT_STATUS3 0x1003c -#define FIFO_COUNTH 0x1003d -#define FIFO_COUNTL 0x1003e -#define FIFO_DATA 0x1003f -#define WHO_AM_I 0x10075 -#define BLK_SEL_W 0x10079 -#define MADDR_W 0x1007a -#define M_W 0x1007b -#define BLK_SEL_R 0x1007c -#define MADDR_R 0x1007d -#define M_R 0x1007e - -/* MREG1 */ -#define TMST_CONFIG1_MREG1 0x00 -#define FIFO_CONFIG5_MREG1 0x01 -#define FIFO_CONFIG6_MREG1 0x02 -#define FSYNC_CONFIG_MREG1 0x03 -#define INT_CONFIG0_MREG1 0x04 -#define INT_CONFIG1_MREG1 0x05 -#define SENSOR_CONFIG3_MREG1 0x06 -#define ST_CONFIG_MREG1 0x13 -#define SELFTEST_MREG1 0x14 -#define INTF_CONFIG6_MREG1 0x23 -#define INTF_CONFIG10_MREG1 0x25 -#define INTF_CONFIG7_MREG1 0x28 -#define OTP_CONFIG_MREG1 0x2b -#define INT_SOURCE6_MREG1 0x2f -#define INT_SOURCE7_MREG1 0x30 -#define INT_SOURCE8_MREG1 0x31 -#define INT_SOURCE9_MREG1 0x32 -#define INT_SOURCE10_MREG1 0x33 -#define APEX_CONFIG2_MREG1 0x44 -#define APEX_CONFIG3_MREG1 0x45 -#define APEX_CONFIG4_MREG1 0x46 -#define APEX_CONFIG5_MREG1 0x47 -#define APEX_CONFIG9_MREG1 0x48 -#define APEX_CONFIG10_MREG1 0x49 -#define APEX_CONFIG11_MREG1 0x4a -#define ACCEL_WOM_X_THR_MREG1 0x4b -#define ACCEL_WOM_Y_THR_MREG1 0x4c -#define ACCEL_WOM_Z_THR_MREG1 0x4d -#define OFFSET_USER0_MREG1 0x4e -#define OFFSET_USER1_MREG1 0x4f -#define OFFSET_USER2_MREG1 0x50 -#define OFFSET_USER3_MREG1 0x51 -#define OFFSET_USER4_MREG1 0x52 -#define OFFSET_USER5_MREG1 0x53 -#define OFFSET_USER6_MREG1 0x54 -#define OFFSET_USER7_MREG1 0x55 -#define OFFSET_USER8_MREG1 0x56 -#define ST_STATUS1_MREG1 0x63 -#define ST_STATUS2_MREG1 0x64 -#define FDR_CONFIG_MREG1 0x66 -#define APEX_CONFIG12_MREG1 0x67 - -/* MREG3 */ -#define XA_ST_DATA_MREG3 0x5000 -#define YA_ST_DATA_MREG3 0x5001 -#define ZA_ST_DATA_MREG3 0x5002 -#define XG_ST_DATA_MREG3 0x5003 -#define YG_ST_DATA_MREG3 0x5004 -#define ZG_ST_DATA_MREG3 0x5005 - -/* MREG2 */ -#define OTP_CTRL7_MREG2 0x2806 - - -/* --------------------------------------------------------------------------- - * register BANK0 - * ---------------------------------------------------------------------------*/ - -/* - * MCLK_RDY - * Register Name : MCLK_RDY - */ - -/* - * mclk_rdy - * 0: Indicates internal clock is currently not running - * 1: Indicates internal clock is currently running - */ -#define MCLK_RDY_MCLK_RDY_POS 0x03 -#define MCLK_RDY_MCLK_RDY_MASK (0x01 << MCLK_RDY_MCLK_RDY_POS) - -/* - * DEVICE_CONFIG - * Register Name : DEVICE_CONFIG - */ - -/* - * spi_ap_4wire - * 0: AP interface uses 3-wire SPI mode - * 1: AP interface uses 4-wire SPI mode - */ -#define DEVICE_CONFIG_SPI_AP_4WIRE_POS 0x02 -#define DEVICE_CONFIG_SPI_AP_4WIRE_MASK (0x01 << DEVICE_CONFIG_SPI_AP_4WIRE_POS) - -/* - * spi_mode - * SPI mode selection - * - * 0: Mode 0 and Mode 3 - * 1: Mode 1 and Mode 2 - * - * If device is operating in non-SPI mode, user is not allowed to change the power-on default setting of this register. Change of this register setting will not take effect till AP_CS = 1. - */ -#define DEVICE_CONFIG_SPI_MODE_POS 0x00 -#define DEVICE_CONFIG_SPI_MODE_MASK 0x01 - - - -/* - * SIGNAL_PATH_RESET - * Register Name : SIGNAL_PATH_RESET - */ - -/* - * soft_reset_device_config - * Software Reset (auto clear bit) - * - * 0: Software reset not enabled - * 1: Software reset enabled - */ -#define SIGNAL_PATH_RESET_SOFT_RESET_DEVICE_CONFIG_POS 0x04 -#define SIGNAL_PATH_RESET_SOFT_RESET_DEVICE_CONFIG_MASK (0x01 << SIGNAL_PATH_RESET_SOFT_RESET_DEVICE_CONFIG_POS) - -/* - * fifo_flush - * When set to 1, FIFO will get flushed. - * FIFO flush requires the following programming sequence: - * • Write FIFO_FLUSH =1 - * • Wait for 1.5 µs - * • Read FIFO_FLUSH, it should now be 0 - * Host can only program this register bit to 1. - */ -#define SIGNAL_PATH_RESET_FIFO_FLUSH_POS 0x02 -#define SIGNAL_PATH_RESET_FIFO_FLUSH_MASK (0x01 << SIGNAL_PATH_RESET_FIFO_FLUSH_POS) - - - -/* - * DRIVE_CONFIG1 - * Register Name : DRIVE_CONFIG1 - */ - -/* - * i3c_ddr_slew_rate - * Controls slew rate for output pin 14 when device is in I3CSM DDR protocol. - * While in I3CSM operation, the device automatically switches to use I3C_DDR_SLEW_RATE after receiving ENTHDR0 ccc command from the host. The device automatically switches back to I3C_SDR_SLEW_RATE after the host issues HDR_EXIT pattern. - * - * 000: MIN: 20 ns; TYP: 40 ns; MAX: 60 ns - * 001: MIN: 12 ns; TYP: 24 ns; MAX: 36 ns - * 010: MIN: 6 ns; TYP: 12 ns; MAX: 19 ns - * 011: MIN: 4 ns; TYP: 8 ns; MAX: 14 ns - * 100: MIN: 2 ns; TYP: 4 ns; MAX: 8 ns - * 101: MAX: 2 ns - * 110: Reserved - * 111: Reserved - * - * This register field should not be programmed in I3C/DDR mode. - */ -#define DRIVE_CONFIG1_I3C_DDR_SLEW_RATE_POS 0x03 -#define DRIVE_CONFIG1_I3C_DDR_SLEW_RATE_MASK (0x07 << DRIVE_CONFIG1_I3C_DDR_SLEW_RATE_POS) - -/* - * i3c_sdr_slew_rate - * Controls slew rate for output pin 14 in I3CSM SDR protocol. - * After device reset, I2C_SLEW_RATE is used by default. If I3CSM feature is enabled, the device automatically switches to use I3C_SDR_SLEW_RATE after receiving 0x7E+W message (an I3CSM broadcast message). - * - * 000: MIN: 20 ns; TYP: 40 ns; MAX: 60 ns - * 001: MIN: 12 ns; TYP: 24 ns; MAX: 36 ns - * 010: MIN: 6 ns; TYP: 12 ns; MAX: 19 ns - * 011: MIN: 4 ns; TYP: 8 ns; MAX: 14 ns - * 100: MIN: 2 ns; TYP: 4 ns; MAX: 8 ns - * 101: MAX: 2 ns - * 110: Reserved - * 111: Reserved - * - * This register field should not be programmed in I3C/DDR mode - */ -#define DRIVE_CONFIG1_I3C_SDR_SLEW_RATE_POS 0x00 -#define DRIVE_CONFIG1_I3C_SDR_SLEW_RATE_MASK 0x07 - - - -/* - * DRIVE_CONFIG2 - * Register Name : DRIVE_CONFIG2 - */ - -/* - * i2c_slew_rate - * Controls slew rate for output pin 14 in I2C mode. - * After device reset, the I2C_SLEW_RATE is used by default. If the 1st write operation from host is an SPI transaction, the device automatically switches to SPI_SLEW_RATE. If I3CSM feature is enabled, the device automatically switches to I3C_SDR_SLEW_RATE after receiving 0x7E+W message (an I3C broadcast message). - * - * 000: MIN: 20 ns; TYP: 40 ns; MAX: 60 ns - * 001: MIN: 12 ns; TYP: 24 ns; MAX: 36 ns - * 010: MIN: 6 ns; TYP: 12 ns; MAX: 19 ns - * 011: MIN: 4 ns; TYP: 8 ns; MAX: 14 ns - * 100: MIN: 2 ns; TYP: 4 ns; MAX: 8 ns - * 101: MAX: 2 ns - * 110: Reserved - * 111: Reserved - * - * This register field should not be programmed in I3C/DDR mode - */ -#define DRIVE_CONFIG2_I2C_SLEW_RATE_POS 0x03 -#define DRIVE_CONFIG2_I2C_SLEW_RATE_MASK (0x07 << DRIVE_CONFIG2_I2C_SLEW_RATE_POS) - -/* - * all_slew_rate - * Configure drive strength for all output pins in all modes (SPI3, SPI4, I2C, I3CSM) excluding pin 14. - * - * 000: MIN: 20 ns; TYP: 40 ns; MAX: 60 ns - * 001: MIN: 12 ns; TYP: 24 ns; MAX: 36 ns - * 010: MIN: 6 ns; TYP: 12 ns; MAX: 19 ns - * 011: MIN: 4 ns; TYP: 8 ns; MAX: 14 ns - * 100: MIN: 2 ns; TYP: 4 ns; MAX: 8 ns - * 101: MAX: 2 ns - * 110: Reserved - * 111: Reserved - * - * This register field should not be programmed in I3C/DDR mode - */ -#define DRIVE_CONFIG2_ALL_SLEW_RATE_POS 0x00 -#define DRIVE_CONFIG2_ALL_SLEW_RATE_MASK 0x07 - - - -/* - * DRIVE_CONFIG3 - * Register Name : DRIVE_CONFIG3 - */ - -/* - * spi_slew_rate - * Controls slew rate for output pin 14 in SPI 3-wire mode. In SPI 4-wire mode this register controls the slew rate of pin 1 as it is used as an output in SPI 4-wire mode only. After chip reset, the I2C_SLEW_RATE is used by default for pin 14 pin. If the 1st write operation from the host is an SPI3/4 transaction, the device automatically switches to SPI_SLEW_RATE. - * - * 000: MIN: 20 ns; TYP: 40 ns; MAX: 60 ns - * 001: MIN: 12 ns; TYP: 24 ns; MAX: 36 ns - * 010: MIN: 6 ns; TYP: 12 ns; MAX: 19 ns - * 011: MIN: 4 ns; TYP: 8 ns; MAX: 14 ns - * 100: MIN: 2 ns; TYP: 4 ns; MAX: 8 ns - * 101: MAX: 2 ns - * 110: Reserved - * 111: Reserved - * - * This register field should not be programmed in I3C/DDR mode - */ -#define DRIVE_CONFIG3_SPI_SLEW_RATE_POS 0x00 -#define DRIVE_CONFIG3_SPI_SLEW_RATE_MASK 0x07 - - - -/* - * INT_CONFIG - * Register Name : INT_CONFIG - */ - -/* - * int2_mode - * Interrupt mode and drive circuit shall be configurable by register. - * Interrupt Mode - * 1: Latched Mode - * 0: Pulsed Mode - */ -#define INT_CONFIG_INT2_MODE_POS 0x05 -#define INT_CONFIG_INT2_MODE_MASK (0x01 << INT_CONFIG_INT2_MODE_POS) - -/* - * int2_drive_circuit - * Interrupt mode and drive circuit shall be configurable by register. - * Drive Circuit - * 1: Push-Pull - * 0: Open drain - */ -#define INT_CONFIG_INT2_DRIVE_CIRCUIT_POS 0x04 -#define INT_CONFIG_INT2_DRIVE_CIRCUIT_MASK (0x01 << INT_CONFIG_INT2_DRIVE_CIRCUIT_POS) - -/* - * int2_polarity - * Interrupt mode and drive circuit shall be configurable by register. - * Interrupt Polarity - * 1: Active High - * 0: Active Low - */ -#define INT_CONFIG_INT2_POLARITY_POS 0x03 -#define INT_CONFIG_INT2_POLARITY_MASK (0x01 << INT_CONFIG_INT2_POLARITY_POS) - -/* - * int1_mode - * Interrupt mode and drive circuit shall be configurable by register. - * Interrupt Mode - * 1: Latched Mode - * 0: Pulsed Mode - */ -#define INT_CONFIG_INT1_MODE_POS 0x02 -#define INT_CONFIG_INT1_MODE_MASK (0x01 << INT_CONFIG_INT1_MODE_POS) - -/* - * int1_drive_circuit - * Interrupt mode and drive circuit shall be configurable by register. - * Drive Circuit - * 1: Push-Pull - * 0: Open drain - */ -#define INT_CONFIG_INT1_DRIVE_CIRCUIT_POS 0x01 -#define INT_CONFIG_INT1_DRIVE_CIRCUIT_MASK (0x01 << INT_CONFIG_INT1_DRIVE_CIRCUIT_POS) - -/* - * int1_polarity - * Interrupt mode and drive circuit shall be configurable by register. - * Interrupt Polarity - * 1: Active High - * 0: Active Low - */ -#define INT_CONFIG_INT1_POLARITY_POS 0x00 -#define INT_CONFIG_INT1_POLARITY_MASK 0x01 - - - -/* - * TEMP_DATA1 - * Register Name : TEMP_DATA1 - */ - -/* - * temp_data - * Temperature data - */ -#define TEMP_DATA1_TEMP_DATA_POS 0x00 -#define TEMP_DATA1_TEMP_DATA_MASK 0xff - - - -/* - * TEMP_DATA0 - * Register Name : TEMP_DATA0 - */ - -/* - * temp_data - * Temperature data - */ -#define TEMP_DATA0_TEMP_DATA_POS 0x00 -#define TEMP_DATA0_TEMP_DATA_MASK 0xff - - - -/* - * ACCEL_DATA_X1 - * Register Name : ACCEL_DATA_X1 - */ - -/* - * accel_data_x - * Accel X axis data - */ -#define ACCEL_DATA_X1_ACCEL_DATA_X_POS 0x00 -#define ACCEL_DATA_X1_ACCEL_DATA_X_MASK 0xff - - - -/* - * ACCEL_DATA_X0 - * Register Name : ACCEL_DATA_X0 - */ - -/* - * accel_data_x - * Accel X axis data - */ -#define ACCEL_DATA_X0_ACCEL_DATA_X_POS 0x00 -#define ACCEL_DATA_X0_ACCEL_DATA_X_MASK 0xff - - - -/* - * ACCEL_DATA_Y1 - * Register Name : ACCEL_DATA_Y1 - */ - -/* - * accel_data_y - * Accel Y axis data - */ -#define ACCEL_DATA_Y1_ACCEL_DATA_Y_POS 0x00 -#define ACCEL_DATA_Y1_ACCEL_DATA_Y_MASK 0xff - - - -/* - * ACCEL_DATA_Y0 - * Register Name : ACCEL_DATA_Y0 - */ - -/* - * accel_data_y - * Accel Y axis data - */ -#define ACCEL_DATA_Y0_ACCEL_DATA_Y_POS 0x00 -#define ACCEL_DATA_Y0_ACCEL_DATA_Y_MASK 0xff - - - -/* - * ACCEL_DATA_Z1 - * Register Name : ACCEL_DATA_Z1 - */ - -/* - * accel_data_z - * Accel Z axis data - */ -#define ACCEL_DATA_Z1_ACCEL_DATA_Z_POS 0x00 -#define ACCEL_DATA_Z1_ACCEL_DATA_Z_MASK 0xff - - - -/* - * ACCEL_DATA_Z0 - * Register Name : ACCEL_DATA_Z0 - */ - -/* - * accel_data_z - * Accel Z axis data - */ -#define ACCEL_DATA_Z0_ACCEL_DATA_Z_POS 0x00 -#define ACCEL_DATA_Z0_ACCEL_DATA_Z_MASK 0xff - - - -/* - * GYRO_DATA_X1 - * Register Name : GYRO_DATA_X1 - */ - -/* - * gyro_data_x - * Gyro X axis data - */ -#define GYRO_DATA_X1_GYRO_DATA_X_POS 0x00 -#define GYRO_DATA_X1_GYRO_DATA_X_MASK 0xff - - - -/* - * GYRO_DATA_X0 - * Register Name : GYRO_DATA_X0 - */ - -/* - * gyro_data_x - * Gyro X axis data - */ -#define GYRO_DATA_X0_GYRO_DATA_X_POS 0x00 -#define GYRO_DATA_X0_GYRO_DATA_X_MASK 0xff - - - -/* - * GYRO_DATA_Y1 - * Register Name : GYRO_DATA_Y1 - */ - -/* - * gyro_data_y - * Gyro Y axis data - */ -#define GYRO_DATA_Y1_GYRO_DATA_Y_POS 0x00 -#define GYRO_DATA_Y1_GYRO_DATA_Y_MASK 0xff - - - -/* - * GYRO_DATA_Y0 - * Register Name : GYRO_DATA_Y0 - */ - -/* - * gyro_data_y - * Gyro Y axis data - */ -#define GYRO_DATA_Y0_GYRO_DATA_Y_POS 0x00 -#define GYRO_DATA_Y0_GYRO_DATA_Y_MASK 0xff - - - -/* - * GYRO_DATA_Z1 - * Register Name : GYRO_DATA_Z1 - */ - -/* - * gyro_data_z - * Gyro Z axis data - */ -#define GYRO_DATA_Z1_GYRO_DATA_Z_POS 0x00 -#define GYRO_DATA_Z1_GYRO_DATA_Z_MASK 0xff - - - -/* - * GYRO_DATA_Z0 - * Register Name : GYRO_DATA_Z0 - */ - -/* - * gyro_data_z - * Gyro Z axis data - */ -#define GYRO_DATA_Z0_GYRO_DATA_Z_POS 0x00 -#define GYRO_DATA_Z0_GYRO_DATA_Z_MASK 0xff - - - -/* - * TMST_FSYNCH - * Register Name : TMST_FSYNCH - */ - -/* - * tmst_fsync_data - * Stores the time delta from the rising edge of FSYNC to the latest ODR until the UI Interface reads the FSYNC tag in the status register - */ -#define TMST_FSYNCH_TMST_FSYNC_DATA_POS 0x00 -#define TMST_FSYNCH_TMST_FSYNC_DATA_MASK 0xff - - - -/* - * TMST_FSYNCL - * Register Name : TMST_FSYNCL - */ - -/* - * tmst_fsync_data - * Stores the time delta from the rising edge of FSYNC to the latest ODR until the UI Interface reads the FSYNC tag in the status register - */ -#define TMST_FSYNCL_TMST_FSYNC_DATA_POS 0x00 -#define TMST_FSYNCL_TMST_FSYNC_DATA_MASK 0xff - - - -/* - * APEX_DATA4 - * Register Name : APEX_DATA4 - */ - -/* - * ff_dur - * Free Fall duration. The duration is given in number of samples and it can be converted to freefall distance by applying the following formula: - * ff_distance = 0.5*9.81*(ff_duration*dmp_odr_s)^2) - * Note: dmp_odr_s in the duration of DMP_ODR expressed in seconds. - */ -#define APEX_DATA4_FF_DUR_POS 0x00 -#define APEX_DATA4_FF_DUR_MASK 0xff - - - -/* - * APEX_DATA5 - * Register Name : APEX_DATA5 - */ - -/* - * ff_dur - * Free Fall duration. The duration is given in number of samples and it can be converted to freefall distance by applying the following formula: - * ff_distance = 0.5*9.81*(ff_duration*dmp_odr_s)^2) - * Note: dmp_odr_s in the duration of DMP_ODR expressed in seconds. - */ -#define APEX_DATA5_FF_DUR_POS 0x00 -#define APEX_DATA5_FF_DUR_MASK 0xff - - - -/* - * PWR_MGMT0 - * Register Name : PWR_MGMT0 - */ - -/* - * accel_lp_clk_sel - * 0: Accelerometer LP mode uses Wake Up oscillator clock. This is the lowest power consumption mode and it is the recommended setting. - * 1: Accelerometer LP mode uses RC oscillator clock. - * - * This field can be changed on-the-fly even if accel sensor is on. - */ -#define PWR_MGMT0_ACCEL_LP_CLK_SEL_POS 0x07 -#define PWR_MGMT0_ACCEL_LP_CLK_SEL_MASK (0x01 << PWR_MGMT0_ACCEL_LP_CLK_SEL_POS) - -/* - * idle - * If this bit is set to 1, the RC oscillator is powered on even if Accel and Gyro are powered off. - * Nominally this bit is set to 0, so when Accel and Gyro are powered off, - * the chip will go to OFF state , since the RC oscillator will also be powered off. - * - * This field can be changed on-the-fly even if a sensor is already on - */ -#define PWR_MGMT0_IDLE_POS 0x04 -#define PWR_MGMT0_IDLE_MASK (0x01 << PWR_MGMT0_IDLE_POS) - -/* - * gyro_mode - * 00: Turns gyroscope off - * 01: Places gyroscope in Standby Mode - * 10: Reserved - * 11: Places gyroscope in Low Noise (LN) Mode - * - * Gyroscope needs to be kept ON for a minimum of 45ms. When transitioning from OFF to any of the other modes, do not issue any register writes for 200 µs. - * - * This field can be changed on-the-fly even if gyro sensor is on - */ -#define PWR_MGMT0_GYRO_MODE_POS 0x02 -#define PWR_MGMT0_GYRO_MODE_MASK (0x03 << PWR_MGMT0_GYRO_MODE_POS) - -/* - * accel_mode - * 00: Turns accelerometer off - * 01: Turns accelerometer off - * 10: Places accelerometer in Low Power (LP) Mode - * 11: Places accelerometer in Low Noise (LN) Mode - * - * When selecting LP Mode please refer to ACCEL_LP_CLK_SEL setting, bit[7] of this register. - * - * Before entering LP mode and during LP Mode the following combinations of ODR and averaging are not permitted: - * 1) ODR=1600 Hz or ODR=800 Hz: any averaging. - * 2) ODR=400 Hz: averaging=16x, 32x or 64x. - * 3) ODR=200 Hz: averaging=64x. - * - * When transitioning from OFF to any of the other modes, do not issue any register writes for 200 µs. - * - * This field can be changed on-the-fly even if accel sensor is on - */ -#define PWR_MGMT0_ACCEL_MODE_POS 0x00 -#define PWR_MGMT0_ACCEL_MODE_MASK 0x03 - - - -/* - * GYRO_CONFIG0 - * Register Name : GYRO_CONFIG0 - */ - -/* - * gyro_ui_fs_sel - * Full scale select for gyroscope UI interface output - * - * 00: ±2000 dps - * 01: ±1000 dps - * 10: ±500 dps - * 11: ±250 dps - * - * This field can be changed on-the-fly even if gyro sensor is on - */ -#define GYRO_CONFIG0_GYRO_UI_FS_SEL_POS 0x05 -#define GYRO_CONFIG0_GYRO_UI_FS_SEL_MASK (0x03 << GYRO_CONFIG0_GYRO_UI_FS_SEL_POS) - -/* - * gyro_odr - * Gyroscope ODR selection for UI interface output - * - * 0000: Reserved - * 0001: Reserved - * 0010: Reserved - * 0011: Reserved - * 0100: Reserved - * 0101: 1.6k Hz - * 0110: 800 Hz - * 0111: 400 Hz - * 1000: 200 Hz - * 1001: 100 Hz - * 1010: 50 Hz - * 1011: 25 Hz - * 1100: 12.5 Hz - * 1101: Reserved - * 1110: Reserved - * 1111: Reserved - * - * This field can be changed on-the-fly even if gyro sensor is on - */ -#define GYRO_CONFIG0_GYRO_ODR_POS 0x00 -#define GYRO_CONFIG0_GYRO_ODR_MASK 0x0f - - - -/* - * ACCEL_CONFIG0 - * Register Name : ACCEL_CONFIG0 - */ - -/* - * accel_ui_fs_sel - * Full scale select for accelerometer UI interface output - * - * 00: ±16g - * 01: ±8g - * 10: ±4g - * 11: ±2g - * - * This field can be changed on-the-fly even if accel sensor is on - */ -#define ACCEL_CONFIG0_ACCEL_UI_FS_SEL_POS 0x05 -#define ACCEL_CONFIG0_ACCEL_UI_FS_SEL_MASK (0x03 << ACCEL_CONFIG0_ACCEL_UI_FS_SEL_POS) - -/* - * accel_odr - * Accelerometer ODR selection for UI interface output - * - * 0000: Reserved - * 0001: Reserved - * 0010: Reserved - * 0011: Reserved - * 0100: Reserved - * 0101: 1.6 kHz (LN mode) - * 0110: 800 Hz (LN mode) - * 0111: 400 Hz (LP or LN mode) - * 1000: 200 Hz (LP or LN mode) - * 1001: 100 Hz (LP or LN mode) - * 1010: 50 Hz (LP or LN mode) - * 1011: 25 Hz (LP or LN mode) - * 1100: 12.5 Hz (LP or LN mode) - * 1101: 6.25 Hz (LP mode) - * 1110: 3.125 Hz (LP mode) - * 1111: 1.5625 Hz (LP mode) - * - * This field can be changed on-the-fly when accel sensor is on - */ -#define ACCEL_CONFIG0_ACCEL_ODR_POS 0x00 -#define ACCEL_CONFIG0_ACCEL_ODR_MASK 0x0f - - - -/* - * TEMP_CONFIG0 - * Register Name : TEMP_CONFIG0 - */ - -/* - * temp_filt_bw - * Sets the bandwidth of the temperature signal DLPF - * - * 000: DLPF bypassed - * 001: DLPF BW = 180 Hz - * 010: DLPF BW = 72 Hz - * 011: DLPF BW = 34 Hz - * 100: DLPF BW = 16 Hz - * 101: DLPF BW = 8 Hz - * 110: DLPF BW = 4 Hz - * 111: DLPF BW = 4 Hz - * - * This field can be changed on-the-fly even if sensor is on - */ -#define TEMP_CONFIG0_TEMP_FILT_BW_POS 0x04 -#define TEMP_CONFIG0_TEMP_FILT_BW_MASK (0x07 << TEMP_CONFIG0_TEMP_FILT_BW_POS) - - - -/* - * GYRO_CONFIG1 - * Register Name : GYRO_CONFIG1 - */ - -/* - * gyro_ui_filt_bw - * Selects GYRO UI low pass filter bandwidth - * - * 000: Low pass filter bypassed - * 001: 180 Hz - * 010: 121 Hz - * 011: 73 Hz - * 100: 53 Hz - * 101: 34 Hz - * 110: 25 Hz - * 111: 16 Hz - * - * This field can be changed on-the-fly even if gyro sensor is on - */ -#define GYRO_CONFIG1_GYRO_UI_FILT_BW_POS 0x00 -#define GYRO_CONFIG1_GYRO_UI_FILT_BW_MASK 0x07 - - - -/* - * ACCEL_CONFIG1 - * Register Name : ACCEL_CONFIG1 - */ - -/* - * accel_ui_avg - * Selects averaging filter setting to create accelerometer output in accelerometer low power mode (LPM) - * - * 000: 2x average - * 001: 4x average - * 010: 8x average - * 011: 16x average - * 100: 32x average - * 101: 64x average - * 110: 64x average - * 111: 64x average - * - * This field cannot be changed when the accel sensor is in LPM - */ -#define ACCEL_CONFIG1_ACCEL_UI_AVG_POS 0x04 -#define ACCEL_CONFIG1_ACCEL_UI_AVG_MASK (0x07 << ACCEL_CONFIG1_ACCEL_UI_AVG_POS) - -/* - * accel_ui_filt_bw - * Selects ACCEL UI low pass filter bandwidth - * - * 000: Low pass filter bypassed - * 001: 180 Hz - * 010: 121 Hz - * 011: 73 Hz - * 100: 53 Hz - * 101: 34 Hz - * 110: 25 Hz - * 111: 16 Hz - * - * This field can be changed on-the-fly even if accel sensor is on - */ -#define ACCEL_CONFIG1_ACCEL_UI_FILT_BW_POS 0x00 -#define ACCEL_CONFIG1_ACCEL_UI_FILT_BW_MASK 0x07 - - - -/* - * APEX_CONFIG0 - * Register Name : APEX_CONFIG0 - */ - -/* - * dmp_power_save_en - * When this bit is set to 1, power saving is enabled for DMP algorithms - */ -#define APEX_CONFIG0_DMP_POWER_SAVE_EN_POS 0x03 -#define APEX_CONFIG0_DMP_POWER_SAVE_EN_MASK (0x01 << APEX_CONFIG0_DMP_POWER_SAVE_EN_POS) - -/* - * dmp_init_en - * When this bit is set to 1, DMP runs DMP SW initialization procedure. Bit is reset by hardware when the procedure is finished. All other APEX features are ignored as long as DMP_INIT_EN is set. - * - * This field can be changed on-the-fly even if accel sensor is on. - */ -#define APEX_CONFIG0_DMP_INIT_EN_POS 0x02 -#define APEX_CONFIG0_DMP_INIT_EN_MASK (0x01 << APEX_CONFIG0_DMP_INIT_EN_POS) - -/* - * dmp_mem_reset_en - * When this bit is set to 1, it clears DMP SRAM for APEX operation or Self-test operation. - */ -#define APEX_CONFIG0_DMP_MEM_RESET_EN_POS 0x00 -#define APEX_CONFIG0_DMP_MEM_RESET_EN_MASK 0x03 - - - -/* - * APEX_CONFIG1 - * Register Name : APEX_CONFIG1 - */ - -/* - * smd_enable - * 0: Significant Motion Detection not enabled - * 1: Significant Motion Detection enabled - * - * This field can be changed on-the-fly even if accel sensor is on - */ -#define APEX_CONFIG1_SMD_ENABLE_POS 0x06 -#define APEX_CONFIG1_SMD_ENABLE_MASK (0x01 << APEX_CONFIG1_SMD_ENABLE_POS) - -/* - * ff_enable - * 0: Freefall Detection not enabled - * 1: Freefall Detection enabled - * - * This field can be changed on-the-fly even if accel sensor is on - */ -#define APEX_CONFIG1_FF_ENABLE_POS 0x05 -#define APEX_CONFIG1_FF_ENABLE_MASK (0x01 << APEX_CONFIG1_FF_ENABLE_POS) - -/* - * tilt_enable - * 0: Tilt Detection not enabled - * 1: Tilt Detection enabled - * - * This field can be changed on-the-fly even if accel sensor is on - */ -#define APEX_CONFIG1_TILT_ENABLE_POS 0x04 -#define APEX_CONFIG1_TILT_ENABLE_MASK (0x01 << APEX_CONFIG1_TILT_ENABLE_POS) - -/* - * ped_enable - * 0: Pedometer not enabled - * 1: Pedometer enabled - * - * This field can be changed on-the-fly even if accel sensor is on - */ -#define APEX_CONFIG1_PED_ENABLE_POS 0x03 -#define APEX_CONFIG1_PED_ENABLE_MASK (0x01 << APEX_CONFIG1_PED_ENABLE_POS) - -/* - * dmp_odr - * 00: 25 Hz - * 01: 400 Hz - * 10: 50 Hz - * 11: 100 Hz - * - * The ACCEL_ODR field must be configured to an ODR equal or greater to the DMP_ODR field, for correct device operation. - * - * This field can be changed on-the-fly even if accel sensor is on - */ -#define APEX_CONFIG1_DMP_ODR_POS 0x00 -#define APEX_CONFIG1_DMP_ODR_MASK 0x03 - - - -/* - * WOM_CONFIG - * Register Name : WOM_CONFIG - */ - -/* - * wom_int_dur - * Selects Wake on Motion interrupt assertion from among the following options - * - * 00: WoM interrupt asserted at first overthreshold event - * 01: WoM interrupt asserted at second overthreshold event - * 10: WoM interrupt asserted at third overthreshold event - * 11: WoM interrupt asserted at fourth overthreshold event - * - * This field can be changed on-the-fly even if accel sensor is on, but it cannot be changed if WOM_EN is already enabled - */ -#define WOM_CONFIG_WOM_INT_DUR_POS 0x03 -#define WOM_CONFIG_WOM_INT_DUR_MASK (0x03 << WOM_CONFIG_WOM_INT_DUR_POS) - -/* - * wom_int_mode - * 0: Set WoM interrupt on the OR of all enabled accelerometer thresholds - * 1: Set WoM interrupt on the AND of all enabled accelerometer thresholds - * - * This field can be changed on-the-fly even if accel sensor is on, but it cannot be changed if WOM_EN is already enabled - */ -#define WOM_CONFIG_WOM_INT_MODE_POS 0x02 -#define WOM_CONFIG_WOM_INT_MODE_MASK (0x01 << WOM_CONFIG_WOM_INT_MODE_POS) - -/* - * wom_mode - * 0 - Initial sample is stored. Future samples are compared to initial sample - * 1 - Compare current sample to previous sample - * - * This field can be changed on-the-fly even if accel sensor is already on, but it cannot be changed if wom_en is already enabled. - */ -#define WOM_CONFIG_WOM_MODE_POS 0x01 -#define WOM_CONFIG_WOM_MODE_MASK (0x01 << WOM_CONFIG_WOM_MODE_POS) - -/* - * wom_en - * 1: enable wake-on-motion detection. - * 0: disable wake-on-motion detection. - * - * This field can be changed on-the-fly even if accel sensor is already on. - */ -#define WOM_CONFIG_WOM_EN_POS 0x00 -#define WOM_CONFIG_WOM_EN_MASK 0x01 - - - -/* - * FIFO_CONFIG1 - * Register Name : FIFO_CONFIG1 - */ - -/* - * fifo_mode - * FIFO mode control - * - * 0: Stream-to-FIFO Mode - * 1: STOP-on-FULL Mode - */ -#define FIFO_CONFIG1_FIFO_MODE_POS 0x01 -#define FIFO_CONFIG1_FIFO_MODE_MASK (0x01 << FIFO_CONFIG1_FIFO_MODE_POS) - -/* - * fifo_bypass - * FIFO bypass control - * 0: FIFO is not bypassed - * 1: FIFO is bypassed - */ -#define FIFO_CONFIG1_FIFO_BYPASS_POS 0x00 -#define FIFO_CONFIG1_FIFO_BYPASS_MASK 0x01 - - - -/* - * FIFO_CONFIG2 - * Register Name : FIFO_CONFIG2 - */ - -/* - * fifo_wm - * FIFO watermark. Generate interrupt when the FIFO reaches or exceeds FIFO_WM size in bytes or records according to FIFO_COUNT_FORMAT setting. FIFO_WM_EN must be zero before writing this register. Interrupt only fires once. This register should be set to non-zero value, before choosing this interrupt source. - * - * This field should be changed when FIFO is empty to avoid spurious interrupts. - */ -#define FIFO_CONFIG2_FIFO_WM_POS 0x00 -#define FIFO_CONFIG2_FIFO_WM_MASK 0xff - - - -/* - * FIFO_CONFIG3 - * Register Name : FIFO_CONFIG3 - */ - -/* - * fifo_wm - * FIFO watermark. Generate interrupt when the FIFO reaches or exceeds FIFO_WM size in bytes or records according to FIFO_COUNT_FORMAT setting. FIFO_WM_EN must be zero before writing this register. Interrupt only fires once. This register should be set to non-zero value, before choosing this interrupt source. - * - * This field should be changed when FIFO is empty to avoid spurious interrupts. - */ -#define FIFO_CONFIG3_FIFO_WM_POS 0x00 -#define FIFO_CONFIG3_FIFO_WM_MASK 0x0f - - - -/* - * INT_SOURCE0 - * Register Name : INT_SOURCE0 - */ - -/* - * st_int1_en - * 0: Self-Test Done interrupt not routed to INT1 - * 1: Self-Test Done interrupt routed to INT1 - */ -#define INT_SOURCE0_ST_INT1_EN_POS 0x07 -#define INT_SOURCE0_ST_INT1_EN_MASK (0x01 << INT_SOURCE0_ST_INT1_EN_POS) - -/* - * fsync_int1_en - * 0: FSYNC interrupt not routed to INT1 - * 1: FSYNC interrupt routed to INT1 - */ -#define INT_SOURCE0_FSYNC_INT1_EN_POS 0x06 -#define INT_SOURCE0_FSYNC_INT1_EN_MASK (0x01 << INT_SOURCE0_FSYNC_INT1_EN_POS) - -/* - * pll_rdy_int1_en - * 0: PLL ready interrupt not routed to INT1 - * 1: PLL ready interrupt routed to INT1 - */ -#define INT_SOURCE0_PLL_RDY_INT1_EN_POS 0x05 -#define INT_SOURCE0_PLL_RDY_INT1_EN_MASK (0x01 << INT_SOURCE0_PLL_RDY_INT1_EN_POS) - -/* - * reset_done_int1_en - * 0: Reset done interrupt not routed to INT1 - * 1: Reset done interrupt routed to INT1 - */ -#define INT_SOURCE0_RESET_DONE_INT1_EN_POS 0x04 -#define INT_SOURCE0_RESET_DONE_INT1_EN_MASK (0x01 << INT_SOURCE0_RESET_DONE_INT1_EN_POS) - -/* - * drdy_int1_en - * 0: Data Ready interrupt not routed to INT1 - * 1: Data Ready interrupt routed to INT1 - */ -#define INT_SOURCE0_DRDY_INT1_EN_POS 0x03 -#define INT_SOURCE0_DRDY_INT1_EN_MASK (0x01 << INT_SOURCE0_DRDY_INT1_EN_POS) - -/* - * fifo_ths_int1_en - * 0: FIFO threshold interrupt not routed to INT1 - * 1: FIFO threshold interrupt routed to INT1 - */ -#define INT_SOURCE0_FIFO_THS_INT1_EN_POS 0x02 -#define INT_SOURCE0_FIFO_THS_INT1_EN_MASK (0x01 << INT_SOURCE0_FIFO_THS_INT1_EN_POS) - -/* - * fifo_full_int1_en - * 0: FIFO full interrupt not routed to INT1 - * 1: FIFO full interrupt routed to INT1 - * To avoid FIFO FULL interrupts while reading FIFO, this bit should be disabled while reading FIFO - */ -#define INT_SOURCE0_FIFO_FULL_INT1_EN_POS 0x01 -#define INT_SOURCE0_FIFO_FULL_INT1_EN_MASK (0x01 << INT_SOURCE0_FIFO_FULL_INT1_EN_POS) - -/* - * agc_rdy_int1_en - * 0: UI AGC ready interrupt not routed to INT1 - * 1: UI AGC ready interrupt routed to INT1 - */ -#define INT_SOURCE0_AGC_RDY_INT1_EN_POS 0x00 -#define INT_SOURCE0_AGC_RDY_INT1_EN_MASK 0x01 - - - -/* - * INT_SOURCE1 - * Register Name : INT_SOURCE1 - */ - -/* - * i3c_protocol_error_int1_en - * 0: I3CSM protocol error interrupt not routed to INT1 - * 1: I3CSM protocol error interrupt routed to INT1 - */ -#define INT_SOURCE1_I3C_PROTOCOL_ERROR_INT1_EN_POS 0x06 -#define INT_SOURCE1_I3C_PROTOCOL_ERROR_INT1_EN_MASK (0x01 << INT_SOURCE1_I3C_PROTOCOL_ERROR_INT1_EN_POS) - -/* - * smd_int1_en - * 0: SMD interrupt not routed to INT1 - * 1: SMD interrupt routed to INT1 - */ -#define INT_SOURCE1_SMD_INT1_EN_POS 0x03 -#define INT_SOURCE1_SMD_INT1_EN_MASK (0x01 << INT_SOURCE1_SMD_INT1_EN_POS) - -/* - * wom_z_int1_en - * 0: Z-axis WOM interrupt not routed to INT1 - * 1: Z-axis WOM interrupt routed to INT1 - */ -#define INT_SOURCE1_WOM_Z_INT1_EN_POS 0x02 -#define INT_SOURCE1_WOM_Z_INT1_EN_MASK (0x01 << INT_SOURCE1_WOM_Z_INT1_EN_POS) - -/* - * wom_y_int1_en - * 0: Y-axis WOM interrupt not routed to INT1 - * 1: Y-axis WOM interrupt routed to INT1 - */ -#define INT_SOURCE1_WOM_Y_INT1_EN_POS 0x01 -#define INT_SOURCE1_WOM_Y_INT1_EN_MASK (0x01 << INT_SOURCE1_WOM_Y_INT1_EN_POS) - -/* - * wom_x_int1_en - * 0: X-axis WOM interrupt not routed to INT1 - * 1: X-axis WOM interrupt routed to INT1 - */ -#define INT_SOURCE1_WOM_X_INT1_EN_POS 0x00 -#define INT_SOURCE1_WOM_X_INT1_EN_MASK 0x01 - - - -/* - * INT_SOURCE3 - * Register Name : INT_SOURCE3 - */ - -/* - * st_int2_en - * 0: Self-Test Done interrupt not routed to INT2 - * 1: Self-Test Done interrupt routed to INT2 - */ -#define INT_SOURCE3_ST_INT2_EN_POS 0x07 -#define INT_SOURCE3_ST_INT2_EN_MASK (0x01 << INT_SOURCE3_ST_INT2_EN_POS) - -/* - * fsync_int2_en - * 0: FSYNC interrupt not routed to INT2 - * 1: FSYNC interrupt routed to INT2 - */ -#define INT_SOURCE3_FSYNC_INT2_EN_POS 0x06 -#define INT_SOURCE3_FSYNC_INT2_EN_MASK (0x01 << INT_SOURCE3_FSYNC_INT2_EN_POS) - -/* - * pll_rdy_int2_en - * 0: PLL ready interrupt not routed to INT2 - * 1: PLL ready interrupt routed to INT2 - */ -#define INT_SOURCE3_PLL_RDY_INT2_EN_POS 0x05 -#define INT_SOURCE3_PLL_RDY_INT2_EN_MASK (0x01 << INT_SOURCE3_PLL_RDY_INT2_EN_POS) - -/* - * reset_done_int2_en - * 0: Reset done interrupt not routed to INT2 - * 1: Reset done interrupt routed to INT2 - */ -#define INT_SOURCE3_RESET_DONE_INT2_EN_POS 0x04 -#define INT_SOURCE3_RESET_DONE_INT2_EN_MASK (0x01 << INT_SOURCE3_RESET_DONE_INT2_EN_POS) - -/* - * drdy_int2_en - * 0: Data Ready interrupt not routed to INT2 - * 1: Data Ready interrupt routed to INT2 - */ -#define INT_SOURCE3_DRDY_INT2_EN_POS 0x03 -#define INT_SOURCE3_DRDY_INT2_EN_MASK (0x01 << INT_SOURCE3_DRDY_INT2_EN_POS) - -/* - * fifo_ths_int2_en - * 0: FIFO threshold interrupt not routed to INT2 - * 1: FIFO threshold interrupt routed to INT2 - */ -#define INT_SOURCE3_FIFO_THS_INT2_EN_POS 0x02 -#define INT_SOURCE3_FIFO_THS_INT2_EN_MASK (0x01 << INT_SOURCE3_FIFO_THS_INT2_EN_POS) - -/* - * fifo_full_int2_en - * 0: FIFO full interrupt not routed to INT2 - * 1: FIFO full interrupt routed to INT2 - */ -#define INT_SOURCE3_FIFO_FULL_INT2_EN_POS 0x01 -#define INT_SOURCE3_FIFO_FULL_INT2_EN_MASK (0x01 << INT_SOURCE3_FIFO_FULL_INT2_EN_POS) - -/* - * agc_rdy_int2_en - * 0: AGC ready interrupt not routed to INT2 - * 1: AGC ready interrupt routed to INT2 - */ -#define INT_SOURCE3_AGC_RDY_INT2_EN_POS 0x00 -#define INT_SOURCE3_AGC_RDY_INT2_EN_MASK 0x01 - - - -/* - * INT_SOURCE4 - * Register Name : INT_SOURCE4 - */ - -/* - * i3c_protocol_error_int2_en - * 0: I3CSM protocol error interrupt not routed to INT2 - * 1: I3CSM protocol error interrupt routed to INT2 - */ -#define INT_SOURCE4_I3C_PROTOCOL_ERROR_INT2_EN_POS 0x06 -#define INT_SOURCE4_I3C_PROTOCOL_ERROR_INT2_EN_MASK (0x01 << INT_SOURCE4_I3C_PROTOCOL_ERROR_INT2_EN_POS) - -/* - * smd_int2_en - * 0: SMD interrupt not routed to INT2 - * 1: SMD interrupt routed to INT2 - */ -#define INT_SOURCE4_SMD_INT2_EN_POS 0x03 -#define INT_SOURCE4_SMD_INT2_EN_MASK (0x01 << INT_SOURCE4_SMD_INT2_EN_POS) - -/* - * wom_z_int2_en - * 0: Z-axis WOM interrupt not routed to INT2 - * 1: Z-axis WOM interrupt routed to INT2 - */ -#define INT_SOURCE4_WOM_Z_INT2_EN_POS 0x02 -#define INT_SOURCE4_WOM_Z_INT2_EN_MASK (0x01 << INT_SOURCE4_WOM_Z_INT2_EN_POS) - -/* - * wom_y_int2_en - * 0: Y-axis WOM interrupt not routed to INT2 - * 1: Y-axis WOM interrupt routed to INT2 - */ -#define INT_SOURCE4_WOM_Y_INT2_EN_POS 0x01 -#define INT_SOURCE4_WOM_Y_INT2_EN_MASK (0x01 << INT_SOURCE4_WOM_Y_INT2_EN_POS) - -/* - * wom_x_int2_en - * 0: X-axis WOM interrupt not routed to INT2 - * 1: X-axis WOM interrupt routed to INT2 - */ -#define INT_SOURCE4_WOM_X_INT2_EN_POS 0x00 -#define INT_SOURCE4_WOM_X_INT2_EN_MASK 0x01 - - - -/* - * FIFO_LOST_PKT0 - * Register Name : FIFO_LOST_PKT0 - */ - -/* - * fifo_lost_pkt_cnt - * Stores the number of packets lost in the FIFO - */ -#define FIFO_LOST_PKT0_FIFO_LOST_PKT_CNT_POS 0x00 -#define FIFO_LOST_PKT0_FIFO_LOST_PKT_CNT_MASK 0xff - - - -/* - * FIFO_LOST_PKT1 - * Register Name : FIFO_LOST_PKT1 - */ - -/* - * fifo_lost_pkt_cnt - * Stores the number of packets lost in the FIFO - */ -#define FIFO_LOST_PKT1_FIFO_LOST_PKT_CNT_POS 0x00 -#define FIFO_LOST_PKT1_FIFO_LOST_PKT_CNT_MASK 0xff - - - -/* - * APEX_DATA0 - * Register Name : APEX_DATA0 - */ - -/* - * step_cnt - * This status register indicates number of step taken. - */ -#define APEX_DATA0_STEP_CNT_POS 0x00 -#define APEX_DATA0_STEP_CNT_MASK 0xff - - - -/* - * APEX_DATA1 - * Register Name : APEX_DATA1 - */ - -/* - * step_cnt - * This status register indicates number of step taken. - */ -#define APEX_DATA1_STEP_CNT_POS 0x00 -#define APEX_DATA1_STEP_CNT_MASK 0xff - - - -/* - * APEX_DATA2 - * Register Name : APEX_DATA2 - */ - -/* - * step_cadence - * Pedometer step cadence.Walk/run cadency in number of samples. Format is u6.2. - * E.g, At 50Hz and 2Hz walk frequency, the cadency is 25 samples. The register will output 100. - */ -#define APEX_DATA2_STEP_CADENCE_POS 0x00 -#define APEX_DATA2_STEP_CADENCE_MASK 0xff - - - -/* - * APEX_DATA3 - * Register Name : APEX_DATA3 - */ - -/* - * dmp_idle - * 0: Indicates DMP is running - * 1: Indicates DMP is idle - */ -#define APEX_DATA3_DMP_IDLE_POS 0x02 -#define APEX_DATA3_DMP_IDLE_MASK (0x01 << APEX_DATA3_DMP_IDLE_POS) - -/* - * activity_class - * Pedometer Output: Detected activity - * - * 00: Unknown - * 01: Walk - * 10: Run - * 11: Reserved - */ -#define APEX_DATA3_ACTIVITY_CLASS_POS 0x00 -#define APEX_DATA3_ACTIVITY_CLASS_MASK 0x03 - - - -/* - * INTF_CONFIG0 - * Register Name : INTF_CONFIG0 - */ - -/* - * fifo_count_format - * 0: FIFO count is reported in bytes - * 1: FIFO count is reported in records (1 record = 16 bytes for header + gyro + accel + temp sensor data + time stamp, or 8 bytes for header + gyro/accel + temp sensor data) - */ -#define INTF_CONFIG0_FIFO_COUNT_FORMAT_POS 0x06 -#define INTF_CONFIG0_FIFO_COUNT_FORMAT_MASK (0x01 << INTF_CONFIG0_FIFO_COUNT_FORMAT_POS) - -/* - * fifo_count_endian - * This bit applies to both fifo_count and lost_pkt_count - * 0 : Little Endian (The LSByte data is read first, followed by MSByte data). - * 1 : Big Endian (The MSByte data is read first, followed by LSByte data). - */ -#define INTF_CONFIG0_FIFO_COUNT_ENDIAN_POS 0x05 -#define INTF_CONFIG0_FIFO_COUNT_ENDIAN_MASK (0x01 << INTF_CONFIG0_FIFO_COUNT_ENDIAN_POS) - -/* - * sensor_data_endian - * This bit applies to sensor data to AP, and fifo data. - * 0 : Little Endian (The LSByte data is read first, followed by MSByte data). - * 1 : Big Endian (The MSByte data is read first, followed by LSByte data). - */ -#define INTF_CONFIG0_SENSOR_DATA_ENDIAN_POS 0x04 -#define INTF_CONFIG0_SENSOR_DATA_ENDIAN_MASK (0x01 << INTF_CONFIG0_SENSOR_DATA_ENDIAN_POS) - -/* - * INTF_CONFIG1 - * Register Name : INTF_CONFIG1 - */ - -/* - * i3c_sdr_en - * 0: I3CSM SDR mode not enabled - * 1: I3CSM SDR mode enabled - * - * Device will be in pure I2C mode if {I3C_SDR_EN, I3C_DDR_EN} = 00 - */ -#define INTF_CONFIG1_I3C_SDR_EN_POS 0x03 -#define INTF_CONFIG1_I3C_SDR_EN_MASK (0x01 << INTF_CONFIG1_I3C_SDR_EN_POS) - -/* - * i3c_ddr_en - * 0: I3CSM DDR mode not enabled - * 1: I3CSM DDR mode enabled - * - * This bit will not take effect unless I3C_SDR_EN = 1. - */ -#define INTF_CONFIG1_I3C_DDR_EN_POS 0x02 -#define INTF_CONFIG1_I3C_DDR_EN_MASK (0x01 << INTF_CONFIG1_I3C_DDR_EN_POS) - -/* - * clksel - * 00 Alway select internal RC oscillator - * 01 Select PLL when available, else select RC oscillator (default) - * 10 (Reserved) - * 11 Disable all clocks - */ -#define INTF_CONFIG1_CLKSEL_POS 0x00 -#define INTF_CONFIG1_CLKSEL_MASK 0x03 - - - -/* - * INT_STATUS_DRDY - * Register Name : INT_STATUS_DRDY - */ - -/* - * data_rdy_int - * This bit automatically sets to 1 when a Data Ready interrupt is generated. The bit clears to 0 after the register has been read. - */ -#define INT_STATUS_DRDY_DATA_RDY_INT_POS 0x00 -#define INT_STATUS_DRDY_DATA_RDY_INT_MASK 0x01 - - - -/* - * INT_STATUS - * Register Name : INT_STATUS - */ - -/* - * st_int - * This bit automatically sets to 1 when a Self Test done interrupt is generated. The bit clears to 0 after the register has been read. - */ -#define INT_STATUS_ST_INT_POS 0x07 -#define INT_STATUS_ST_INT_MASK (0x01 << INT_STATUS_ST_INT_POS) - -/* - * fsync_int - * This bit automatically sets to 1 when an FSYNC interrupt is generated. The bit clears to 0 after the register has been read. - */ -#define INT_STATUS_FSYNC_INT_POS 0x06 -#define INT_STATUS_FSYNC_INT_MASK (0x01 << INT_STATUS_FSYNC_INT_POS) - -/* - * pll_rdy_int - * This bit automatically sets to 1 when a PLL Ready interrupt is generated. The bit clears to 0 after the register has been read. - */ -#define INT_STATUS_PLL_RDY_INT_POS 0x05 -#define INT_STATUS_PLL_RDY_INT_MASK (0x01 << INT_STATUS_PLL_RDY_INT_POS) - -/* - * reset_done_int - * This bit automatically sets to 1 when software reset is complete. The bit clears to 0 after the register has been read. - */ -#define INT_STATUS_RESET_DONE_INT_POS 0x04 -#define INT_STATUS_RESET_DONE_INT_MASK (0x01 << INT_STATUS_RESET_DONE_INT_POS) - -/* - * fifo_ths_int - * This bit automatically sets to 1 when the FIFO buffer reaches the threshold value. The bit clears to 0 after the register has been read. - */ -#define INT_STATUS_FIFO_THS_INT_POS 0x02 -#define INT_STATUS_FIFO_THS_INT_MASK (0x01 << INT_STATUS_FIFO_THS_INT_POS) - -/* - * fifo_full_int - * This bit automatically sets to 1 when the FIFO buffer is full. The bit clears to 0 after the register has been read. - */ -#define INT_STATUS_FIFO_FULL_INT_POS 0x01 -#define INT_STATUS_FIFO_FULL_INT_MASK (0x01 << INT_STATUS_FIFO_FULL_INT_POS) - -/* - * agc_rdy_int - * This bit automatically sets to 1 when an AGC Ready interrupt is generated. The bit clears to 0 after the register has been read. - */ -#define INT_STATUS_AGC_RDY_INT_POS 0x00 -#define INT_STATUS_AGC_RDY_INT_MASK 0x01 - - - -/* - * INT_STATUS2 - * Register Name : INT_STATUS2 - */ - -/* - * smd_int - * Significant Motion Detection Interrupt, clears on read - */ -#define INT_STATUS2_SMD_INT_POS 0x03 -#define INT_STATUS2_SMD_INT_MASK (0x01 << INT_STATUS2_SMD_INT_POS) - -/* - * wom_x_int - * Wake on Motion Interrupt on X-axis, clears on read - */ -#define INT_STATUS2_WOM_X_INT_POS 0x02 -#define INT_STATUS2_WOM_X_INT_MASK (0x01 << INT_STATUS2_WOM_X_INT_POS) - -/* - * wom_y_int - * Wake on Motion Interrupt on Y-axis, clears on read - */ -#define INT_STATUS2_WOM_Y_INT_POS 0x01 -#define INT_STATUS2_WOM_Y_INT_MASK (0x01 << INT_STATUS2_WOM_Y_INT_POS) - -/* - * wom_z_int - * Wake on Motion Interrupt on Z-axis, clears on read - */ -#define INT_STATUS2_WOM_Z_INT_POS 0x00 -#define INT_STATUS2_WOM_Z_INT_MASK 0x01 - - - -/* - * INT_STATUS3 - * Register Name : INT_STATUS3 - */ - -/* - * step_det_int - * Step Detection Interrupt, clears on read - */ -#define INT_STATUS3_STEP_DET_INT_POS 0x05 -#define INT_STATUS3_STEP_DET_INT_MASK (0x01 << INT_STATUS3_STEP_DET_INT_POS) - -/* - * step_cnt_ovf_int - * Step Count Overflow Interrupt, clears on read - */ -#define INT_STATUS3_STEP_CNT_OVF_INT_POS 0x04 -#define INT_STATUS3_STEP_CNT_OVF_INT_MASK (0x01 << INT_STATUS3_STEP_CNT_OVF_INT_POS) - -/* - * tilt_det_int - * Tilt Detection Interrupt, clears on read - */ -#define INT_STATUS3_TILT_DET_INT_POS 0x03 -#define INT_STATUS3_TILT_DET_INT_MASK (0x01 << INT_STATUS3_TILT_DET_INT_POS) - -/* - * ff_det_int - * Freefall Interrupt, clears on read - */ -#define INT_STATUS3_FF_DET_INT_POS 0x02 -#define INT_STATUS3_FF_DET_INT_MASK (0x01 << INT_STATUS3_FF_DET_INT_POS) - -/* - * lowg_det_int - * LowG Interrupt, clears on read - */ -#define INT_STATUS3_LOWG_DET_INT_POS 0x01 -#define INT_STATUS3_LOWG_DET_INT_MASK (0x01 << INT_STATUS3_LOWG_DET_INT_POS) - - - -/* - * FIFO_COUNTH - * Register Name : FIFO_COUNTH - */ - -/* - * fifo_count - * Number of bytes in FIFO when fifo_count_format=0. - * Number of records in FIFO when fifo_count_format=1. - */ -#define FIFO_COUNTH_FIFO_COUNT_POS 0x00 -#define FIFO_COUNTH_FIFO_COUNT_MASK 0xff - - - -/* - * FIFO_COUNTL - * Register Name : FIFO_COUNTL - */ - -/* - * fifo_count - * Number of bytes in FIFO when fifo_count_format=0. - * Number of records in FIFO when fifo_count_format=1. - */ -#define FIFO_COUNTL_FIFO_COUNT_POS 0x00 -#define FIFO_COUNTL_FIFO_COUNT_MASK 0xff - - - -/* - * FIFO_DATA - * Register Name : FIFO_DATA - */ - -/* - * fifo_data - * FIFO data port - */ -#define FIFO_DATA_FIFO_DATA_POS 0x00 -#define FIFO_DATA_FIFO_DATA_MASK 0xff - - - -/* - * WHO_AM_I - * Register Name : WHO_AM_I - */ - -/* - * whoami - * Register to indicate to user which device is being accessed - */ -#define WHO_AM_I_WHOAMI_POS 0x00 -#define WHO_AM_I_WHOAMI_MASK 0xff - - - -/* - * BLK_SEL_W - * Register Name : BLK_SEL_W - */ - -/* - * blk_sel_w - * For write operation, select a 256-byte MCLK space, or 128-byte SCLK space. - * Automatically reset when OTP copy operation is triggered. - */ -#define BLK_SEL_W_BLK_SEL_W_POS 0x00 -#define BLK_SEL_W_BLK_SEL_W_MASK 0xff - - - -/* - * MADDR_W - * Register Name : MADDR_W - */ - -/* - * maddr_w - * For MREG write operation, the lower 8-bit address for accessing MCLK domain registers. - */ -#define MADDR_W_MADDR_W_POS 0x00 -#define MADDR_W_MADDR_W_MASK 0xff - - - -/* - * M_W - * Register Name : M_W - */ - -/* - * m_w - * For MREG write operation, the write port for accessing MCLK domain registers. - */ -#define M_W_M_W_POS 0x00 -#define M_W_M_W_MASK 0xff - - - -/* - * BLK_SEL_R - * Register Name : BLK_SEL_R - */ - -/* - * blk_sel_r - * For read operation, select a 256-byte MCLK space, or 128-byte SCLK space. - * Automatically reset when OTP copy operation is triggered. - */ -#define BLK_SEL_R_BLK_SEL_R_POS 0x00 -#define BLK_SEL_R_BLK_SEL_R_MASK 0xff - - - -/* - * MADDR_R - * Register Name : MADDR_R - */ - -/* - * maddr_r - * For MREG read operation, the lower 8-bit address for accessing MCLK domain registers. - */ -#define MADDR_R_MADDR_R_POS 0x00 -#define MADDR_R_MADDR_R_MASK 0xff - - - -/* - * M_R - * Register Name : M_R - */ - -/* - * m_r - * For MREG read operation, the read port for accessing MCLK domain registers. - */ -#define M_R_M_R_POS 0x00 -#define M_R_M_R_MASK 0xff - - -/* --------------------------------------------------------------------------- - * register MREG1 - * ---------------------------------------------------------------------------*/ - -/* - * TMST_CONFIG1 - * Register Name : TMST_CONFIG1 - */ - -/* - * tmst_res - * Time Stamp resolution; When set to 0 (default), time stamp resolution is 1 us. When set to 1, resolution is 16us - */ -#define TMST_CONFIG1_TMST_RES_POS 0x03 -#define TMST_CONFIG1_TMST_RES_MASK (0x01 << TMST_CONFIG1_TMST_RES_POS) - -/* - * tmst_delta_en - * Time Stamp delta Enable : When set to 1, the Time stamp field contains the measurement of time since the last occurrence of ODR. - */ -#define TMST_CONFIG1_TMST_DELTA_EN_POS 0x02 -#define TMST_CONFIG1_TMST_DELTA_EN_MASK (0x01 << TMST_CONFIG1_TMST_DELTA_EN_POS) - -/* - * tmst_fsync_en - * Time Stamp register Fsync Enable . When set to 1, the contents of the Timestamp feature of FSYNC is enabled. The user also needs to select fifo_tmst_fsync_en in order to propagate the timestamp value to the FIFO - */ -#define TMST_CONFIG1_TMST_FSYNC_EN_POS 0x01 -#define TMST_CONFIG1_TMST_FSYNC_EN_MASK (0x01 << TMST_CONFIG1_TMST_FSYNC_EN_POS) - -/* - * tmst_en - * Time Stamp register Enable - */ -#define TMST_CONFIG1_TMST_EN_POS 0x00 -#define TMST_CONFIG1_TMST_EN_MASK 0x01 - - - -/* - * FIFO_CONFIG5 - * Register Name : FIFO_CONFIG5 - */ - -/* - * fifo_wm_gt_th - * 1: trigger FIFO-Watermark interrupt on every ODR(DMA Write) if FIFO_COUNT: =FIFO_WM - * - * 0: Trigger FIFO-Watermark interrupt when FIFO_COUNT == FIFO_WM - */ -#define FIFO_CONFIG5_FIFO_WM_GT_TH_POS 0x05 -#define FIFO_CONFIG5_FIFO_WM_GT_TH_MASK (0x01 << FIFO_CONFIG5_FIFO_WM_GT_TH_POS) - -/* - * fifo_resume_partial_rd - * 0: FIFO is read in packets. If a partial packet is read, then the subsequent read will start from the beginning of the un-read packet. - * 1: FIFO can be read partially. When read is resumed, FIFO bytes will continue from last read point. The SW driver is responsible for cascading previous read and present read and maintain frame boundaries. - */ -#define FIFO_CONFIG5_FIFO_RESUME_PARTIAL_RD_POS 0x04 -#define FIFO_CONFIG5_FIFO_RESUME_PARTIAL_RD_MASK (0x01 << FIFO_CONFIG5_FIFO_RESUME_PARTIAL_RD_POS) - -/* - * fifo_hires_en - * Allows 20 bit resolution in the FIFO packet readout - */ -#define FIFO_CONFIG5_FIFO_HIRES_EN_POS 0x03 -#define FIFO_CONFIG5_FIFO_HIRES_EN_MASK (0x01 << FIFO_CONFIG5_FIFO_HIRES_EN_POS) - -/* - * fifo_tmst_fsync_en - * Allows the TMST in the FIFO to be replaced by the FSYNC timestamp - */ -#define FIFO_CONFIG5_FIFO_TMST_FSYNC_EN_POS 0x02 -#define FIFO_CONFIG5_FIFO_TMST_FSYNC_EN_MASK (0x01 << FIFO_CONFIG5_FIFO_TMST_FSYNC_EN_POS) - -/* - * fifo_gyro_en - * Enables Gyro Packets to go to FIFO - */ -#define FIFO_CONFIG5_FIFO_GYRO_EN_POS 0x01 -#define FIFO_CONFIG5_FIFO_GYRO_EN_MASK (0x01 << FIFO_CONFIG5_FIFO_GYRO_EN_POS) - -/* - * fifo_accel_en - * Enable Accel Packets to go to FIFO - */ -#define FIFO_CONFIG5_FIFO_ACCEL_EN_POS 0x00 -#define FIFO_CONFIG5_FIFO_ACCEL_EN_MASK 0x01 - - - -/* - * FIFO_CONFIG6 - * Register Name : FIFO_CONFIG6 - */ - -/* - * fifo_empty_indicator_dis - * 0: xFF is sent out as FIFO data when FIFO is empty. - * 1: The last FIFO data is sent out when FIFO is empty. - */ -#define FIFO_CONFIG6_FIFO_EMPTY_INDICATOR_DIS_POS 0x04 -#define FIFO_CONFIG6_FIFO_EMPTY_INDICATOR_DIS_MASK (0x01 << FIFO_CONFIG6_FIFO_EMPTY_INDICATOR_DIS_POS) - -/* - * rcosc_req_on_fifo_ths_dis - * 0: When the FIFO is operating in ALP+WUOSC mode and the watermark (WM) interrupt is enabled, the FIFO wakes up the system oscillator (RCOSC) as soon as the watermark level is reached. The system oscillator remains enabled until a Host FIFO read operation happens. This will temporarily cause a small increase in the power consumption due to the enabling of the system oscillator. - * 1: The system oscillator is not automatically woken-up by the FIFO/INT when the WM interrupt is triggered. The side effect is that the host can receive invalid packets until the system oscillator is off after it has been turned on for other reasons not related to a WM interrupt. - * - * The recommended setting of this bit is ‘1’ before entering and during all power modes excluding ALP with WUOSC. This is in order to avoid having to do a FIFO access/flush before entering sleep mode. During ALP with WUOSC it is recommended to set this bit to ‘0’. It is recommended to reset this bit back to ‘1’ before exiting ALP+WUOSC with a wait time of 1 ODR or higher. - */ -#define FIFO_CONFIG6_RCOSC_REQ_ON_FIFO_THS_DIS_POS 0x00 -#define FIFO_CONFIG6_RCOSC_REQ_ON_FIFO_THS_DIS_MASK 0x01 - - - -/* - * FSYNC_CONFIG - * Register Name : FSYNC_CONFIG - */ - -/* - * fsync_ui_sel - * this register was called (ext_sync_sel) - * 0 Do not tag Fsync flag - * 1 Tag Fsync flag to TEMP_OUT’s LSB - * 2 Tag Fsync flag to GYRO_XOUT’s LSB - * 3 Tag Fsync flag to GYRO_YOUT’s LSB - * 4 Tag Fsync flag to GYRO_ZOUT’s LSB - * 5 Tag Fsync flag to ACCEL_XOUT’s LSB - * 6 Tag Fsync flag to ACCEL_YOUT’s LSB - * 7 Tag Fsync flag to ACCEL_ZOUT’s LSB - */ -#define FSYNC_CONFIG_FSYNC_UI_SEL_POS 0x04 -#define FSYNC_CONFIG_FSYNC_UI_SEL_MASK (0x07 << FSYNC_CONFIG_FSYNC_UI_SEL_POS) - -/* - * fsync_ui_flag_clear_sel - * 0 means the FSYNC flag is cleared when UI sensor reg is updated - * 1 means the FSYNC flag is cleared when UI interface reads the sensor register LSB of FSYNC tagged axis - */ -#define FSYNC_CONFIG_FSYNC_UI_FLAG_CLEAR_SEL_POS 0x01 -#define FSYNC_CONFIG_FSYNC_UI_FLAG_CLEAR_SEL_MASK (0x01 << FSYNC_CONFIG_FSYNC_UI_FLAG_CLEAR_SEL_POS) - -/* - * fsync_polarity - * 0: Start from Rising edge of FSYNC pulse to measure FSYNC interval - * 1: Start from Falling edge of FSYNC pulse to measure FSYNC interval - */ -#define FSYNC_CONFIG_FSYNC_POLARITY_POS 0x00 -#define FSYNC_CONFIG_FSYNC_POLARITY_MASK 0x01 - - - -/* - * INT_CONFIG0 - * Register Name : INT_CONFIG0 - */ - -/* - * ui_drdy_int_clear - * Data Ready Interrupt Clear Option (latched mode) - * 00: Clear on Status Bit Read - * 01: Clear on Status Bit Read - * 10: Clear on Sensor Register Read - * 11: Clear on Status Bit Read OR on Sensor Register read - */ -#define INT_CONFIG0_UI_DRDY_INT_CLEAR_POS 0x04 -#define INT_CONFIG0_UI_DRDY_INT_CLEAR_MASK (0x03 << INT_CONFIG0_UI_DRDY_INT_CLEAR_POS) - -/* - * fifo_ths_int_clear - * FIFO Threshold Interrupt Clear Option (latched mode) - * 00: Clear on Status Bit Read - * 01: Clear on Status Bit Read - * 10: Clear on FIFO data 1Byte Read - * 11: Clear on Status Bit Read OR on FIFO data 1 byte read - */ -#define INT_CONFIG0_FIFO_THS_INT_CLEAR_POS 0x02 -#define INT_CONFIG0_FIFO_THS_INT_CLEAR_MASK (0x03 << INT_CONFIG0_FIFO_THS_INT_CLEAR_POS) - -/* - * fifo_full_int_clear - * FIFO Full Interrupt Clear Option (latched mode) - * 00: Clear on Status Bit Read - * 01: Clear on Status Bit Read - * 10: Clear on FIFO data 1Byte Read - * 11: Clear on Status Bit Read OR on FIFO data 1 byte read - */ -#define INT_CONFIG0_FIFO_FULL_INT_CLEAR_POS 0x00 -#define INT_CONFIG0_FIFO_FULL_INT_CLEAR_MASK 0x03 - - - -/* - * INT_CONFIG1 - * Register Name : INT_CONFIG1 - */ - -/* - * int_tpulse_duration - * 0 - (Default) Interrupt pulse duration is 100us - * 1- Interrupt pulse duration is 8 us - */ -#define INT_CONFIG1_INT_TPULSE_DURATION_POS 0x06 -#define INT_CONFIG1_INT_TPULSE_DURATION_MASK (0x01 << INT_CONFIG1_INT_TPULSE_DURATION_POS) - -/* - * int_async_reset - * 0: The interrupt pulse is reset as soon as the interrupt status register is read if the pulse is still active. - * 1: The interrupt pulse remains high for the intended duration independent of when the interrupt status register is read. This is the default and recommended setting. In this case, when in ALP with the WUOSC clock, the clearing of the interrupt status register requires up to one ODR period after reading. - */ -#define INT_CONFIG1_INT_ASYNC_RESET_POS 0x04 -#define INT_CONFIG1_INT_ASYNC_RESET_MASK (0x01 << INT_CONFIG1_INT_ASYNC_RESET_POS) - - - -/* - * SENSOR_CONFIG3 - * Register Name : SENSOR_CONFIG3 - */ - -/* - * apex_disable - * 1: Disable APEX features to extend FIFO size to 2.25 Kbytes - */ -#define SENSOR_CONFIG3_APEX_DISABLE_POS 0x06 -#define SENSOR_CONFIG3_APEX_DISABLE_MASK (0x01 << SENSOR_CONFIG3_APEX_DISABLE_POS) - -/* - * ST_CONFIG - * Register Name : ST_CONFIG - */ - -/* - * accel_st_reg - * User must set this bit to 1 when enabling accelerometer self-test and clear it to 0 when self-test procedure has completed. - */ -#define ST_CONFIG_ACCEL_ST_REG_POS 0x07 -#define ST_CONFIG_ACCEL_ST_REG_MASK (0x01 << ST_CONFIG_ACCEL_ST_REG_POS) - -/* - * st_number_sample - * This bit selects the number of sensor samples that should be used to process self-test - * 0: 16 samples - * 1: 200 samples - */ -#define ST_CONFIG_ST_NUMBER_SAMPLE_POS 0x06 -#define ST_CONFIG_ST_NUMBER_SAMPLE_MASK (0x01 << ST_CONFIG_ST_NUMBER_SAMPLE_POS) - -/* - * accel_st_lim - * These bits control the tolerated ratio between self-test processed values and reference (fused) ones for accelerometer. - * 0 : 5% - * 1: 10% - * 2: 15% - * 3: 20% - * 4: 25% - * 5: 30% - * 6: 40% - * 7: 50% - */ -#define ST_CONFIG_ACCEL_ST_LIM_POS 0x03 -#define ST_CONFIG_ACCEL_ST_LIM_MASK (0x07 << ST_CONFIG_ACCEL_ST_LIM_POS) - -/* - * gyro_st_lim - * These bits control the tolerated ratio between self-test processed values and reference (fused) ones for gyro. - * 0 : 5% - * 1: 10% - * 2: 15% - * 3: 20% - * 4: 25% - * 5: 30% - * 6: 40% - * 7: 50% - */ -#define ST_CONFIG_GYRO_ST_LIM_POS 0x00 -#define ST_CONFIG_GYRO_ST_LIM_MASK 0x07 - - - -/* - * SELFTEST - * Register Name : SELFTEST - */ - -/* - * gyro_st_en - * 1: enable gyro self test operation. Host needs to program this bit to 0 to move chip out of self test mode. If host programs this bit to 0 while st_busy = 1 and st_done =0, the current running self-test operation is terminated by host. - */ -#define SELFTEST_GYRO_ST_EN_POS 0x07 -#define SELFTEST_GYRO_ST_EN_MASK (0x01 << SELFTEST_GYRO_ST_EN_POS) - -/* - * accel_st_en - * 1: enable accel self test operation. Host needs to program this bit to 0 to move chip out of self test mode. If host programs this bit to 0 while st_busy = 1 and st_done =0, the current running self-test operation is terminated by host. - */ -#define SELFTEST_ACCEL_ST_EN_POS 0x06 -#define SELFTEST_ACCEL_ST_EN_MASK (0x01 << SELFTEST_ACCEL_ST_EN_POS) - -/* - * en_gz_st - * Enable Gyro Z-axis self test - */ -#define SELFTEST_EN_GZ_ST_POS 0x05 -#define SELFTEST_EN_GZ_ST_MASK (0x01 << SELFTEST_EN_GZ_ST_POS) - -/* - * en_gy_st - * Enable Gyro Y-axis self test - */ -#define SELFTEST_EN_GY_ST_POS 0x04 -#define SELFTEST_EN_GY_ST_MASK (0x01 << SELFTEST_EN_GY_ST_POS) - -/* - * en_gx_st - * Enable Gyro X-axis self test - */ -#define SELFTEST_EN_GX_ST_POS 0x03 -#define SELFTEST_EN_GX_ST_MASK (0x01 << SELFTEST_EN_GX_ST_POS) - -/* - * en_az_st - * Enable Accel Z-axis self test - */ -#define SELFTEST_EN_AZ_ST_POS 0x02 -#define SELFTEST_EN_AZ_ST_MASK (0x01 << SELFTEST_EN_AZ_ST_POS) - -/* - * en_ay_st - * Enable Accel Y-axis self test - */ -#define SELFTEST_EN_AY_ST_POS 0x01 -#define SELFTEST_EN_AY_ST_MASK (0x01 << SELFTEST_EN_AY_ST_POS) - -/* - * en_ax_st - * Enable Accel X-axis self test - */ -#define SELFTEST_EN_AX_ST_POS 0x00 -#define SELFTEST_EN_AX_ST_MASK 0x01 - - - -/* - * INTF_CONFIG6 - * Register Name : INTF_CONFIG6 - */ - -/* - * i3c_timeout_en - * Value of 1 to enable i2c/i3c timeout function - */ -#define INTF_CONFIG6_I3C_TIMEOUT_EN_POS 0x04 -#define INTF_CONFIG6_I3C_TIMEOUT_EN_MASK (0x01 << INTF_CONFIG6_I3C_TIMEOUT_EN_POS) - -/* - * i3c_ibi_byte_en - * I3C Enable IBI-payload function. - */ -#define INTF_CONFIG6_I3C_IBI_BYTE_EN_POS 0x03 -#define INTF_CONFIG6_I3C_IBI_BYTE_EN_MASK (0x01 << INTF_CONFIG6_I3C_IBI_BYTE_EN_POS) - -/* - * i3c_ibi_en - * I3C Enable IBI function. - */ -#define INTF_CONFIG6_I3C_IBI_EN_POS 0x02 -#define INTF_CONFIG6_I3C_IBI_EN_MASK (0x01 << INTF_CONFIG6_I3C_IBI_EN_POS) - - - -/* - * INTF_CONFIG10 - * Register Name : INTF_CONFIG10 - */ - -/* - * asynctime0_dis - * 1: Disable asynchronous timing control mode 0 operation. - */ -#define INTF_CONFIG10_ASYNCTIME0_DIS_POS 0x07 -#define INTF_CONFIG10_ASYNCTIME0_DIS_MASK (0x01 << INTF_CONFIG10_ASYNCTIME0_DIS_POS) - -/* - * INTF_CONFIG7 - * Register Name : INTF_CONFIG7 - */ - -/* - * i3c_ddr_wr_mode - * This bit controls how I3C slave treats the 1st 2-byte data from - * host in a DDR write operation. - * - * 0: (a) The 1st-byte in DDR-WR configures the starting register - * address where the write operation should occur. - * (b) The 2nd-byte in DDR-WR is ignored and dropped. - * (c) The 3rd-byte in DDR-WR will be written into the register - * with address specified by the 1st-byte. - * Or, the next DDR-RD will be starting from the address - * specified by the 1st-byte of previous DDR-WR. - * - * 1: (a) The 1st-byte in DDR-WR configures the starting register - * address where the write operation should occur. - * (b) The 2nd-byte in DDR-WR will be written into the register - * with address specified by the 1st-byte. - */ -#define INTF_CONFIG7_I3C_DDR_WR_MODE_POS 0x03 -#define INTF_CONFIG7_I3C_DDR_WR_MODE_MASK (0x01 << INTF_CONFIG7_I3C_DDR_WR_MODE_POS) - -/* - * OTP_CONFIG - * Register Name : OTP_CONFIG - */ - -/* - * otp_copy_mode - * 00: Reserved - * 01: Enable copying OTP block to SRAM - * 10: Reserved - * 11: Enable copying self-test data from OTP memory to SRAM - */ -#define OTP_CONFIG_OTP_COPY_MODE_POS 0x02 -#define OTP_CONFIG_OTP_COPY_MODE_MASK (0x03 << OTP_CONFIG_OTP_COPY_MODE_POS) - -/* - * INT_SOURCE6 - * Register Name : INT_SOURCE6 - */ - -/* - * ff_int1_en - * 0: Freefall interrupt not routed to INT1 - * 1: Freefall interrupt routed to INT1 - */ -#define INT_SOURCE6_FF_INT1_EN_POS 0x07 -#define INT_SOURCE6_FF_INT1_EN_MASK (0x01 << INT_SOURCE6_FF_INT1_EN_POS) - -/* - * lowg_int1_en - * 0: Low-g interrupt not routed to INT1 - * 1: Low-g interrupt routed to INT1 - */ -#define INT_SOURCE6_LOWG_INT1_EN_POS 0x06 -#define INT_SOURCE6_LOWG_INT1_EN_MASK (0x01 << INT_SOURCE6_LOWG_INT1_EN_POS) - -/* - * step_det_int1_en - * 0: Step detect interrupt not routed to INT1 - * 1: Step detect interrupt routed to INT1 - */ -#define INT_SOURCE6_STEP_DET_INT1_EN_POS 0x05 -#define INT_SOURCE6_STEP_DET_INT1_EN_MASK (0x01 << INT_SOURCE6_STEP_DET_INT1_EN_POS) - -/* - * step_cnt_ofl_int1_en - * 0: Step count overflow interrupt not routed to INT1 - * 1: Step count overflow interrupt routed to INT1 - */ -#define INT_SOURCE6_STEP_CNT_OFL_INT1_EN_POS 0x04 -#define INT_SOURCE6_STEP_CNT_OFL_INT1_EN_MASK (0x01 << INT_SOURCE6_STEP_CNT_OFL_INT1_EN_POS) - -/* - * tilt_det_int1_en - * 0: Tilt detect interrupt not routed to INT1 - * 1: Tile detect interrupt routed to INT1 - */ -#define INT_SOURCE6_TILT_DET_INT1_EN_POS 0x03 -#define INT_SOURCE6_TILT_DET_INT1_EN_MASK (0x01 << INT_SOURCE6_TILT_DET_INT1_EN_POS) - - - -/* - * INT_SOURCE7 - * Register Name : INT_SOURCE7 - */ - -/* - * ff_int2_en - * 0: Freefall interrupt not routed to INT2 - * 1: Freefall interrupt routed to INT2 - */ -#define INT_SOURCE7_FF_INT2_EN_POS 0x07 -#define INT_SOURCE7_FF_INT2_EN_MASK (0x01 << INT_SOURCE7_FF_INT2_EN_POS) - -/* - * lowg_int2_en - * 0: Low-g interrupt not routed to INT2 - * 1: Low-g interrupt routed to INT2 - */ -#define INT_SOURCE7_LOWG_INT2_EN_POS 0x06 -#define INT_SOURCE7_LOWG_INT2_EN_MASK (0x01 << INT_SOURCE7_LOWG_INT2_EN_POS) - -/* - * step_det_int2_en - * 0: Step detect interrupt not routed to INT2 - * 1: Step detect interrupt routed to INT2 - */ -#define INT_SOURCE7_STEP_DET_INT2_EN_POS 0x05 -#define INT_SOURCE7_STEP_DET_INT2_EN_MASK (0x01 << INT_SOURCE7_STEP_DET_INT2_EN_POS) - -/* - * step_cnt_ofl_int2_en - * 0: Step count overflow interrupt not routed to INT2 - * 1: Step count overflow interrupt routed to INT2 - */ -#define INT_SOURCE7_STEP_CNT_OFL_INT2_EN_POS 0x04 -#define INT_SOURCE7_STEP_CNT_OFL_INT2_EN_MASK (0x01 << INT_SOURCE7_STEP_CNT_OFL_INT2_EN_POS) - -/* - * tilt_det_int2_en - * 0: Tilt detect interrupt not routed to INT2 - * 1: Tile detect interrupt routed to INT2 - */ -#define INT_SOURCE7_TILT_DET_INT2_EN_POS 0x03 -#define INT_SOURCE7_TILT_DET_INT2_EN_MASK (0x01 << INT_SOURCE7_TILT_DET_INT2_EN_POS) - - - -/* - * INT_SOURCE8 - * Register Name : INT_SOURCE8 - */ - -/* - * fsync_ibi_en - * 0: FSYNC interrupt not routed to IBI - * 1: FSYNC interrupt routed to IBI - */ -#define INT_SOURCE8_FSYNC_IBI_EN_POS 0x05 -#define INT_SOURCE8_FSYNC_IBI_EN_MASK (0x01 << INT_SOURCE8_FSYNC_IBI_EN_POS) - -/* - * pll_rdy_ibi_en - * 0: PLL ready interrupt not routed to IBI - * 1: PLL ready interrupt routed to IBI - */ -#define INT_SOURCE8_PLL_RDY_IBI_EN_POS 0x04 -#define INT_SOURCE8_PLL_RDY_IBI_EN_MASK (0x01 << INT_SOURCE8_PLL_RDY_IBI_EN_POS) - -/* - * ui_drdy_ibi_en - * 0: UI data ready interrupt not routed to IBI - * 1: UI data ready interrupt routed to IBI - */ -#define INT_SOURCE8_UI_DRDY_IBI_EN_POS 0x03 -#define INT_SOURCE8_UI_DRDY_IBI_EN_MASK (0x01 << INT_SOURCE8_UI_DRDY_IBI_EN_POS) - -/* - * fifo_ths_ibi_en - * 0: FIFO threshold interrupt not routed to IBI - * 1: FIFO threshold interrupt routed to IBI - */ -#define INT_SOURCE8_FIFO_THS_IBI_EN_POS 0x02 -#define INT_SOURCE8_FIFO_THS_IBI_EN_MASK (0x01 << INT_SOURCE8_FIFO_THS_IBI_EN_POS) - -/* - * fifo_full_ibi_en - * 0: FIFO full interrupt not routed to IBI - * 1: FIFO full interrupt routed to IBI - */ -#define INT_SOURCE8_FIFO_FULL_IBI_EN_POS 0x01 -#define INT_SOURCE8_FIFO_FULL_IBI_EN_MASK (0x01 << INT_SOURCE8_FIFO_FULL_IBI_EN_POS) - -/* - * agc_rdy_ibi_en - * 0: AGC ready interrupt not routed to IBI - * 1: AGC ready interrupt routed to IBI - */ -#define INT_SOURCE8_AGC_RDY_IBI_EN_POS 0x00 -#define INT_SOURCE8_AGC_RDY_IBI_EN_MASK 0x01 - - - -/* - * INT_SOURCE9 - * Register Name : INT_SOURCE9 - */ - -/* - * i3c_protocol_error_ibi_en - * 0: I3CSM protocol error interrupt not routed to IBI - * 1: I3CSM protocol error interrupt routed to IBI - */ -#define INT_SOURCE9_I3C_PROTOCOL_ERROR_IBI_EN_POS 0x07 -#define INT_SOURCE9_I3C_PROTOCOL_ERROR_IBI_EN_MASK (0x01 << INT_SOURCE9_I3C_PROTOCOL_ERROR_IBI_EN_POS) - -/* - * ff_ibi_en - * 0: Freefall interrupt not routed to IBI - * 1: Freefall interrupt routed to IBI - */ -#define INT_SOURCE9_FF_IBI_EN_POS 0x06 -#define INT_SOURCE9_FF_IBI_EN_MASK (0x01 << INT_SOURCE9_FF_IBI_EN_POS) - -/* - * lowg_ibi_en - * 0: Low-g interrupt not routed to IBI - * 1: Low-g interrupt routed to IBI - */ -#define INT_SOURCE9_LOWG_IBI_EN_POS 0x05 -#define INT_SOURCE9_LOWG_IBI_EN_MASK (0x01 << INT_SOURCE9_LOWG_IBI_EN_POS) - -/* - * smd_ibi_en - * 0: SMD interrupt not routed to IBI - * 1: SMD interrupt routed to IBI - */ -#define INT_SOURCE9_SMD_IBI_EN_POS 0x04 -#define INT_SOURCE9_SMD_IBI_EN_MASK (0x01 << INT_SOURCE9_SMD_IBI_EN_POS) - -/* - * wom_z_ibi_en - * 0: Z-axis WOM interrupt not routed to IBI - * 1: Z-axis WOM interrupt routed to IBI - */ -#define INT_SOURCE9_WOM_Z_IBI_EN_POS 0x03 -#define INT_SOURCE9_WOM_Z_IBI_EN_MASK (0x01 << INT_SOURCE9_WOM_Z_IBI_EN_POS) - -/* - * wom_y_ibi_en - * 0: Y-axis WOM interrupt not routed to IBI - * 1: Y-axis WOM interrupt routed to IBI - */ -#define INT_SOURCE9_WOM_Y_IBI_EN_POS 0x02 -#define INT_SOURCE9_WOM_Y_IBI_EN_MASK (0x01 << INT_SOURCE9_WOM_Y_IBI_EN_POS) - -/* - * wom_x_ibi_en - * 0: X-axis WOM interrupt not routed to IBI - * 1: X-axis WOM interrupt routed to IBI - */ -#define INT_SOURCE9_WOM_X_IBI_EN_POS 0x01 -#define INT_SOURCE9_WOM_X_IBI_EN_MASK (0x01 << INT_SOURCE9_WOM_X_IBI_EN_POS) - -/* - * st_done_ibi_en - * 0: Self-test done interrupt not routed to IBI - * 1: Self-test done interrupt routed to IBI - */ -#define INT_SOURCE9_ST_DONE_IBI_EN_POS 0x00 -#define INT_SOURCE9_ST_DONE_IBI_EN_MASK 0x01 - - - -/* - * INT_SOURCE10 - * Register Name : INT_SOURCE10 - */ - -/* - * step_det_ibi_en - * 0: Step detect interrupt not routed to IBI - * 1: Step detect interrupt routed to IBI - */ -#define INT_SOURCE10_STEP_DET_IBI_EN_POS 0x05 -#define INT_SOURCE10_STEP_DET_IBI_EN_MASK (0x01 << INT_SOURCE10_STEP_DET_IBI_EN_POS) - -/* - * step_cnt_ofl_ibi_en - * 0: Step count overflow interrupt not routed to IBI - * 1: Step count overflow interrupt routed to IBI - */ -#define INT_SOURCE10_STEP_CNT_OFL_IBI_EN_POS 0x04 -#define INT_SOURCE10_STEP_CNT_OFL_IBI_EN_MASK (0x01 << INT_SOURCE10_STEP_CNT_OFL_IBI_EN_POS) - -/* - * tilt_det_ibi_en - * 0: Tilt detect interrupt not routed to IBI - * 1: Tile detect interrupt routed to IBI - */ -#define INT_SOURCE10_TILT_DET_IBI_EN_POS 0x03 -#define INT_SOURCE10_TILT_DET_IBI_EN_MASK (0x01 << INT_SOURCE10_TILT_DET_IBI_EN_POS) - - - -/* - * APEX_CONFIG2 - * Register Name : APEX_CONFIG2 - */ - -/* - * low_energy_amp_th_sel - * Threshold to select a valid step. Used to increase step detection for slow walk use case. - * - * 0000: 30 mg - * 0001: 35 mg - * 0010: 40 mg - * 0011: 45 mg - * 0100: 50 mg - * 0101: 55 mg - * 0110: 60 mg - * 0111: 65 mg - * 1000: 70 mg - * 1001: 75 mg - * 1010: 80 mg (default) - * 1011: 85 mg - * 1100: 90 mg - * 1101: 95 mg - * 1110: 100 mg - * 1111: 105 mg - */ -#define APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS 0x04 -#define APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_MASK (0x0f << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS) - -/* - * dmp_power_save_time_sel - * Duration of the period while the DMP stays awake after receiving a WOM event. - * - * 0000: 0 seconds - * 0001: 4 seconds - * 0010: 8 seconds (default) - * 0011: 12 seconds - * 0100: 16 seconds - * 0101: 20 seconds - * 0110: 24 seconds - * 0111: 28 seconds - * 1000: 32 seconds - * 1001: 36 seconds - * 1010: 40 seconds - * 1011: 44 seconds - * 1100: 48 seconds - * 1101: 52 seconds - * 1110: 56 seconds - * 1111: 60 seconds - */ -#define APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_POS 0x00 -#define APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_MASK 0x0f - - - -/* - * APEX_CONFIG3 - * Register Name : APEX_CONFIG3 - */ - -/* - * ped_amp_th_sel - * Threshold of step detection sensitivity. - * - * Low values increase detection sensitivity: reduce miss-detection. - * High values reduce detection sensitivity: reduce false-positive. - * - * 0000: 30 mg - * 0001: 34 mg - * 0010: 38 mg - * 0011: 42 mg - * 0100: 46 mg - * 0101: 50 mg - * 0110: 54 mg - * 0111: 58 mg - * 1000: 62 mg (default) - * 1001: 66 mg - * 1010: 70 mg - * 1011: 74 mg - * 1100: 78 mg - * 1101: 82 mg - * 1110: 86 mg - * 1111: 90 mg - */ -#define APEX_CONFIG3_PED_AMP_TH_SEL_POS 0x04 -#define APEX_CONFIG3_PED_AMP_TH_SEL_MASK (0x0f << APEX_CONFIG3_PED_AMP_TH_SEL_POS) - -/* - * ped_step_cnt_th_sel - * Minimum number of steps that must be detected before step count is incremented. - * - * Low values reduce latency but increase false positives. - * High values increase step count accuracy but increase latency. - * - * 0000: 0 steps - * 0001: 1 step - * 0010: 2 steps - * 0011: 3 steps - * 0100: 4 steps - * 0101: 5 steps (default) - * 0110: 6 steps - * 0111: 7 steps - * 1000: 8 steps - * 1001: 9 steps - * 1010: 10 steps - * 1011: 11 steps - * 1100: 12 steps - * 1101: 13 steps - * 1110: 14 steps - * 1111: 15 steps - */ -#define APEX_CONFIG3_PED_STEP_CNT_TH_SEL_POS 0x00 -#define APEX_CONFIG3_PED_STEP_CNT_TH_SEL_MASK 0x0f - - - -/* - * APEX_CONFIG4 - * Register Name : APEX_CONFIG4 - */ - -/* - * ped_step_det_th_sel - * Minimum number of steps that must be detected before step event is signaled. - * - * Low values reduce latency but increase false positives. - * High values increase step event validity but increase latency. - * - * 000: 0 steps - * 001: 1 step - * 010: 2 steps (default) - * 011: 3 steps - * 100: 4 steps - * 101: 5 steps - * 110: 6 steps - * 111: 7 steps - */ -#define APEX_CONFIG4_PED_STEP_DET_TH_SEL_POS 0x05 -#define APEX_CONFIG4_PED_STEP_DET_TH_SEL_MASK (0x07 << APEX_CONFIG4_PED_STEP_DET_TH_SEL_POS) - -/* - * ped_sb_timer_th_sel - * Duration before algorithm considers that user has stopped taking steps. - * - * 000: 50 samples - * 001: 75 sample - * 010: 100 samples - * 011: 125 samples - * 100: 150 samples (default) - * 101: 175 samples - * 110: 200 samples - * 111: 225 samples - */ -#define APEX_CONFIG4_PED_SB_TIMER_TH_SEL_POS 0x02 -#define APEX_CONFIG4_PED_SB_TIMER_TH_SEL_MASK (0x07 << APEX_CONFIG4_PED_SB_TIMER_TH_SEL_POS) - -/* - * ped_hi_en_th_sel - * Threshold to classify acceleration signal as motion not due to steps. - * - * High values improve vibration rejection. - * Low values improve detection. - * - * 00: 87.89 mg - * 01: 104.49 mg (default) - * 10: 132.81 mg - * 11: 155.27 mg - */ -#define APEX_CONFIG4_PED_HI_EN_TH_SEL_POS 0x00 -#define APEX_CONFIG4_PED_HI_EN_TH_SEL_MASK 0x03 - - - -/* - * APEX_CONFIG5 - * Register Name : APEX_CONFIG5 - */ - -/* - * tilt_wait_time_sel - * Minimum duration for which the device should be tilted before signaling event. - * - * 00: 0s - * 01: 2s - * 10: 4s (default) - * 11: 6s - */ -#define APEX_CONFIG5_TILT_WAIT_TIME_SEL_POS 0x06 -#define APEX_CONFIG5_TILT_WAIT_TIME_SEL_MASK (0x03 << APEX_CONFIG5_TILT_WAIT_TIME_SEL_POS) - -/* - * lowg_peak_th_hyst_sel - * Hysteresis value added to the low-g threshold after exceeding it. - * - * 000: 31 mg (default) - * 001: 63 mg - * 010: 94 mg - * 011: 125 mg - * 100: 156 mg - * 101: 188 mg - * 110: 219 mg - * 111: 250 mg - */ -#define APEX_CONFIG5_LOWG_PEAK_TH_HYST_SEL_POS 0x03 -#define APEX_CONFIG5_LOWG_PEAK_TH_HYST_SEL_MASK (0x07 << APEX_CONFIG5_LOWG_PEAK_TH_HYST_SEL_POS) - -/* - * highg_peak_th_hyst_sel - * Hysteresis value subtracted from the high-g threshold after exceeding it. - * - * 000: 31 mg (default) - * 001: 63 mg - * 010: 94 mg - * 011: 125 mg - * 100: 156 mg - * 101: 188 mg - * 110: 219 mg - * 111: 250 mg - */ -#define APEX_CONFIG5_HIGHG_PEAK_TH_HYST_SEL_POS 0x00 -#define APEX_CONFIG5_HIGHG_PEAK_TH_HYST_SEL_MASK 0x07 - - - -/* - * APEX_CONFIG9 - * Register Name : APEX_CONFIG9 - */ - -/* - * ff_debounce_duration_sel - * Period after a freefall is signaled during which a new freefall will not be detected. Prevents false detection due to bounces. - * - * 0000: 0 ms - * 0001: 1250 ms - * 0010: 1375 ms - * 0011: 1500 ms - * 0100: 1625 ms - * 0101: 1750 ms - * 0110: 1875 ms - * 0111: 2000 ms - * 1000: 2125 ms (default) - * 1001: 2250 ms - * 1010: 2375 ms - * 1011: 2500 ms - * 1100: 2625 ms - * 1101: 2750 ms - * 1110: 2875 ms - * 1111: 3000 ms - */ -#define APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS 0x04 -#define APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_MASK (0x0f << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS) - -/* - * smd_sensitivity_sel - * Parameter to tune SMD algorithm robustness to rejection, ranging from 0 to 4 (values higher than 4 are reserved). - * - * Low values increase detection rate but increase false positives. - * High values reduce false positives but reduce detection rate (especially for transport use cases). - * - * Default value is 0. - */ -#define APEX_CONFIG9_SMD_SENSITIVITY_SEL_POS 0x01 -#define APEX_CONFIG9_SMD_SENSITIVITY_SEL_MASK (0x07 << APEX_CONFIG9_SMD_SENSITIVITY_SEL_POS) - -/* - * sensitivity_mode - * Pedometer sensitivity mode - * 0: Normal (default) - * 1: Slow walk - * - * Slow walk mode improves slow walk detection (<1Hz) but the number of false positives may increase. - */ -#define APEX_CONFIG9_SENSITIVITY_MODE_POS 0x00 -#define APEX_CONFIG9_SENSITIVITY_MODE_MASK 0x01 - - - -/* - * APEX_CONFIG10 - * Register Name : APEX_CONFIG10 - */ - -/* - * lowg_peak_th_sel - * Threshold for accel values below which low-g state is detected. - * - * 00000: 31 mg (default) - * 00001: 63 mg - * 00010: 94 mg - * 00011: 125 mg - * 00100: 156 mg - * 00101: 188 mg - * 00110: 219 mg - * 00111: 250 mg - * 01000: 281 mg - * 01001: 313 mg - * 01010: 344 mg - * 01011: 375 mg - * 01100: 406 mg - * 01101: 438 mg - * 01110: 469 mg - * 01111: 500 mg - * 10000: 531 mg - * 10001: 563 mg - * 10010: 594 mg - * 10011: 625 mg - * 10100: 656 mg - * 10101: 688 mg - * 10110: 719 mg - * 10111: 750 mg - * 11000: 781 mg - * 11001: 813 mg - * 11010: 844 mg - * 11011: 875 mg - * 11100: 906 mg - * 11101: 938 mg - * 11110: 969 mg - * 11111: 1000 mg - */ -#define APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS 0x03 -#define APEX_CONFIG10_LOWG_PEAK_TH_SEL_MASK (0x1f << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS) - -/* - * lowg_time_th_sel - * Number of samples required to enter low-g state. - * - * 000: 1 sample (default) - * 001: 2 samples - * 010: 3 samples - * 011: 4 samples - * 100: 5 samples - * 101: 6 samples - * 110: 7 samples - * 111: 8 samples - */ -#define APEX_CONFIG10_LOWG_TIME_TH_SEL_POS 0x00 -#define APEX_CONFIG10_LOWG_TIME_TH_SEL_MASK 0x07 - - - -/* - * APEX_CONFIG11 - * Register Name : APEX_CONFIG11 - */ - -/* - * highg_peak_th_sel - * Threshold for accel values above which high-g state is detected. - * - * 00000: 250 mg (default) - * 00001: 500 mg - * 00010: 750 mg - * 00011: 1000 mg - * 00100: 1250 mg - * 00101: 1500 mg - * 00110: 1750 mg - * 00111: 2000 mg - * 01000: 2250 mg - * 01001: 2500 mg - * 01010: 2750 mg - * 01011: 3000 mg - * 01100: 3250 mg - * 01101: 3500 mg - * 01110: 3750 mg - * 01111: 4000 mg - * 10000: 4250 mg - * 10001: 4500 mg - * 10010: 4750 mg - * 10011: 5000 mg - * 10100: 5250 mg - * 10101: 5500 mg - * 10110: 5750 mg - * 10111: 6000 mg - * 11000: 6250 mg - * 11001: 6500 mg - * 11010: 6750 mg - * 11011: 7000 mg - * 11100: 7250 mg - * 11101: 7500 mg - * 11110: 7750 mg - * 11111: 8000 mg - */ -#define APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS 0x03 -#define APEX_CONFIG11_HIGHG_PEAK_TH_SEL_MASK (0x1f << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS) - -/* - * highg_time_th_sel - * Number of samples required to enter high-g state. - * - * 000: 1 sample (default) - * 001: 2 samples - * 010: 3 samples - * 011: 4 samples - * 100: 5 samples - * 101: 6 samples - * 110: 7 samples - * 111: 8 samples - */ -#define APEX_CONFIG11_HIGHG_TIME_TH_SEL_POS 0x00 -#define APEX_CONFIG11_HIGHG_TIME_TH_SEL_MASK 0x07 - - - -/* - * ACCEL_WOM_X_THR - * Register Name : ACCEL_WOM_X_THR - */ - -/* - * wom_x_th - * Threshold value for the Wake on Motion Interrupt for X-axis accelerometer - * WoM thresholds are expressed in fixed “mg” independent of the selected Range [0g : 1g]; Resolution 1g/256=~3.9mg - */ -#define ACCEL_WOM_X_THR_WOM_X_TH_POS 0x00 -#define ACCEL_WOM_X_THR_WOM_X_TH_MASK 0xff - - - -/* - * ACCEL_WOM_Y_THR - * Register Name : ACCEL_WOM_Y_THR - */ - -/* - * wom_y_th - * Threshold value for the Wake on Motion Interrupt for Y-axis accelerometer - * WoM thresholds are expressed in fixed “mg” independent of the selected Range [0g : 1g]; Resolution 1g/256=~3.9mg - */ -#define ACCEL_WOM_Y_THR_WOM_Y_TH_POS 0x00 -#define ACCEL_WOM_Y_THR_WOM_Y_TH_MASK 0xff - - - -/* - * ACCEL_WOM_Z_THR - * Register Name : ACCEL_WOM_Z_THR - */ - -/* - * wom_z_th - * Threshold value for the Wake on Motion Interrupt for Z-axis accelerometer - * WoM thresholds are expressed in fixed “mg” independent of the selected Range [0g : 1g]; Resolution 1g/256=~3.9mg - */ -#define ACCEL_WOM_Z_THR_WOM_Z_TH_POS 0x00 -#define ACCEL_WOM_Z_THR_WOM_Z_TH_MASK 0xff - - - -/* - * OFFSET_USER0 - * Register Name : OFFSET_USER0 - */ - -/* - * gyro_x_offuser - * Gyro offset programmed by user. Max value is +/-64 dps, resolution is 1/32 dps - */ -#define OFFSET_USER0_GYRO_X_OFFUSER_POS 0x00 -#define OFFSET_USER0_GYRO_X_OFFUSER_MASK 0xff - - - -/* - * OFFSET_USER1 - * Register Name : OFFSET_USER1 - */ - -/* - * gyro_x_offuser - * Gyro offset programmed by user. Max value is +/-64 dps, resolution is 1/32 dps - */ -#define OFFSET_USER1_GYRO_X_OFFUSER_POS 0x00 -#define OFFSET_USER1_GYRO_X_OFFUSER_MASK 0x0f - -/* - * gyro_y_offuser - * Gyro offset programmed by user. Max value is +/-64 dps, resolution is 1/32 dps - */ -#define OFFSET_USER1_GYRO_Y_OFFUSER_POS 0x04 -#define OFFSET_USER1_GYRO_Y_OFFUSER_MASK (0x0f << OFFSET_USER1_GYRO_Y_OFFUSER_POS) - - - -/* - * OFFSET_USER2 - * Register Name : OFFSET_USER2 - */ - -/* - * gyro_y_offuser - * Gyro offset programmed by user. Max value is +/-64 dps, resolution is 1/32 dps - */ -#define OFFSET_USER2_GYRO_Y_OFFUSER_POS 0x00 -#define OFFSET_USER2_GYRO_Y_OFFUSER_MASK 0xff - - - -/* - * OFFSET_USER3 - * Register Name : OFFSET_USER3 - */ - -/* - * gyro_z_offuser - * Gyro offset programmed by user. Max value is +/-64 dps, resolution is 1/32 dps - */ -#define OFFSET_USER3_GYRO_Z_OFFUSER_POS 0x00 -#define OFFSET_USER3_GYRO_Z_OFFUSER_MASK 0xff - - - -/* - * OFFSET_USER4 - * Register Name : OFFSET_USER4 - */ - -/* - * gyro_z_offuser - * Gyro offset programmed by user. Max value is +/-64 dps, resolution is 1/32 dps - */ -#define OFFSET_USER4_GYRO_Z_OFFUSER_POS 0x00 -#define OFFSET_USER4_GYRO_Z_OFFUSER_MASK 0x0f - -/* - * accel_x_offuser - * Accel offset programmed by user. Max value is +/-1 gee, resolution is 0.5 mgee - */ -#define OFFSET_USER4_ACCEL_X_OFFUSER_POS 0x04 -#define OFFSET_USER4_ACCEL_X_OFFUSER_MASK (0x0f << OFFSET_USER4_ACCEL_X_OFFUSER_POS) - - - -/* - * OFFSET_USER5 - * Register Name : OFFSET_USER5 - */ - -/* - * accel_x_offuser - * Accel offset programmed by user. Max value is +/-1 gee, resolution is 0.5 mgee - */ -#define OFFSET_USER5_ACCEL_X_OFFUSER_POS 0x00 -#define OFFSET_USER5_ACCEL_X_OFFUSER_MASK 0xff - - - -/* - * OFFSET_USER6 - * Register Name : OFFSET_USER6 - */ - -/* - * accel_y_offuser - * Accel offset programmed by user. Max value is +/-1 gee, resolution is 0.5 mgee - */ -#define OFFSET_USER6_ACCEL_Y_OFFUSER_POS 0x00 -#define OFFSET_USER6_ACCEL_Y_OFFUSER_MASK 0xff - - - -/* - * OFFSET_USER7 - * Register Name : OFFSET_USER7 - */ - -/* - * accel_y_offuser - * Accel offset programmed by user. Max value is +/-1 gee, resolution is 0.5 mgee - */ -#define OFFSET_USER7_ACCEL_Y_OFFUSER_POS 0x00 -#define OFFSET_USER7_ACCEL_Y_OFFUSER_MASK 0x0f - -/* - * accel_z_offuser - * Accel offset programmed by user. Max value is +/-1 gee, resolution is 0.5 mgee - */ -#define OFFSET_USER7_ACCEL_Z_OFFUSER_POS 0x04 -#define OFFSET_USER7_ACCEL_Z_OFFUSER_MASK (0x0f << OFFSET_USER7_ACCEL_Z_OFFUSER_POS) - - - -/* - * OFFSET_USER8 - * Register Name : OFFSET_USER8 - */ - -/* - * accel_z_offuser - * Accel offset programmed by user. Max value is +/-1 gee, resolution is 0.5 mgee - */ -#define OFFSET_USER8_ACCEL_Z_OFFUSER_POS 0x00 -#define OFFSET_USER8_ACCEL_Z_OFFUSER_MASK 0xff - - - -/* - * ST_STATUS1 - * Register Name : ST_STATUS1 - */ - -/* - * accel_st_pass - * 1: Accel self-test passed for all the 3 axes - */ -#define ST_STATUS1_ACCEL_ST_PASS_POS 0x05 -#define ST_STATUS1_ACCEL_ST_PASS_MASK (0x01 << ST_STATUS1_ACCEL_ST_PASS_POS) - -/* - * accel_st_done - * 1: Accel self-test done for all the 3 axes - */ -#define ST_STATUS1_ACCEL_ST_DONE_POS 0x04 -#define ST_STATUS1_ACCEL_ST_DONE_MASK (0x01 << ST_STATUS1_ACCEL_ST_DONE_POS) - -/* - * az_st_pass - * 1: Accel Z-axis self-test passed - */ -#define ST_STATUS1_AZ_ST_PASS_POS 0x03 -#define ST_STATUS1_AZ_ST_PASS_MASK (0x01 << ST_STATUS1_AZ_ST_PASS_POS) - -/* - * ay_st_pass - * 1: Accel Y-axis self-test passed - */ -#define ST_STATUS1_AY_ST_PASS_POS 0x02 -#define ST_STATUS1_AY_ST_PASS_MASK (0x01 << ST_STATUS1_AY_ST_PASS_POS) - -/* - * ax_st_pass - * 1: Accel X-axis self-test passed - */ -#define ST_STATUS1_AX_ST_PASS_POS 0x01 -#define ST_STATUS1_AX_ST_PASS_MASK (0x01 << ST_STATUS1_AX_ST_PASS_POS) - - - -/* - * ST_STATUS2 - * Register Name : ST_STATUS2 - */ - -/* - * st_incomplete - * 1: Self-test is incomplete. - * This bit is set to 1 if the self-test was aborted. - * One possible cause of aborting the self-test may be the detection of significant movement in the gyro when the self-test for gyro and/or accel is being executed. - */ -#define ST_STATUS2_ST_INCOMPLETE_POS 0x06 -#define ST_STATUS2_ST_INCOMPLETE_MASK (0x01 << ST_STATUS2_ST_INCOMPLETE_POS) - -/* - * gyro_st_pass - * 1: Gyro self-test passed for all the 3 axes - */ -#define ST_STATUS2_GYRO_ST_PASS_POS 0x05 -#define ST_STATUS2_GYRO_ST_PASS_MASK (0x01 << ST_STATUS2_GYRO_ST_PASS_POS) - -/* - * gyro_st_done - * 1: Gyro self-test done for all the 3 axes - */ -#define ST_STATUS2_GYRO_ST_DONE_POS 0x04 -#define ST_STATUS2_GYRO_ST_DONE_MASK (0x01 << ST_STATUS2_GYRO_ST_DONE_POS) - -/* - * gz_st_pass - * 1: Gyro Z-axis self-test passed - */ -#define ST_STATUS2_GZ_ST_PASS_POS 0x03 -#define ST_STATUS2_GZ_ST_PASS_MASK (0x01 << ST_STATUS2_GZ_ST_PASS_POS) - -/* - * gy_st_pass - * 1: Gyro Y-axis self-test passed - */ -#define ST_STATUS2_GY_ST_PASS_POS 0x02 -#define ST_STATUS2_GY_ST_PASS_MASK (0x01 << ST_STATUS2_GY_ST_PASS_POS) - -/* - * gx_st_pass - * 1: Gyro X-axis self-test passed - */ -#define ST_STATUS2_GX_ST_PASS_POS 0x01 -#define ST_STATUS2_GX_ST_PASS_MASK (0x01 << ST_STATUS2_GX_ST_PASS_POS) - - - -/* - * FDR_CONFIG - * Register Name : FDR_CONFIG - */ - -/* - * fdr_sel - * [7:4] Reserved - * [3:0] FIFO packet rate decimation factor. Sets the number of discarded FIFO packets. Valid range is 0 to 127. User must disable sensors when initializing FDR_SEL value or making changes to it. - * - * 0xxx: Decimation is disabled, all packets are sent to FIFO - * 1000: 1 packet out of 2 is sent to FIFO - * 1001: 1 packet out of 4 is sent to FIFO - * 1010: 1 packet out of 8 is sent to FIFO - * 1011: 1 packet out of 16 is sent to FIFO - * 1100: 1 packet out of 32 is sent to FIFO - * 1101: 1 packet out of 64 is sent to FIFO - * 1110: 1 packet out of 128 is sent to FIFO - * 1111: 1 packet out of 256 is sent to FIFO - */ -#define FDR_CONFIG_FDR_SEL_POS 0x00 -#define FDR_CONFIG_FDR_SEL_MASK 0xff - - - -/* - * APEX_CONFIG12 - * Register Name : APEX_CONFIG12 - */ - -/* - * ff_max_duration_sel - * Maximum freefall length. Longer freefalls are ignored. - * - * 0000: 102 cm (default) - * 0001: 120 cm - * 0010: 139 cm - * 0011: 159 cm - * 0100: 181 cm - * 0101: 204 cm - * 0110: 228 cm - * 0111: 254 cm - * 1000: 281 cm - * 1001: 310 cm - * 1010: 339 cm - * 1011: 371 cm - * 1100: 403 cm - * 1101: 438 cm - * 1110: 473 cm - * 1111: 510 cm - */ -#define APEX_CONFIG12_FF_MAX_DURATION_SEL_POS 0x04 -#define APEX_CONFIG12_FF_MAX_DURATION_SEL_MASK (0x0f << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS) - -/* - * ff_min_duration_sel - * Minimum freefall length. Shorter freefalls are ignored. - * - * 0000: 10 cm (default) - * 0001: 12 cm - * 0010: 13 cm - * 0011: 16 cm - * 0100: 18 cm - * 0101: 20 cm - * 0110: 23 cm - * 0111: 25 cm - * 1000: 28 cm - * 1001: 31 cm - * 1010: 34 cm - * 1011: 38 cm - * 1100: 41 cm - * 1101: 45 cm - * 1110: 48 cm - * 1111: 52 cm - */ -#define APEX_CONFIG12_FF_MIN_DURATION_SEL_POS 0x00 -#define APEX_CONFIG12_FF_MIN_DURATION_SEL_MASK 0x0f - - -/* --------------------------------------------------------------------------- - * register MREG3 - * ---------------------------------------------------------------------------*/ - -/* - * XA_ST_DATA - * Register Name : XA_ST_DATA - */ - -/* - * xa_st_data - * Accel X-axis self test data converted to 8 bit code. - */ -#define XA_ST_DATA_XA_ST_DATA_POS 0x00 -#define XA_ST_DATA_XA_ST_DATA_MASK 0xff - - - -/* - * YA_ST_DATA - * Register Name : YA_ST_DATA - */ - -/* - * ya_st_data - * Accel Y-axis self test data converted to 8 bit code. - */ -#define YA_ST_DATA_YA_ST_DATA_POS 0x00 -#define YA_ST_DATA_YA_ST_DATA_MASK 0xff - - - -/* - * ZA_ST_DATA - * Register Name : ZA_ST_DATA - */ - -/* - * za_st_data - * Accel Z-axis self test data converted to 8 bit code. - */ -#define ZA_ST_DATA_ZA_ST_DATA_POS 0x00 -#define ZA_ST_DATA_ZA_ST_DATA_MASK 0xff - - - -/* - * XG_ST_DATA - * Register Name : XG_ST_DATA - */ - -/* - * xg_st_data - * Gyro X-axis self test data converted to 8 bit code. - */ -#define XG_ST_DATA_XG_ST_DATA_POS 0x00 -#define XG_ST_DATA_XG_ST_DATA_MASK 0xff - - - -/* - * YG_ST_DATA - * Register Name : YG_ST_DATA - */ - -/* - * yg_st_data - * Gyro Y-axis self test data converted to 8 bit code. - */ -#define YG_ST_DATA_YG_ST_DATA_POS 0x00 -#define YG_ST_DATA_YG_ST_DATA_MASK 0xff - - - -/* - * ZG_ST_DATA - * Register Name : ZG_ST_DATA - */ - -/* - * zg_st_data - * Gyro Z-axis self test data converted to 8 bit code. - */ -#define ZG_ST_DATA_ZG_ST_DATA_POS 0x00 -#define ZG_ST_DATA_ZG_ST_DATA_MASK 0xff - - -/* --------------------------------------------------------------------------- - * register MREG2 - * ---------------------------------------------------------------------------*/ - -/* - * OTP_CTRL7 - * Register Name : OTP_CTRL7 - */ - -/* - * otp_reload - * 1: to trigger OTP copy operation. This bit is cleared to 0 after OTP copy is done. - * - * With otp_copy_mode[1:0] = 2'b01, it takes 280us to complete the OTP reloading operation. - * With otp_copy_mode[1:0] = 2'b11, it takes 20us to complete the OTP reloading operation. - */ -#define OTP_CTRL7_OTP_RELOAD_POS 0x03 -#define OTP_CTRL7_OTP_RELOAD_MASK (0x01 << OTP_CTRL7_OTP_RELOAD_POS) - -/* - * otp_pwr_down - * 0: Power up OTP to copy from OTP to SRAM - * 1: Power down OTP - * - * This bit is automatically set to 1 when OTP copy operation is complete. - */ -#define OTP_CTRL7_OTP_PWR_DOWN_POS 0x01 -#define OTP_CTRL7_OTP_PWR_DOWN_MASK (0x01 << OTP_CTRL7_OTP_PWR_DOWN_POS) - -#ifdef __cplusplus -} -#endif - -#endif /*#ifndef _INV_IMU_REGMAP_H_*/ +/* + *________________________________________________________________________________________________________ + * Copyright (c) 2017 InvenSense Inc. All rights reserved. + * + * This software, related documentation and any modifications thereto (collectively "Software") is subject + * to InvenSense and its licensors intellectual property rights under U.S. and international copyright + * and other intellectual property rights laws. + * + * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software + * and any use, reproduction, disclosure or distribution of the Software without an express license agreement + * from InvenSense is strictly prohibited. + * + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS + * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED + * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL + * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, + * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + OF THE SOFTWARE. + * ________________________________________________________________________________________________________ + */ +#ifndef _INV_IMU_REGMAP_H_ +#define _INV_IMU_REGMAP_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/** @file inv_imu_regmap.h + * File exposing the device register map + */ + +#include + +/* forward declaration */ +struct inv_imu_device; + + + +/* ---------------------------------------------------------------------------- + * Device Register map + * + * Next macros defines address for all registers as listed by device + * datasheet. + * Macros name is with REGISTER_NAME being the name of + * the corresponding register in datasheet. + * Note that macro name is _Bx with x being the bank + * number for registers that are in bank 1 and further (suffix is ommitted for + * bank 0 registers) + * ---------------------------------------------------------------------------- */ + +/* BANK0 */ +#define MCLK_RDY 0x10000 +#define DEVICE_CONFIG 0x10001 +#define SIGNAL_PATH_RESET 0x10002 +#define DRIVE_CONFIG1 0x10003 +#define DRIVE_CONFIG2 0x10004 +#define DRIVE_CONFIG3 0x10005 +#define INT_CONFIG 0x10006 +#define TEMP_DATA1 0x10009 +#define TEMP_DATA0 0x1000a +#define ACCEL_DATA_X1 0x1000b +#define ACCEL_DATA_X0 0x1000c +#define ACCEL_DATA_Y1 0x1000d +#define ACCEL_DATA_Y0 0x1000e +#define ACCEL_DATA_Z1 0x1000f +#define ACCEL_DATA_Z0 0x10010 +#define GYRO_DATA_X1 0x10011 +#define GYRO_DATA_X0 0x10012 +#define GYRO_DATA_Y1 0x10013 +#define GYRO_DATA_Y0 0x10014 +#define GYRO_DATA_Z1 0x10015 +#define GYRO_DATA_Z0 0x10016 +#define TMST_FSYNCH 0x10017 +#define TMST_FSYNCL 0x10018 +#define APEX_DATA4 0x1001d +#define APEX_DATA5 0x1001e +#define PWR_MGMT0 0x1001f +#define GYRO_CONFIG0 0x10020 +#define ACCEL_CONFIG0 0x10021 +#define TEMP_CONFIG0 0x10022 +#define GYRO_CONFIG1 0x10023 +#define ACCEL_CONFIG1 0x10024 +#define APEX_CONFIG0 0x10025 +#define APEX_CONFIG1 0x10026 +#define WOM_CONFIG 0x10027 +#define FIFO_CONFIG1 0x10028 +#define FIFO_CONFIG2 0x10029 +#define FIFO_CONFIG3 0x1002a +#define INT_SOURCE0 0x1002b +#define INT_SOURCE1 0x1002c +#define INT_SOURCE3 0x1002d +#define INT_SOURCE4 0x1002e +#define FIFO_LOST_PKT0 0x1002f +#define FIFO_LOST_PKT1 0x10030 +#define APEX_DATA0 0x10031 +#define APEX_DATA1 0x10032 +#define APEX_DATA2 0x10033 +#define APEX_DATA3 0x10034 +#define INTF_CONFIG0 0x10035 +#define INTF_CONFIG1 0x10036 +#define INT_STATUS_DRDY 0x10039 +#define INT_STATUS 0x1003a +#define INT_STATUS2 0x1003b +#define INT_STATUS3 0x1003c +#define FIFO_COUNTH 0x1003d +#define FIFO_COUNTL 0x1003e +#define FIFO_DATA 0x1003f +#define WHO_AM_I 0x10075 +#define BLK_SEL_W 0x10079 +#define MADDR_W 0x1007a +#define M_W 0x1007b +#define BLK_SEL_R 0x1007c +#define MADDR_R 0x1007d +#define M_R 0x1007e + +/* MREG1 */ +#define TMST_CONFIG1_MREG1 0x00 +#define FIFO_CONFIG5_MREG1 0x01 +#define FIFO_CONFIG6_MREG1 0x02 +#define FSYNC_CONFIG_MREG1 0x03 +#define INT_CONFIG0_MREG1 0x04 +#define INT_CONFIG1_MREG1 0x05 +#define SENSOR_CONFIG3_MREG1 0x06 +#define ST_CONFIG_MREG1 0x13 +#define SELFTEST_MREG1 0x14 +#define INTF_CONFIG6_MREG1 0x23 +#define INTF_CONFIG10_MREG1 0x25 +#define INTF_CONFIG7_MREG1 0x28 +#define OTP_CONFIG_MREG1 0x2b +#define INT_SOURCE6_MREG1 0x2f +#define INT_SOURCE7_MREG1 0x30 +#define INT_SOURCE8_MREG1 0x31 +#define INT_SOURCE9_MREG1 0x32 +#define INT_SOURCE10_MREG1 0x33 +#define APEX_CONFIG2_MREG1 0x44 +#define APEX_CONFIG3_MREG1 0x45 +#define APEX_CONFIG4_MREG1 0x46 +#define APEX_CONFIG5_MREG1 0x47 +#define APEX_CONFIG9_MREG1 0x48 +#define APEX_CONFIG10_MREG1 0x49 +#define APEX_CONFIG11_MREG1 0x4a +#define ACCEL_WOM_X_THR_MREG1 0x4b +#define ACCEL_WOM_Y_THR_MREG1 0x4c +#define ACCEL_WOM_Z_THR_MREG1 0x4d +#define OFFSET_USER0_MREG1 0x4e +#define OFFSET_USER1_MREG1 0x4f +#define OFFSET_USER2_MREG1 0x50 +#define OFFSET_USER3_MREG1 0x51 +#define OFFSET_USER4_MREG1 0x52 +#define OFFSET_USER5_MREG1 0x53 +#define OFFSET_USER6_MREG1 0x54 +#define OFFSET_USER7_MREG1 0x55 +#define OFFSET_USER8_MREG1 0x56 +#define ST_STATUS1_MREG1 0x63 +#define ST_STATUS2_MREG1 0x64 +#define FDR_CONFIG_MREG1 0x66 +#define APEX_CONFIG12_MREG1 0x67 + +/* MREG3 */ +#define XA_ST_DATA_MREG3 0x5000 +#define YA_ST_DATA_MREG3 0x5001 +#define ZA_ST_DATA_MREG3 0x5002 +#define XG_ST_DATA_MREG3 0x5003 +#define YG_ST_DATA_MREG3 0x5004 +#define ZG_ST_DATA_MREG3 0x5005 + +/* MREG2 */ +#define OTP_CTRL7_MREG2 0x2806 + + +/* --------------------------------------------------------------------------- + * register BANK0 + * ---------------------------------------------------------------------------*/ + +/* + * MCLK_RDY + * Register Name : MCLK_RDY + */ + +/* + * mclk_rdy + * 0: Indicates internal clock is currently not running + * 1: Indicates internal clock is currently running + */ +#define MCLK_RDY_MCLK_RDY_POS 0x03 +#define MCLK_RDY_MCLK_RDY_MASK (0x01 << MCLK_RDY_MCLK_RDY_POS) + +/* + * DEVICE_CONFIG + * Register Name : DEVICE_CONFIG + */ + +/* + * spi_ap_4wire + * 0: AP interface uses 3-wire SPI mode + * 1: AP interface uses 4-wire SPI mode + */ +#define DEVICE_CONFIG_SPI_AP_4WIRE_POS 0x02 +#define DEVICE_CONFIG_SPI_AP_4WIRE_MASK (0x01 << DEVICE_CONFIG_SPI_AP_4WIRE_POS) + +/* + * spi_mode + * SPI mode selection + * + * 0: Mode 0 and Mode 3 + * 1: Mode 1 and Mode 2 + * + * If device is operating in non-SPI mode, user is not allowed to change the power-on default setting of this register. Change of this register setting will not take effect till AP_CS = 1. + */ +#define DEVICE_CONFIG_SPI_MODE_POS 0x00 +#define DEVICE_CONFIG_SPI_MODE_MASK 0x01 + + + +/* + * SIGNAL_PATH_RESET + * Register Name : SIGNAL_PATH_RESET + */ + +/* + * soft_reset_device_config + * Software Reset (auto clear bit) + * + * 0: Software reset not enabled + * 1: Software reset enabled + */ +#define SIGNAL_PATH_RESET_SOFT_RESET_DEVICE_CONFIG_POS 0x04 +#define SIGNAL_PATH_RESET_SOFT_RESET_DEVICE_CONFIG_MASK (0x01 << SIGNAL_PATH_RESET_SOFT_RESET_DEVICE_CONFIG_POS) + +/* + * fifo_flush + * When set to 1, FIFO will get flushed. + * FIFO flush requires the following programming sequence: + * • Write FIFO_FLUSH =1 + * • Wait for 1.5 µs + * • Read FIFO_FLUSH, it should now be 0 + * Host can only program this register bit to 1. + */ +#define SIGNAL_PATH_RESET_FIFO_FLUSH_POS 0x02 +#define SIGNAL_PATH_RESET_FIFO_FLUSH_MASK (0x01 << SIGNAL_PATH_RESET_FIFO_FLUSH_POS) + + + +/* + * DRIVE_CONFIG1 + * Register Name : DRIVE_CONFIG1 + */ + +/* + * i3c_ddr_slew_rate + * Controls slew rate for output pin 14 when device is in I3CSM DDR protocol. + * While in I3CSM operation, the device automatically switches to use I3C_DDR_SLEW_RATE after receiving ENTHDR0 ccc command from the host. The device automatically switches back to I3C_SDR_SLEW_RATE after the host issues HDR_EXIT pattern. + * + * 000: MIN: 20 ns; TYP: 40 ns; MAX: 60 ns + * 001: MIN: 12 ns; TYP: 24 ns; MAX: 36 ns + * 010: MIN: 6 ns; TYP: 12 ns; MAX: 19 ns + * 011: MIN: 4 ns; TYP: 8 ns; MAX: 14 ns + * 100: MIN: 2 ns; TYP: 4 ns; MAX: 8 ns + * 101: MAX: 2 ns + * 110: Reserved + * 111: Reserved + * + * This register field should not be programmed in I3C/DDR mode. + */ +#define DRIVE_CONFIG1_I3C_DDR_SLEW_RATE_POS 0x03 +#define DRIVE_CONFIG1_I3C_DDR_SLEW_RATE_MASK (0x07 << DRIVE_CONFIG1_I3C_DDR_SLEW_RATE_POS) + +/* + * i3c_sdr_slew_rate + * Controls slew rate for output pin 14 in I3CSM SDR protocol. + * After device reset, I2C_SLEW_RATE is used by default. If I3CSM feature is enabled, the device automatically switches to use I3C_SDR_SLEW_RATE after receiving 0x7E+W message (an I3CSM broadcast message). + * + * 000: MIN: 20 ns; TYP: 40 ns; MAX: 60 ns + * 001: MIN: 12 ns; TYP: 24 ns; MAX: 36 ns + * 010: MIN: 6 ns; TYP: 12 ns; MAX: 19 ns + * 011: MIN: 4 ns; TYP: 8 ns; MAX: 14 ns + * 100: MIN: 2 ns; TYP: 4 ns; MAX: 8 ns + * 101: MAX: 2 ns + * 110: Reserved + * 111: Reserved + * + * This register field should not be programmed in I3C/DDR mode + */ +#define DRIVE_CONFIG1_I3C_SDR_SLEW_RATE_POS 0x00 +#define DRIVE_CONFIG1_I3C_SDR_SLEW_RATE_MASK 0x07 + + + +/* + * DRIVE_CONFIG2 + * Register Name : DRIVE_CONFIG2 + */ + +/* + * i2c_slew_rate + * Controls slew rate for output pin 14 in I2C mode. + * After device reset, the I2C_SLEW_RATE is used by default. If the 1st write operation from host is an SPI transaction, the device automatically switches to SPI_SLEW_RATE. If I3CSM feature is enabled, the device automatically switches to I3C_SDR_SLEW_RATE after receiving 0x7E+W message (an I3C broadcast message). + * + * 000: MIN: 20 ns; TYP: 40 ns; MAX: 60 ns + * 001: MIN: 12 ns; TYP: 24 ns; MAX: 36 ns + * 010: MIN: 6 ns; TYP: 12 ns; MAX: 19 ns + * 011: MIN: 4 ns; TYP: 8 ns; MAX: 14 ns + * 100: MIN: 2 ns; TYP: 4 ns; MAX: 8 ns + * 101: MAX: 2 ns + * 110: Reserved + * 111: Reserved + * + * This register field should not be programmed in I3C/DDR mode + */ +#define DRIVE_CONFIG2_I2C_SLEW_RATE_POS 0x03 +#define DRIVE_CONFIG2_I2C_SLEW_RATE_MASK (0x07 << DRIVE_CONFIG2_I2C_SLEW_RATE_POS) + +/* + * all_slew_rate + * Configure drive strength for all output pins in all modes (SPI3, SPI4, I2C, I3CSM) excluding pin 14. + * + * 000: MIN: 20 ns; TYP: 40 ns; MAX: 60 ns + * 001: MIN: 12 ns; TYP: 24 ns; MAX: 36 ns + * 010: MIN: 6 ns; TYP: 12 ns; MAX: 19 ns + * 011: MIN: 4 ns; TYP: 8 ns; MAX: 14 ns + * 100: MIN: 2 ns; TYP: 4 ns; MAX: 8 ns + * 101: MAX: 2 ns + * 110: Reserved + * 111: Reserved + * + * This register field should not be programmed in I3C/DDR mode + */ +#define DRIVE_CONFIG2_ALL_SLEW_RATE_POS 0x00 +#define DRIVE_CONFIG2_ALL_SLEW_RATE_MASK 0x07 + + + +/* + * DRIVE_CONFIG3 + * Register Name : DRIVE_CONFIG3 + */ + +/* + * spi_slew_rate + * Controls slew rate for output pin 14 in SPI 3-wire mode. In SPI 4-wire mode this register controls the slew rate of pin 1 as it is used as an output in SPI 4-wire mode only. After chip reset, the I2C_SLEW_RATE is used by default for pin 14 pin. If the 1st write operation from the host is an SPI3/4 transaction, the device automatically switches to SPI_SLEW_RATE. + * + * 000: MIN: 20 ns; TYP: 40 ns; MAX: 60 ns + * 001: MIN: 12 ns; TYP: 24 ns; MAX: 36 ns + * 010: MIN: 6 ns; TYP: 12 ns; MAX: 19 ns + * 011: MIN: 4 ns; TYP: 8 ns; MAX: 14 ns + * 100: MIN: 2 ns; TYP: 4 ns; MAX: 8 ns + * 101: MAX: 2 ns + * 110: Reserved + * 111: Reserved + * + * This register field should not be programmed in I3C/DDR mode + */ +#define DRIVE_CONFIG3_SPI_SLEW_RATE_POS 0x00 +#define DRIVE_CONFIG3_SPI_SLEW_RATE_MASK 0x07 + + + +/* + * INT_CONFIG + * Register Name : INT_CONFIG + */ + +/* + * int2_mode + * Interrupt mode and drive circuit shall be configurable by register. + * Interrupt Mode + * 1: Latched Mode + * 0: Pulsed Mode + */ +#define INT_CONFIG_INT2_MODE_POS 0x05 +#define INT_CONFIG_INT2_MODE_MASK (0x01 << INT_CONFIG_INT2_MODE_POS) + +/* + * int2_drive_circuit + * Interrupt mode and drive circuit shall be configurable by register. + * Drive Circuit + * 1: Push-Pull + * 0: Open drain + */ +#define INT_CONFIG_INT2_DRIVE_CIRCUIT_POS 0x04 +#define INT_CONFIG_INT2_DRIVE_CIRCUIT_MASK (0x01 << INT_CONFIG_INT2_DRIVE_CIRCUIT_POS) + +/* + * int2_polarity + * Interrupt mode and drive circuit shall be configurable by register. + * Interrupt Polarity + * 1: Active High + * 0: Active Low + */ +#define INT_CONFIG_INT2_POLARITY_POS 0x03 +#define INT_CONFIG_INT2_POLARITY_MASK (0x01 << INT_CONFIG_INT2_POLARITY_POS) + +/* + * int1_mode + * Interrupt mode and drive circuit shall be configurable by register. + * Interrupt Mode + * 1: Latched Mode + * 0: Pulsed Mode + */ +#define INT_CONFIG_INT1_MODE_POS 0x02 +#define INT_CONFIG_INT1_MODE_MASK (0x01 << INT_CONFIG_INT1_MODE_POS) + +/* + * int1_drive_circuit + * Interrupt mode and drive circuit shall be configurable by register. + * Drive Circuit + * 1: Push-Pull + * 0: Open drain + */ +#define INT_CONFIG_INT1_DRIVE_CIRCUIT_POS 0x01 +#define INT_CONFIG_INT1_DRIVE_CIRCUIT_MASK (0x01 << INT_CONFIG_INT1_DRIVE_CIRCUIT_POS) + +/* + * int1_polarity + * Interrupt mode and drive circuit shall be configurable by register. + * Interrupt Polarity + * 1: Active High + * 0: Active Low + */ +#define INT_CONFIG_INT1_POLARITY_POS 0x00 +#define INT_CONFIG_INT1_POLARITY_MASK 0x01 + + + +/* + * TEMP_DATA1 + * Register Name : TEMP_DATA1 + */ + +/* + * temp_data + * Temperature data + */ +#define TEMP_DATA1_TEMP_DATA_POS 0x00 +#define TEMP_DATA1_TEMP_DATA_MASK 0xff + + + +/* + * TEMP_DATA0 + * Register Name : TEMP_DATA0 + */ + +/* + * temp_data + * Temperature data + */ +#define TEMP_DATA0_TEMP_DATA_POS 0x00 +#define TEMP_DATA0_TEMP_DATA_MASK 0xff + + + +/* + * ACCEL_DATA_X1 + * Register Name : ACCEL_DATA_X1 + */ + +/* + * accel_data_x + * Accel X axis data + */ +#define ACCEL_DATA_X1_ACCEL_DATA_X_POS 0x00 +#define ACCEL_DATA_X1_ACCEL_DATA_X_MASK 0xff + + + +/* + * ACCEL_DATA_X0 + * Register Name : ACCEL_DATA_X0 + */ + +/* + * accel_data_x + * Accel X axis data + */ +#define ACCEL_DATA_X0_ACCEL_DATA_X_POS 0x00 +#define ACCEL_DATA_X0_ACCEL_DATA_X_MASK 0xff + + + +/* + * ACCEL_DATA_Y1 + * Register Name : ACCEL_DATA_Y1 + */ + +/* + * accel_data_y + * Accel Y axis data + */ +#define ACCEL_DATA_Y1_ACCEL_DATA_Y_POS 0x00 +#define ACCEL_DATA_Y1_ACCEL_DATA_Y_MASK 0xff + + + +/* + * ACCEL_DATA_Y0 + * Register Name : ACCEL_DATA_Y0 + */ + +/* + * accel_data_y + * Accel Y axis data + */ +#define ACCEL_DATA_Y0_ACCEL_DATA_Y_POS 0x00 +#define ACCEL_DATA_Y0_ACCEL_DATA_Y_MASK 0xff + + + +/* + * ACCEL_DATA_Z1 + * Register Name : ACCEL_DATA_Z1 + */ + +/* + * accel_data_z + * Accel Z axis data + */ +#define ACCEL_DATA_Z1_ACCEL_DATA_Z_POS 0x00 +#define ACCEL_DATA_Z1_ACCEL_DATA_Z_MASK 0xff + + + +/* + * ACCEL_DATA_Z0 + * Register Name : ACCEL_DATA_Z0 + */ + +/* + * accel_data_z + * Accel Z axis data + */ +#define ACCEL_DATA_Z0_ACCEL_DATA_Z_POS 0x00 +#define ACCEL_DATA_Z0_ACCEL_DATA_Z_MASK 0xff + + + +/* + * GYRO_DATA_X1 + * Register Name : GYRO_DATA_X1 + */ + +/* + * gyro_data_x + * Gyro X axis data + */ +#define GYRO_DATA_X1_GYRO_DATA_X_POS 0x00 +#define GYRO_DATA_X1_GYRO_DATA_X_MASK 0xff + + + +/* + * GYRO_DATA_X0 + * Register Name : GYRO_DATA_X0 + */ + +/* + * gyro_data_x + * Gyro X axis data + */ +#define GYRO_DATA_X0_GYRO_DATA_X_POS 0x00 +#define GYRO_DATA_X0_GYRO_DATA_X_MASK 0xff + + + +/* + * GYRO_DATA_Y1 + * Register Name : GYRO_DATA_Y1 + */ + +/* + * gyro_data_y + * Gyro Y axis data + */ +#define GYRO_DATA_Y1_GYRO_DATA_Y_POS 0x00 +#define GYRO_DATA_Y1_GYRO_DATA_Y_MASK 0xff + + + +/* + * GYRO_DATA_Y0 + * Register Name : GYRO_DATA_Y0 + */ + +/* + * gyro_data_y + * Gyro Y axis data + */ +#define GYRO_DATA_Y0_GYRO_DATA_Y_POS 0x00 +#define GYRO_DATA_Y0_GYRO_DATA_Y_MASK 0xff + + + +/* + * GYRO_DATA_Z1 + * Register Name : GYRO_DATA_Z1 + */ + +/* + * gyro_data_z + * Gyro Z axis data + */ +#define GYRO_DATA_Z1_GYRO_DATA_Z_POS 0x00 +#define GYRO_DATA_Z1_GYRO_DATA_Z_MASK 0xff + + + +/* + * GYRO_DATA_Z0 + * Register Name : GYRO_DATA_Z0 + */ + +/* + * gyro_data_z + * Gyro Z axis data + */ +#define GYRO_DATA_Z0_GYRO_DATA_Z_POS 0x00 +#define GYRO_DATA_Z0_GYRO_DATA_Z_MASK 0xff + + + +/* + * TMST_FSYNCH + * Register Name : TMST_FSYNCH + */ + +/* + * tmst_fsync_data + * Stores the time delta from the rising edge of FSYNC to the latest ODR until the UI Interface reads the FSYNC tag in the status register + */ +#define TMST_FSYNCH_TMST_FSYNC_DATA_POS 0x00 +#define TMST_FSYNCH_TMST_FSYNC_DATA_MASK 0xff + + + +/* + * TMST_FSYNCL + * Register Name : TMST_FSYNCL + */ + +/* + * tmst_fsync_data + * Stores the time delta from the rising edge of FSYNC to the latest ODR until the UI Interface reads the FSYNC tag in the status register + */ +#define TMST_FSYNCL_TMST_FSYNC_DATA_POS 0x00 +#define TMST_FSYNCL_TMST_FSYNC_DATA_MASK 0xff + + + +/* + * APEX_DATA4 + * Register Name : APEX_DATA4 + */ + +/* + * ff_dur + * Free Fall duration. The duration is given in number of samples and it can be converted to freefall distance by applying the following formula: + * ff_distance = 0.5*9.81*(ff_duration*dmp_odr_s)^2) + * Note: dmp_odr_s in the duration of DMP_ODR expressed in seconds. + */ +#define APEX_DATA4_FF_DUR_POS 0x00 +#define APEX_DATA4_FF_DUR_MASK 0xff + + + +/* + * APEX_DATA5 + * Register Name : APEX_DATA5 + */ + +/* + * ff_dur + * Free Fall duration. The duration is given in number of samples and it can be converted to freefall distance by applying the following formula: + * ff_distance = 0.5*9.81*(ff_duration*dmp_odr_s)^2) + * Note: dmp_odr_s in the duration of DMP_ODR expressed in seconds. + */ +#define APEX_DATA5_FF_DUR_POS 0x00 +#define APEX_DATA5_FF_DUR_MASK 0xff + + + +/* + * PWR_MGMT0 + * Register Name : PWR_MGMT0 + */ + +/* + * accel_lp_clk_sel + * 0: Accelerometer LP mode uses Wake Up oscillator clock. This is the lowest power consumption mode and it is the recommended setting. + * 1: Accelerometer LP mode uses RC oscillator clock. + * + * This field can be changed on-the-fly even if accel sensor is on. + */ +#define PWR_MGMT0_ACCEL_LP_CLK_SEL_POS 0x07 +#define PWR_MGMT0_ACCEL_LP_CLK_SEL_MASK (0x01 << PWR_MGMT0_ACCEL_LP_CLK_SEL_POS) + +/* + * idle + * If this bit is set to 1, the RC oscillator is powered on even if Accel and Gyro are powered off. + * Nominally this bit is set to 0, so when Accel and Gyro are powered off, + * the chip will go to OFF state , since the RC oscillator will also be powered off. + * + * This field can be changed on-the-fly even if a sensor is already on + */ +#define PWR_MGMT0_IDLE_POS 0x04 +#define PWR_MGMT0_IDLE_MASK (0x01 << PWR_MGMT0_IDLE_POS) + +/* + * gyro_mode + * 00: Turns gyroscope off + * 01: Places gyroscope in Standby Mode + * 10: Reserved + * 11: Places gyroscope in Low Noise (LN) Mode + * + * Gyroscope needs to be kept ON for a minimum of 45ms. When transitioning from OFF to any of the other modes, do not issue any register writes for 200 µs. + * + * This field can be changed on-the-fly even if gyro sensor is on + */ +#define PWR_MGMT0_GYRO_MODE_POS 0x02 +#define PWR_MGMT0_GYRO_MODE_MASK (0x03 << PWR_MGMT0_GYRO_MODE_POS) + +/* + * accel_mode + * 00: Turns accelerometer off + * 01: Turns accelerometer off + * 10: Places accelerometer in Low Power (LP) Mode + * 11: Places accelerometer in Low Noise (LN) Mode + * + * When selecting LP Mode please refer to ACCEL_LP_CLK_SEL setting, bit[7] of this register. + * + * Before entering LP mode and during LP Mode the following combinations of ODR and averaging are not permitted: + * 1) ODR=1600 Hz or ODR=800 Hz: any averaging. + * 2) ODR=400 Hz: averaging=16x, 32x or 64x. + * 3) ODR=200 Hz: averaging=64x. + * + * When transitioning from OFF to any of the other modes, do not issue any register writes for 200 µs. + * + * This field can be changed on-the-fly even if accel sensor is on + */ +#define PWR_MGMT0_ACCEL_MODE_POS 0x00 +#define PWR_MGMT0_ACCEL_MODE_MASK 0x03 + + + +/* + * GYRO_CONFIG0 + * Register Name : GYRO_CONFIG0 + */ + +/* + * gyro_ui_fs_sel + * Full scale select for gyroscope UI interface output + * + * 00: ±2000 dps + * 01: ±1000 dps + * 10: ±500 dps + * 11: ±250 dps + * + * This field can be changed on-the-fly even if gyro sensor is on + */ +#define GYRO_CONFIG0_GYRO_UI_FS_SEL_POS 0x05 +#define GYRO_CONFIG0_GYRO_UI_FS_SEL_MASK (0x03 << GYRO_CONFIG0_GYRO_UI_FS_SEL_POS) + +/* + * gyro_odr + * Gyroscope ODR selection for UI interface output + * + * 0000: Reserved + * 0001: Reserved + * 0010: Reserved + * 0011: Reserved + * 0100: Reserved + * 0101: 1.6k Hz + * 0110: 800 Hz + * 0111: 400 Hz + * 1000: 200 Hz + * 1001: 100 Hz + * 1010: 50 Hz + * 1011: 25 Hz + * 1100: 12.5 Hz + * 1101: Reserved + * 1110: Reserved + * 1111: Reserved + * + * This field can be changed on-the-fly even if gyro sensor is on + */ +#define GYRO_CONFIG0_GYRO_ODR_POS 0x00 +#define GYRO_CONFIG0_GYRO_ODR_MASK 0x0f + + + +/* + * ACCEL_CONFIG0 + * Register Name : ACCEL_CONFIG0 + */ + +/* + * accel_ui_fs_sel + * Full scale select for accelerometer UI interface output + * + * 00: ±16g + * 01: ±8g + * 10: ±4g + * 11: ±2g + * + * This field can be changed on-the-fly even if accel sensor is on + */ +#define ACCEL_CONFIG0_ACCEL_UI_FS_SEL_POS 0x05 +#define ACCEL_CONFIG0_ACCEL_UI_FS_SEL_MASK (0x03 << ACCEL_CONFIG0_ACCEL_UI_FS_SEL_POS) + +/* + * accel_odr + * Accelerometer ODR selection for UI interface output + * + * 0000: Reserved + * 0001: Reserved + * 0010: Reserved + * 0011: Reserved + * 0100: Reserved + * 0101: 1.6 kHz (LN mode) + * 0110: 800 Hz (LN mode) + * 0111: 400 Hz (LP or LN mode) + * 1000: 200 Hz (LP or LN mode) + * 1001: 100 Hz (LP or LN mode) + * 1010: 50 Hz (LP or LN mode) + * 1011: 25 Hz (LP or LN mode) + * 1100: 12.5 Hz (LP or LN mode) + * 1101: 6.25 Hz (LP mode) + * 1110: 3.125 Hz (LP mode) + * 1111: 1.5625 Hz (LP mode) + * + * This field can be changed on-the-fly when accel sensor is on + */ +#define ACCEL_CONFIG0_ACCEL_ODR_POS 0x00 +#define ACCEL_CONFIG0_ACCEL_ODR_MASK 0x0f + + + +/* + * TEMP_CONFIG0 + * Register Name : TEMP_CONFIG0 + */ + +/* + * temp_filt_bw + * Sets the bandwidth of the temperature signal DLPF + * + * 000: DLPF bypassed + * 001: DLPF BW = 180 Hz + * 010: DLPF BW = 72 Hz + * 011: DLPF BW = 34 Hz + * 100: DLPF BW = 16 Hz + * 101: DLPF BW = 8 Hz + * 110: DLPF BW = 4 Hz + * 111: DLPF BW = 4 Hz + * + * This field can be changed on-the-fly even if sensor is on + */ +#define TEMP_CONFIG0_TEMP_FILT_BW_POS 0x04 +#define TEMP_CONFIG0_TEMP_FILT_BW_MASK (0x07 << TEMP_CONFIG0_TEMP_FILT_BW_POS) + + + +/* + * GYRO_CONFIG1 + * Register Name : GYRO_CONFIG1 + */ + +/* + * gyro_ui_filt_bw + * Selects GYRO UI low pass filter bandwidth + * + * 000: Low pass filter bypassed + * 001: 180 Hz + * 010: 121 Hz + * 011: 73 Hz + * 100: 53 Hz + * 101: 34 Hz + * 110: 25 Hz + * 111: 16 Hz + * + * This field can be changed on-the-fly even if gyro sensor is on + */ +#define GYRO_CONFIG1_GYRO_UI_FILT_BW_POS 0x00 +#define GYRO_CONFIG1_GYRO_UI_FILT_BW_MASK 0x07 + + + +/* + * ACCEL_CONFIG1 + * Register Name : ACCEL_CONFIG1 + */ + +/* + * accel_ui_avg + * Selects averaging filter setting to create accelerometer output in accelerometer low power mode (LPM) + * + * 000: 2x average + * 001: 4x average + * 010: 8x average + * 011: 16x average + * 100: 32x average + * 101: 64x average + * 110: 64x average + * 111: 64x average + * + * This field cannot be changed when the accel sensor is in LPM + */ +#define ACCEL_CONFIG1_ACCEL_UI_AVG_POS 0x04 +#define ACCEL_CONFIG1_ACCEL_UI_AVG_MASK (0x07 << ACCEL_CONFIG1_ACCEL_UI_AVG_POS) + +/* + * accel_ui_filt_bw + * Selects ACCEL UI low pass filter bandwidth + * + * 000: Low pass filter bypassed + * 001: 180 Hz + * 010: 121 Hz + * 011: 73 Hz + * 100: 53 Hz + * 101: 34 Hz + * 110: 25 Hz + * 111: 16 Hz + * + * This field can be changed on-the-fly even if accel sensor is on + */ +#define ACCEL_CONFIG1_ACCEL_UI_FILT_BW_POS 0x00 +#define ACCEL_CONFIG1_ACCEL_UI_FILT_BW_MASK 0x07 + + + +/* + * APEX_CONFIG0 + * Register Name : APEX_CONFIG0 + */ + +/* + * dmp_power_save_en + * When this bit is set to 1, power saving is enabled for DMP algorithms + */ +#define APEX_CONFIG0_DMP_POWER_SAVE_EN_POS 0x03 +#define APEX_CONFIG0_DMP_POWER_SAVE_EN_MASK (0x01 << APEX_CONFIG0_DMP_POWER_SAVE_EN_POS) + +/* + * dmp_init_en + * When this bit is set to 1, DMP runs DMP SW initialization procedure. Bit is reset by hardware when the procedure is finished. All other APEX features are ignored as long as DMP_INIT_EN is set. + * + * This field can be changed on-the-fly even if accel sensor is on. + */ +#define APEX_CONFIG0_DMP_INIT_EN_POS 0x02 +#define APEX_CONFIG0_DMP_INIT_EN_MASK (0x01 << APEX_CONFIG0_DMP_INIT_EN_POS) + +/* + * dmp_mem_reset_en + * When this bit is set to 1, it clears DMP SRAM for APEX operation or Self-test operation. + */ +#define APEX_CONFIG0_DMP_MEM_RESET_EN_POS 0x00 +#define APEX_CONFIG0_DMP_MEM_RESET_EN_MASK 0x03 + + + +/* + * APEX_CONFIG1 + * Register Name : APEX_CONFIG1 + */ + +/* + * smd_enable + * 0: Significant Motion Detection not enabled + * 1: Significant Motion Detection enabled + * + * This field can be changed on-the-fly even if accel sensor is on + */ +#define APEX_CONFIG1_SMD_ENABLE_POS 0x06 +#define APEX_CONFIG1_SMD_ENABLE_MASK (0x01 << APEX_CONFIG1_SMD_ENABLE_POS) + +/* + * ff_enable + * 0: Freefall Detection not enabled + * 1: Freefall Detection enabled + * + * This field can be changed on-the-fly even if accel sensor is on + */ +#define APEX_CONFIG1_FF_ENABLE_POS 0x05 +#define APEX_CONFIG1_FF_ENABLE_MASK (0x01 << APEX_CONFIG1_FF_ENABLE_POS) + +/* + * tilt_enable + * 0: Tilt Detection not enabled + * 1: Tilt Detection enabled + * + * This field can be changed on-the-fly even if accel sensor is on + */ +#define APEX_CONFIG1_TILT_ENABLE_POS 0x04 +#define APEX_CONFIG1_TILT_ENABLE_MASK (0x01 << APEX_CONFIG1_TILT_ENABLE_POS) + +/* + * ped_enable + * 0: Pedometer not enabled + * 1: Pedometer enabled + * + * This field can be changed on-the-fly even if accel sensor is on + */ +#define APEX_CONFIG1_PED_ENABLE_POS 0x03 +#define APEX_CONFIG1_PED_ENABLE_MASK (0x01 << APEX_CONFIG1_PED_ENABLE_POS) + +/* + * dmp_odr + * 00: 25 Hz + * 01: 400 Hz + * 10: 50 Hz + * 11: 100 Hz + * + * The ACCEL_ODR field must be configured to an ODR equal or greater to the DMP_ODR field, for correct device operation. + * + * This field can be changed on-the-fly even if accel sensor is on + */ +#define APEX_CONFIG1_DMP_ODR_POS 0x00 +#define APEX_CONFIG1_DMP_ODR_MASK 0x03 + + + +/* + * WOM_CONFIG + * Register Name : WOM_CONFIG + */ + +/* + * wom_int_dur + * Selects Wake on Motion interrupt assertion from among the following options + * + * 00: WoM interrupt asserted at first overthreshold event + * 01: WoM interrupt asserted at second overthreshold event + * 10: WoM interrupt asserted at third overthreshold event + * 11: WoM interrupt asserted at fourth overthreshold event + * + * This field can be changed on-the-fly even if accel sensor is on, but it cannot be changed if WOM_EN is already enabled + */ +#define WOM_CONFIG_WOM_INT_DUR_POS 0x03 +#define WOM_CONFIG_WOM_INT_DUR_MASK (0x03 << WOM_CONFIG_WOM_INT_DUR_POS) + +/* + * wom_int_mode + * 0: Set WoM interrupt on the OR of all enabled accelerometer thresholds + * 1: Set WoM interrupt on the AND of all enabled accelerometer thresholds + * + * This field can be changed on-the-fly even if accel sensor is on, but it cannot be changed if WOM_EN is already enabled + */ +#define WOM_CONFIG_WOM_INT_MODE_POS 0x02 +#define WOM_CONFIG_WOM_INT_MODE_MASK (0x01 << WOM_CONFIG_WOM_INT_MODE_POS) + +/* + * wom_mode + * 0 - Initial sample is stored. Future samples are compared to initial sample + * 1 - Compare current sample to previous sample + * + * This field can be changed on-the-fly even if accel sensor is already on, but it cannot be changed if wom_en is already enabled. + */ +#define WOM_CONFIG_WOM_MODE_POS 0x01 +#define WOM_CONFIG_WOM_MODE_MASK (0x01 << WOM_CONFIG_WOM_MODE_POS) + +/* + * wom_en + * 1: enable wake-on-motion detection. + * 0: disable wake-on-motion detection. + * + * This field can be changed on-the-fly even if accel sensor is already on. + */ +#define WOM_CONFIG_WOM_EN_POS 0x00 +#define WOM_CONFIG_WOM_EN_MASK 0x01 + + + +/* + * FIFO_CONFIG1 + * Register Name : FIFO_CONFIG1 + */ + +/* + * fifo_mode + * FIFO mode control + * + * 0: Stream-to-FIFO Mode + * 1: STOP-on-FULL Mode + */ +#define FIFO_CONFIG1_FIFO_MODE_POS 0x01 +#define FIFO_CONFIG1_FIFO_MODE_MASK (0x01 << FIFO_CONFIG1_FIFO_MODE_POS) + +/* + * fifo_bypass + * FIFO bypass control + * 0: FIFO is not bypassed + * 1: FIFO is bypassed + */ +#define FIFO_CONFIG1_FIFO_BYPASS_POS 0x00 +#define FIFO_CONFIG1_FIFO_BYPASS_MASK 0x01 + + + +/* + * FIFO_CONFIG2 + * Register Name : FIFO_CONFIG2 + */ + +/* + * fifo_wm + * FIFO watermark. Generate interrupt when the FIFO reaches or exceeds FIFO_WM size in bytes or records according to FIFO_COUNT_FORMAT setting. FIFO_WM_EN must be zero before writing this register. Interrupt only fires once. This register should be set to non-zero value, before choosing this interrupt source. + * + * This field should be changed when FIFO is empty to avoid spurious interrupts. + */ +#define FIFO_CONFIG2_FIFO_WM_POS 0x00 +#define FIFO_CONFIG2_FIFO_WM_MASK 0xff + + + +/* + * FIFO_CONFIG3 + * Register Name : FIFO_CONFIG3 + */ + +/* + * fifo_wm + * FIFO watermark. Generate interrupt when the FIFO reaches or exceeds FIFO_WM size in bytes or records according to FIFO_COUNT_FORMAT setting. FIFO_WM_EN must be zero before writing this register. Interrupt only fires once. This register should be set to non-zero value, before choosing this interrupt source. + * + * This field should be changed when FIFO is empty to avoid spurious interrupts. + */ +#define FIFO_CONFIG3_FIFO_WM_POS 0x00 +#define FIFO_CONFIG3_FIFO_WM_MASK 0x0f + + + +/* + * INT_SOURCE0 + * Register Name : INT_SOURCE0 + */ + +/* + * st_int1_en + * 0: Self-Test Done interrupt not routed to INT1 + * 1: Self-Test Done interrupt routed to INT1 + */ +#define INT_SOURCE0_ST_INT1_EN_POS 0x07 +#define INT_SOURCE0_ST_INT1_EN_MASK (0x01 << INT_SOURCE0_ST_INT1_EN_POS) + +/* + * fsync_int1_en + * 0: FSYNC interrupt not routed to INT1 + * 1: FSYNC interrupt routed to INT1 + */ +#define INT_SOURCE0_FSYNC_INT1_EN_POS 0x06 +#define INT_SOURCE0_FSYNC_INT1_EN_MASK (0x01 << INT_SOURCE0_FSYNC_INT1_EN_POS) + +/* + * pll_rdy_int1_en + * 0: PLL ready interrupt not routed to INT1 + * 1: PLL ready interrupt routed to INT1 + */ +#define INT_SOURCE0_PLL_RDY_INT1_EN_POS 0x05 +#define INT_SOURCE0_PLL_RDY_INT1_EN_MASK (0x01 << INT_SOURCE0_PLL_RDY_INT1_EN_POS) + +/* + * reset_done_int1_en + * 0: Reset done interrupt not routed to INT1 + * 1: Reset done interrupt routed to INT1 + */ +#define INT_SOURCE0_RESET_DONE_INT1_EN_POS 0x04 +#define INT_SOURCE0_RESET_DONE_INT1_EN_MASK (0x01 << INT_SOURCE0_RESET_DONE_INT1_EN_POS) + +/* + * drdy_int1_en + * 0: Data Ready interrupt not routed to INT1 + * 1: Data Ready interrupt routed to INT1 + */ +#define INT_SOURCE0_DRDY_INT1_EN_POS 0x03 +#define INT_SOURCE0_DRDY_INT1_EN_MASK (0x01 << INT_SOURCE0_DRDY_INT1_EN_POS) + +/* + * fifo_ths_int1_en + * 0: FIFO threshold interrupt not routed to INT1 + * 1: FIFO threshold interrupt routed to INT1 + */ +#define INT_SOURCE0_FIFO_THS_INT1_EN_POS 0x02 +#define INT_SOURCE0_FIFO_THS_INT1_EN_MASK (0x01 << INT_SOURCE0_FIFO_THS_INT1_EN_POS) + +/* + * fifo_full_int1_en + * 0: FIFO full interrupt not routed to INT1 + * 1: FIFO full interrupt routed to INT1 + * To avoid FIFO FULL interrupts while reading FIFO, this bit should be disabled while reading FIFO + */ +#define INT_SOURCE0_FIFO_FULL_INT1_EN_POS 0x01 +#define INT_SOURCE0_FIFO_FULL_INT1_EN_MASK (0x01 << INT_SOURCE0_FIFO_FULL_INT1_EN_POS) + +/* + * agc_rdy_int1_en + * 0: UI AGC ready interrupt not routed to INT1 + * 1: UI AGC ready interrupt routed to INT1 + */ +#define INT_SOURCE0_AGC_RDY_INT1_EN_POS 0x00 +#define INT_SOURCE0_AGC_RDY_INT1_EN_MASK 0x01 + + + +/* + * INT_SOURCE1 + * Register Name : INT_SOURCE1 + */ + +/* + * i3c_protocol_error_int1_en + * 0: I3CSM protocol error interrupt not routed to INT1 + * 1: I3CSM protocol error interrupt routed to INT1 + */ +#define INT_SOURCE1_I3C_PROTOCOL_ERROR_INT1_EN_POS 0x06 +#define INT_SOURCE1_I3C_PROTOCOL_ERROR_INT1_EN_MASK (0x01 << INT_SOURCE1_I3C_PROTOCOL_ERROR_INT1_EN_POS) + +/* + * smd_int1_en + * 0: SMD interrupt not routed to INT1 + * 1: SMD interrupt routed to INT1 + */ +#define INT_SOURCE1_SMD_INT1_EN_POS 0x03 +#define INT_SOURCE1_SMD_INT1_EN_MASK (0x01 << INT_SOURCE1_SMD_INT1_EN_POS) + +/* + * wom_z_int1_en + * 0: Z-axis WOM interrupt not routed to INT1 + * 1: Z-axis WOM interrupt routed to INT1 + */ +#define INT_SOURCE1_WOM_Z_INT1_EN_POS 0x02 +#define INT_SOURCE1_WOM_Z_INT1_EN_MASK (0x01 << INT_SOURCE1_WOM_Z_INT1_EN_POS) + +/* + * wom_y_int1_en + * 0: Y-axis WOM interrupt not routed to INT1 + * 1: Y-axis WOM interrupt routed to INT1 + */ +#define INT_SOURCE1_WOM_Y_INT1_EN_POS 0x01 +#define INT_SOURCE1_WOM_Y_INT1_EN_MASK (0x01 << INT_SOURCE1_WOM_Y_INT1_EN_POS) + +/* + * wom_x_int1_en + * 0: X-axis WOM interrupt not routed to INT1 + * 1: X-axis WOM interrupt routed to INT1 + */ +#define INT_SOURCE1_WOM_X_INT1_EN_POS 0x00 +#define INT_SOURCE1_WOM_X_INT1_EN_MASK 0x01 + + + +/* + * INT_SOURCE3 + * Register Name : INT_SOURCE3 + */ + +/* + * st_int2_en + * 0: Self-Test Done interrupt not routed to INT2 + * 1: Self-Test Done interrupt routed to INT2 + */ +#define INT_SOURCE3_ST_INT2_EN_POS 0x07 +#define INT_SOURCE3_ST_INT2_EN_MASK (0x01 << INT_SOURCE3_ST_INT2_EN_POS) + +/* + * fsync_int2_en + * 0: FSYNC interrupt not routed to INT2 + * 1: FSYNC interrupt routed to INT2 + */ +#define INT_SOURCE3_FSYNC_INT2_EN_POS 0x06 +#define INT_SOURCE3_FSYNC_INT2_EN_MASK (0x01 << INT_SOURCE3_FSYNC_INT2_EN_POS) + +/* + * pll_rdy_int2_en + * 0: PLL ready interrupt not routed to INT2 + * 1: PLL ready interrupt routed to INT2 + */ +#define INT_SOURCE3_PLL_RDY_INT2_EN_POS 0x05 +#define INT_SOURCE3_PLL_RDY_INT2_EN_MASK (0x01 << INT_SOURCE3_PLL_RDY_INT2_EN_POS) + +/* + * reset_done_int2_en + * 0: Reset done interrupt not routed to INT2 + * 1: Reset done interrupt routed to INT2 + */ +#define INT_SOURCE3_RESET_DONE_INT2_EN_POS 0x04 +#define INT_SOURCE3_RESET_DONE_INT2_EN_MASK (0x01 << INT_SOURCE3_RESET_DONE_INT2_EN_POS) + +/* + * drdy_int2_en + * 0: Data Ready interrupt not routed to INT2 + * 1: Data Ready interrupt routed to INT2 + */ +#define INT_SOURCE3_DRDY_INT2_EN_POS 0x03 +#define INT_SOURCE3_DRDY_INT2_EN_MASK (0x01 << INT_SOURCE3_DRDY_INT2_EN_POS) + +/* + * fifo_ths_int2_en + * 0: FIFO threshold interrupt not routed to INT2 + * 1: FIFO threshold interrupt routed to INT2 + */ +#define INT_SOURCE3_FIFO_THS_INT2_EN_POS 0x02 +#define INT_SOURCE3_FIFO_THS_INT2_EN_MASK (0x01 << INT_SOURCE3_FIFO_THS_INT2_EN_POS) + +/* + * fifo_full_int2_en + * 0: FIFO full interrupt not routed to INT2 + * 1: FIFO full interrupt routed to INT2 + */ +#define INT_SOURCE3_FIFO_FULL_INT2_EN_POS 0x01 +#define INT_SOURCE3_FIFO_FULL_INT2_EN_MASK (0x01 << INT_SOURCE3_FIFO_FULL_INT2_EN_POS) + +/* + * agc_rdy_int2_en + * 0: AGC ready interrupt not routed to INT2 + * 1: AGC ready interrupt routed to INT2 + */ +#define INT_SOURCE3_AGC_RDY_INT2_EN_POS 0x00 +#define INT_SOURCE3_AGC_RDY_INT2_EN_MASK 0x01 + + + +/* + * INT_SOURCE4 + * Register Name : INT_SOURCE4 + */ + +/* + * i3c_protocol_error_int2_en + * 0: I3CSM protocol error interrupt not routed to INT2 + * 1: I3CSM protocol error interrupt routed to INT2 + */ +#define INT_SOURCE4_I3C_PROTOCOL_ERROR_INT2_EN_POS 0x06 +#define INT_SOURCE4_I3C_PROTOCOL_ERROR_INT2_EN_MASK (0x01 << INT_SOURCE4_I3C_PROTOCOL_ERROR_INT2_EN_POS) + +/* + * smd_int2_en + * 0: SMD interrupt not routed to INT2 + * 1: SMD interrupt routed to INT2 + */ +#define INT_SOURCE4_SMD_INT2_EN_POS 0x03 +#define INT_SOURCE4_SMD_INT2_EN_MASK (0x01 << INT_SOURCE4_SMD_INT2_EN_POS) + +/* + * wom_z_int2_en + * 0: Z-axis WOM interrupt not routed to INT2 + * 1: Z-axis WOM interrupt routed to INT2 + */ +#define INT_SOURCE4_WOM_Z_INT2_EN_POS 0x02 +#define INT_SOURCE4_WOM_Z_INT2_EN_MASK (0x01 << INT_SOURCE4_WOM_Z_INT2_EN_POS) + +/* + * wom_y_int2_en + * 0: Y-axis WOM interrupt not routed to INT2 + * 1: Y-axis WOM interrupt routed to INT2 + */ +#define INT_SOURCE4_WOM_Y_INT2_EN_POS 0x01 +#define INT_SOURCE4_WOM_Y_INT2_EN_MASK (0x01 << INT_SOURCE4_WOM_Y_INT2_EN_POS) + +/* + * wom_x_int2_en + * 0: X-axis WOM interrupt not routed to INT2 + * 1: X-axis WOM interrupt routed to INT2 + */ +#define INT_SOURCE4_WOM_X_INT2_EN_POS 0x00 +#define INT_SOURCE4_WOM_X_INT2_EN_MASK 0x01 + + + +/* + * FIFO_LOST_PKT0 + * Register Name : FIFO_LOST_PKT0 + */ + +/* + * fifo_lost_pkt_cnt + * Stores the number of packets lost in the FIFO + */ +#define FIFO_LOST_PKT0_FIFO_LOST_PKT_CNT_POS 0x00 +#define FIFO_LOST_PKT0_FIFO_LOST_PKT_CNT_MASK 0xff + + + +/* + * FIFO_LOST_PKT1 + * Register Name : FIFO_LOST_PKT1 + */ + +/* + * fifo_lost_pkt_cnt + * Stores the number of packets lost in the FIFO + */ +#define FIFO_LOST_PKT1_FIFO_LOST_PKT_CNT_POS 0x00 +#define FIFO_LOST_PKT1_FIFO_LOST_PKT_CNT_MASK 0xff + + + +/* + * APEX_DATA0 + * Register Name : APEX_DATA0 + */ + +/* + * step_cnt + * This status register indicates number of step taken. + */ +#define APEX_DATA0_STEP_CNT_POS 0x00 +#define APEX_DATA0_STEP_CNT_MASK 0xff + + + +/* + * APEX_DATA1 + * Register Name : APEX_DATA1 + */ + +/* + * step_cnt + * This status register indicates number of step taken. + */ +#define APEX_DATA1_STEP_CNT_POS 0x00 +#define APEX_DATA1_STEP_CNT_MASK 0xff + + + +/* + * APEX_DATA2 + * Register Name : APEX_DATA2 + */ + +/* + * step_cadence + * Pedometer step cadence.Walk/run cadency in number of samples. Format is u6.2. + * E.g, At 50Hz and 2Hz walk frequency, the cadency is 25 samples. The register will output 100. + */ +#define APEX_DATA2_STEP_CADENCE_POS 0x00 +#define APEX_DATA2_STEP_CADENCE_MASK 0xff + + + +/* + * APEX_DATA3 + * Register Name : APEX_DATA3 + */ + +/* + * dmp_idle + * 0: Indicates DMP is running + * 1: Indicates DMP is idle + */ +#define APEX_DATA3_DMP_IDLE_POS 0x02 +#define APEX_DATA3_DMP_IDLE_MASK (0x01 << APEX_DATA3_DMP_IDLE_POS) + +/* + * activity_class + * Pedometer Output: Detected activity + * + * 00: Unknown + * 01: Walk + * 10: Run + * 11: Reserved + */ +#define APEX_DATA3_ACTIVITY_CLASS_POS 0x00 +#define APEX_DATA3_ACTIVITY_CLASS_MASK 0x03 + + + +/* + * INTF_CONFIG0 + * Register Name : INTF_CONFIG0 + */ + +/* + * fifo_count_format + * 0: FIFO count is reported in bytes + * 1: FIFO count is reported in records (1 record = 16 bytes for header + gyro + accel + temp sensor data + time stamp, or 8 bytes for header + gyro/accel + temp sensor data) + */ +#define INTF_CONFIG0_FIFO_COUNT_FORMAT_POS 0x06 +#define INTF_CONFIG0_FIFO_COUNT_FORMAT_MASK (0x01 << INTF_CONFIG0_FIFO_COUNT_FORMAT_POS) + +/* + * fifo_count_endian + * This bit applies to both fifo_count and lost_pkt_count + * 0 : Little Endian (The LSByte data is read first, followed by MSByte data). + * 1 : Big Endian (The MSByte data is read first, followed by LSByte data). + */ +#define INTF_CONFIG0_FIFO_COUNT_ENDIAN_POS 0x05 +#define INTF_CONFIG0_FIFO_COUNT_ENDIAN_MASK (0x01 << INTF_CONFIG0_FIFO_COUNT_ENDIAN_POS) + +/* + * sensor_data_endian + * This bit applies to sensor data to AP, and fifo data. + * 0 : Little Endian (The LSByte data is read first, followed by MSByte data). + * 1 : Big Endian (The MSByte data is read first, followed by LSByte data). + */ +#define INTF_CONFIG0_SENSOR_DATA_ENDIAN_POS 0x04 +#define INTF_CONFIG0_SENSOR_DATA_ENDIAN_MASK (0x01 << INTF_CONFIG0_SENSOR_DATA_ENDIAN_POS) + +/* + * INTF_CONFIG1 + * Register Name : INTF_CONFIG1 + */ + +/* + * i3c_sdr_en + * 0: I3CSM SDR mode not enabled + * 1: I3CSM SDR mode enabled + * + * Device will be in pure I2C mode if {I3C_SDR_EN, I3C_DDR_EN} = 00 + */ +#define INTF_CONFIG1_I3C_SDR_EN_POS 0x03 +#define INTF_CONFIG1_I3C_SDR_EN_MASK (0x01 << INTF_CONFIG1_I3C_SDR_EN_POS) + +/* + * i3c_ddr_en + * 0: I3CSM DDR mode not enabled + * 1: I3CSM DDR mode enabled + * + * This bit will not take effect unless I3C_SDR_EN = 1. + */ +#define INTF_CONFIG1_I3C_DDR_EN_POS 0x02 +#define INTF_CONFIG1_I3C_DDR_EN_MASK (0x01 << INTF_CONFIG1_I3C_DDR_EN_POS) + +/* + * clksel + * 00 Alway select internal RC oscillator + * 01 Select PLL when available, else select RC oscillator (default) + * 10 (Reserved) + * 11 Disable all clocks + */ +#define INTF_CONFIG1_CLKSEL_POS 0x00 +#define INTF_CONFIG1_CLKSEL_MASK 0x03 + + + +/* + * INT_STATUS_DRDY + * Register Name : INT_STATUS_DRDY + */ + +/* + * data_rdy_int + * This bit automatically sets to 1 when a Data Ready interrupt is generated. The bit clears to 0 after the register has been read. + */ +#define INT_STATUS_DRDY_DATA_RDY_INT_POS 0x00 +#define INT_STATUS_DRDY_DATA_RDY_INT_MASK 0x01 + + + +/* + * INT_STATUS + * Register Name : INT_STATUS + */ + +/* + * st_int + * This bit automatically sets to 1 when a Self Test done interrupt is generated. The bit clears to 0 after the register has been read. + */ +#define INT_STATUS_ST_INT_POS 0x07 +#define INT_STATUS_ST_INT_MASK (0x01 << INT_STATUS_ST_INT_POS) + +/* + * fsync_int + * This bit automatically sets to 1 when an FSYNC interrupt is generated. The bit clears to 0 after the register has been read. + */ +#define INT_STATUS_FSYNC_INT_POS 0x06 +#define INT_STATUS_FSYNC_INT_MASK (0x01 << INT_STATUS_FSYNC_INT_POS) + +/* + * pll_rdy_int + * This bit automatically sets to 1 when a PLL Ready interrupt is generated. The bit clears to 0 after the register has been read. + */ +#define INT_STATUS_PLL_RDY_INT_POS 0x05 +#define INT_STATUS_PLL_RDY_INT_MASK (0x01 << INT_STATUS_PLL_RDY_INT_POS) + +/* + * reset_done_int + * This bit automatically sets to 1 when software reset is complete. The bit clears to 0 after the register has been read. + */ +#define INT_STATUS_RESET_DONE_INT_POS 0x04 +#define INT_STATUS_RESET_DONE_INT_MASK (0x01 << INT_STATUS_RESET_DONE_INT_POS) + +/* + * fifo_ths_int + * This bit automatically sets to 1 when the FIFO buffer reaches the threshold value. The bit clears to 0 after the register has been read. + */ +#define INT_STATUS_FIFO_THS_INT_POS 0x02 +#define INT_STATUS_FIFO_THS_INT_MASK (0x01 << INT_STATUS_FIFO_THS_INT_POS) + +/* + * fifo_full_int + * This bit automatically sets to 1 when the FIFO buffer is full. The bit clears to 0 after the register has been read. + */ +#define INT_STATUS_FIFO_FULL_INT_POS 0x01 +#define INT_STATUS_FIFO_FULL_INT_MASK (0x01 << INT_STATUS_FIFO_FULL_INT_POS) + +/* + * agc_rdy_int + * This bit automatically sets to 1 when an AGC Ready interrupt is generated. The bit clears to 0 after the register has been read. + */ +#define INT_STATUS_AGC_RDY_INT_POS 0x00 +#define INT_STATUS_AGC_RDY_INT_MASK 0x01 + + + +/* + * INT_STATUS2 + * Register Name : INT_STATUS2 + */ + +/* + * smd_int + * Significant Motion Detection Interrupt, clears on read + */ +#define INT_STATUS2_SMD_INT_POS 0x03 +#define INT_STATUS2_SMD_INT_MASK (0x01 << INT_STATUS2_SMD_INT_POS) + +/* + * wom_x_int + * Wake on Motion Interrupt on X-axis, clears on read + */ +#define INT_STATUS2_WOM_X_INT_POS 0x02 +#define INT_STATUS2_WOM_X_INT_MASK (0x01 << INT_STATUS2_WOM_X_INT_POS) + +/* + * wom_y_int + * Wake on Motion Interrupt on Y-axis, clears on read + */ +#define INT_STATUS2_WOM_Y_INT_POS 0x01 +#define INT_STATUS2_WOM_Y_INT_MASK (0x01 << INT_STATUS2_WOM_Y_INT_POS) + +/* + * wom_z_int + * Wake on Motion Interrupt on Z-axis, clears on read + */ +#define INT_STATUS2_WOM_Z_INT_POS 0x00 +#define INT_STATUS2_WOM_Z_INT_MASK 0x01 + + + +/* + * INT_STATUS3 + * Register Name : INT_STATUS3 + */ + +/* + * step_det_int + * Step Detection Interrupt, clears on read + */ +#define INT_STATUS3_STEP_DET_INT_POS 0x05 +#define INT_STATUS3_STEP_DET_INT_MASK (0x01 << INT_STATUS3_STEP_DET_INT_POS) + +/* + * step_cnt_ovf_int + * Step Count Overflow Interrupt, clears on read + */ +#define INT_STATUS3_STEP_CNT_OVF_INT_POS 0x04 +#define INT_STATUS3_STEP_CNT_OVF_INT_MASK (0x01 << INT_STATUS3_STEP_CNT_OVF_INT_POS) + +/* + * tilt_det_int + * Tilt Detection Interrupt, clears on read + */ +#define INT_STATUS3_TILT_DET_INT_POS 0x03 +#define INT_STATUS3_TILT_DET_INT_MASK (0x01 << INT_STATUS3_TILT_DET_INT_POS) + +/* + * ff_det_int + * Freefall Interrupt, clears on read + */ +#define INT_STATUS3_FF_DET_INT_POS 0x02 +#define INT_STATUS3_FF_DET_INT_MASK (0x01 << INT_STATUS3_FF_DET_INT_POS) + +/* + * lowg_det_int + * LowG Interrupt, clears on read + */ +#define INT_STATUS3_LOWG_DET_INT_POS 0x01 +#define INT_STATUS3_LOWG_DET_INT_MASK (0x01 << INT_STATUS3_LOWG_DET_INT_POS) + + + +/* + * FIFO_COUNTH + * Register Name : FIFO_COUNTH + */ + +/* + * fifo_count + * Number of bytes in FIFO when fifo_count_format=0. + * Number of records in FIFO when fifo_count_format=1. + */ +#define FIFO_COUNTH_FIFO_COUNT_POS 0x00 +#define FIFO_COUNTH_FIFO_COUNT_MASK 0xff + + + +/* + * FIFO_COUNTL + * Register Name : FIFO_COUNTL + */ + +/* + * fifo_count + * Number of bytes in FIFO when fifo_count_format=0. + * Number of records in FIFO when fifo_count_format=1. + */ +#define FIFO_COUNTL_FIFO_COUNT_POS 0x00 +#define FIFO_COUNTL_FIFO_COUNT_MASK 0xff + + + +/* + * FIFO_DATA + * Register Name : FIFO_DATA + */ + +/* + * fifo_data + * FIFO data port + */ +#define FIFO_DATA_FIFO_DATA_POS 0x00 +#define FIFO_DATA_FIFO_DATA_MASK 0xff + + + +/* + * WHO_AM_I + * Register Name : WHO_AM_I + */ + +/* + * whoami + * Register to indicate to user which device is being accessed + */ +#define WHO_AM_I_WHOAMI_POS 0x00 +#define WHO_AM_I_WHOAMI_MASK 0xff + + + +/* + * BLK_SEL_W + * Register Name : BLK_SEL_W + */ + +/* + * blk_sel_w + * For write operation, select a 256-byte MCLK space, or 128-byte SCLK space. + * Automatically reset when OTP copy operation is triggered. + */ +#define BLK_SEL_W_BLK_SEL_W_POS 0x00 +#define BLK_SEL_W_BLK_SEL_W_MASK 0xff + + + +/* + * MADDR_W + * Register Name : MADDR_W + */ + +/* + * maddr_w + * For MREG write operation, the lower 8-bit address for accessing MCLK domain registers. + */ +#define MADDR_W_MADDR_W_POS 0x00 +#define MADDR_W_MADDR_W_MASK 0xff + + + +/* + * M_W + * Register Name : M_W + */ + +/* + * m_w + * For MREG write operation, the write port for accessing MCLK domain registers. + */ +#define M_W_M_W_POS 0x00 +#define M_W_M_W_MASK 0xff + + + +/* + * BLK_SEL_R + * Register Name : BLK_SEL_R + */ + +/* + * blk_sel_r + * For read operation, select a 256-byte MCLK space, or 128-byte SCLK space. + * Automatically reset when OTP copy operation is triggered. + */ +#define BLK_SEL_R_BLK_SEL_R_POS 0x00 +#define BLK_SEL_R_BLK_SEL_R_MASK 0xff + + + +/* + * MADDR_R + * Register Name : MADDR_R + */ + +/* + * maddr_r + * For MREG read operation, the lower 8-bit address for accessing MCLK domain registers. + */ +#define MADDR_R_MADDR_R_POS 0x00 +#define MADDR_R_MADDR_R_MASK 0xff + + + +/* + * M_R + * Register Name : M_R + */ + +/* + * m_r + * For MREG read operation, the read port for accessing MCLK domain registers. + */ +#define M_R_M_R_POS 0x00 +#define M_R_M_R_MASK 0xff + + +/* --------------------------------------------------------------------------- + * register MREG1 + * ---------------------------------------------------------------------------*/ + +/* + * TMST_CONFIG1 + * Register Name : TMST_CONFIG1 + */ + +/* + * tmst_res + * Time Stamp resolution; When set to 0 (default), time stamp resolution is 1 us. When set to 1, resolution is 16us + */ +#define TMST_CONFIG1_TMST_RES_POS 0x03 +#define TMST_CONFIG1_TMST_RES_MASK (0x01 << TMST_CONFIG1_TMST_RES_POS) + +/* + * tmst_delta_en + * Time Stamp delta Enable : When set to 1, the Time stamp field contains the measurement of time since the last occurrence of ODR. + */ +#define TMST_CONFIG1_TMST_DELTA_EN_POS 0x02 +#define TMST_CONFIG1_TMST_DELTA_EN_MASK (0x01 << TMST_CONFIG1_TMST_DELTA_EN_POS) + +/* + * tmst_fsync_en + * Time Stamp register Fsync Enable . When set to 1, the contents of the Timestamp feature of FSYNC is enabled. The user also needs to select fifo_tmst_fsync_en in order to propagate the timestamp value to the FIFO + */ +#define TMST_CONFIG1_TMST_FSYNC_EN_POS 0x01 +#define TMST_CONFIG1_TMST_FSYNC_EN_MASK (0x01 << TMST_CONFIG1_TMST_FSYNC_EN_POS) + +/* + * tmst_en + * Time Stamp register Enable + */ +#define TMST_CONFIG1_TMST_EN_POS 0x00 +#define TMST_CONFIG1_TMST_EN_MASK 0x01 + + + +/* + * FIFO_CONFIG5 + * Register Name : FIFO_CONFIG5 + */ + +/* + * fifo_wm_gt_th + * 1: trigger FIFO-Watermark interrupt on every ODR(DMA Write) if FIFO_COUNT: =FIFO_WM + * + * 0: Trigger FIFO-Watermark interrupt when FIFO_COUNT == FIFO_WM + */ +#define FIFO_CONFIG5_FIFO_WM_GT_TH_POS 0x05 +#define FIFO_CONFIG5_FIFO_WM_GT_TH_MASK (0x01 << FIFO_CONFIG5_FIFO_WM_GT_TH_POS) + +/* + * fifo_resume_partial_rd + * 0: FIFO is read in packets. If a partial packet is read, then the subsequent read will start from the beginning of the un-read packet. + * 1: FIFO can be read partially. When read is resumed, FIFO bytes will continue from last read point. The SW driver is responsible for cascading previous read and present read and maintain frame boundaries. + */ +#define FIFO_CONFIG5_FIFO_RESUME_PARTIAL_RD_POS 0x04 +#define FIFO_CONFIG5_FIFO_RESUME_PARTIAL_RD_MASK (0x01 << FIFO_CONFIG5_FIFO_RESUME_PARTIAL_RD_POS) + +/* + * fifo_hires_en + * Allows 20 bit resolution in the FIFO packet readout + */ +#define FIFO_CONFIG5_FIFO_HIRES_EN_POS 0x03 +#define FIFO_CONFIG5_FIFO_HIRES_EN_MASK (0x01 << FIFO_CONFIG5_FIFO_HIRES_EN_POS) + +/* + * fifo_tmst_fsync_en + * Allows the TMST in the FIFO to be replaced by the FSYNC timestamp + */ +#define FIFO_CONFIG5_FIFO_TMST_FSYNC_EN_POS 0x02 +#define FIFO_CONFIG5_FIFO_TMST_FSYNC_EN_MASK (0x01 << FIFO_CONFIG5_FIFO_TMST_FSYNC_EN_POS) + +/* + * fifo_gyro_en + * Enables Gyro Packets to go to FIFO + */ +#define FIFO_CONFIG5_FIFO_GYRO_EN_POS 0x01 +#define FIFO_CONFIG5_FIFO_GYRO_EN_MASK (0x01 << FIFO_CONFIG5_FIFO_GYRO_EN_POS) + +/* + * fifo_accel_en + * Enable Accel Packets to go to FIFO + */ +#define FIFO_CONFIG5_FIFO_ACCEL_EN_POS 0x00 +#define FIFO_CONFIG5_FIFO_ACCEL_EN_MASK 0x01 + + + +/* + * FIFO_CONFIG6 + * Register Name : FIFO_CONFIG6 + */ + +/* + * fifo_empty_indicator_dis + * 0: xFF is sent out as FIFO data when FIFO is empty. + * 1: The last FIFO data is sent out when FIFO is empty. + */ +#define FIFO_CONFIG6_FIFO_EMPTY_INDICATOR_DIS_POS 0x04 +#define FIFO_CONFIG6_FIFO_EMPTY_INDICATOR_DIS_MASK (0x01 << FIFO_CONFIG6_FIFO_EMPTY_INDICATOR_DIS_POS) + +/* + * rcosc_req_on_fifo_ths_dis + * 0: When the FIFO is operating in ALP+WUOSC mode and the watermark (WM) interrupt is enabled, the FIFO wakes up the system oscillator (RCOSC) as soon as the watermark level is reached. The system oscillator remains enabled until a Host FIFO read operation happens. This will temporarily cause a small increase in the power consumption due to the enabling of the system oscillator. + * 1: The system oscillator is not automatically woken-up by the FIFO/INT when the WM interrupt is triggered. The side effect is that the host can receive invalid packets until the system oscillator is off after it has been turned on for other reasons not related to a WM interrupt. + * + * The recommended setting of this bit is ‘1’ before entering and during all power modes excluding ALP with WUOSC. This is in order to avoid having to do a FIFO access/flush before entering sleep mode. During ALP with WUOSC it is recommended to set this bit to ‘0’. It is recommended to reset this bit back to ‘1’ before exiting ALP+WUOSC with a wait time of 1 ODR or higher. + */ +#define FIFO_CONFIG6_RCOSC_REQ_ON_FIFO_THS_DIS_POS 0x00 +#define FIFO_CONFIG6_RCOSC_REQ_ON_FIFO_THS_DIS_MASK 0x01 + + + +/* + * FSYNC_CONFIG + * Register Name : FSYNC_CONFIG + */ + +/* + * fsync_ui_sel + * this register was called (ext_sync_sel) + * 0 Do not tag Fsync flag + * 1 Tag Fsync flag to TEMP_OUT’s LSB + * 2 Tag Fsync flag to GYRO_XOUT’s LSB + * 3 Tag Fsync flag to GYRO_YOUT’s LSB + * 4 Tag Fsync flag to GYRO_ZOUT’s LSB + * 5 Tag Fsync flag to ACCEL_XOUT’s LSB + * 6 Tag Fsync flag to ACCEL_YOUT’s LSB + * 7 Tag Fsync flag to ACCEL_ZOUT’s LSB + */ +#define FSYNC_CONFIG_FSYNC_UI_SEL_POS 0x04 +#define FSYNC_CONFIG_FSYNC_UI_SEL_MASK (0x07 << FSYNC_CONFIG_FSYNC_UI_SEL_POS) + +/* + * fsync_ui_flag_clear_sel + * 0 means the FSYNC flag is cleared when UI sensor reg is updated + * 1 means the FSYNC flag is cleared when UI interface reads the sensor register LSB of FSYNC tagged axis + */ +#define FSYNC_CONFIG_FSYNC_UI_FLAG_CLEAR_SEL_POS 0x01 +#define FSYNC_CONFIG_FSYNC_UI_FLAG_CLEAR_SEL_MASK (0x01 << FSYNC_CONFIG_FSYNC_UI_FLAG_CLEAR_SEL_POS) + +/* + * fsync_polarity + * 0: Start from Rising edge of FSYNC pulse to measure FSYNC interval + * 1: Start from Falling edge of FSYNC pulse to measure FSYNC interval + */ +#define FSYNC_CONFIG_FSYNC_POLARITY_POS 0x00 +#define FSYNC_CONFIG_FSYNC_POLARITY_MASK 0x01 + + + +/* + * INT_CONFIG0 + * Register Name : INT_CONFIG0 + */ + +/* + * ui_drdy_int_clear + * Data Ready Interrupt Clear Option (latched mode) + * 00: Clear on Status Bit Read + * 01: Clear on Status Bit Read + * 10: Clear on Sensor Register Read + * 11: Clear on Status Bit Read OR on Sensor Register read + */ +#define INT_CONFIG0_UI_DRDY_INT_CLEAR_POS 0x04 +#define INT_CONFIG0_UI_DRDY_INT_CLEAR_MASK (0x03 << INT_CONFIG0_UI_DRDY_INT_CLEAR_POS) + +/* + * fifo_ths_int_clear + * FIFO Threshold Interrupt Clear Option (latched mode) + * 00: Clear on Status Bit Read + * 01: Clear on Status Bit Read + * 10: Clear on FIFO data 1Byte Read + * 11: Clear on Status Bit Read OR on FIFO data 1 byte read + */ +#define INT_CONFIG0_FIFO_THS_INT_CLEAR_POS 0x02 +#define INT_CONFIG0_FIFO_THS_INT_CLEAR_MASK (0x03 << INT_CONFIG0_FIFO_THS_INT_CLEAR_POS) + +/* + * fifo_full_int_clear + * FIFO Full Interrupt Clear Option (latched mode) + * 00: Clear on Status Bit Read + * 01: Clear on Status Bit Read + * 10: Clear on FIFO data 1Byte Read + * 11: Clear on Status Bit Read OR on FIFO data 1 byte read + */ +#define INT_CONFIG0_FIFO_FULL_INT_CLEAR_POS 0x00 +#define INT_CONFIG0_FIFO_FULL_INT_CLEAR_MASK 0x03 + + + +/* + * INT_CONFIG1 + * Register Name : INT_CONFIG1 + */ + +/* + * int_tpulse_duration + * 0 - (Default) Interrupt pulse duration is 100us + * 1- Interrupt pulse duration is 8 us + */ +#define INT_CONFIG1_INT_TPULSE_DURATION_POS 0x06 +#define INT_CONFIG1_INT_TPULSE_DURATION_MASK (0x01 << INT_CONFIG1_INT_TPULSE_DURATION_POS) + +/* + * int_async_reset + * 0: The interrupt pulse is reset as soon as the interrupt status register is read if the pulse is still active. + * 1: The interrupt pulse remains high for the intended duration independent of when the interrupt status register is read. This is the default and recommended setting. In this case, when in ALP with the WUOSC clock, the clearing of the interrupt status register requires up to one ODR period after reading. + */ +#define INT_CONFIG1_INT_ASYNC_RESET_POS 0x04 +#define INT_CONFIG1_INT_ASYNC_RESET_MASK (0x01 << INT_CONFIG1_INT_ASYNC_RESET_POS) + + + +/* + * SENSOR_CONFIG3 + * Register Name : SENSOR_CONFIG3 + */ + +/* + * apex_disable + * 1: Disable APEX features to extend FIFO size to 2.25 Kbytes + */ +#define SENSOR_CONFIG3_APEX_DISABLE_POS 0x06 +#define SENSOR_CONFIG3_APEX_DISABLE_MASK (0x01 << SENSOR_CONFIG3_APEX_DISABLE_POS) + +/* + * ST_CONFIG + * Register Name : ST_CONFIG + */ + +/* + * accel_st_reg + * User must set this bit to 1 when enabling accelerometer self-test and clear it to 0 when self-test procedure has completed. + */ +#define ST_CONFIG_ACCEL_ST_REG_POS 0x07 +#define ST_CONFIG_ACCEL_ST_REG_MASK (0x01 << ST_CONFIG_ACCEL_ST_REG_POS) + +/* + * st_number_sample + * This bit selects the number of sensor samples that should be used to process self-test + * 0: 16 samples + * 1: 200 samples + */ +#define ST_CONFIG_ST_NUMBER_SAMPLE_POS 0x06 +#define ST_CONFIG_ST_NUMBER_SAMPLE_MASK (0x01 << ST_CONFIG_ST_NUMBER_SAMPLE_POS) + +/* + * accel_st_lim + * These bits control the tolerated ratio between self-test processed values and reference (fused) ones for accelerometer. + * 0 : 5% + * 1: 10% + * 2: 15% + * 3: 20% + * 4: 25% + * 5: 30% + * 6: 40% + * 7: 50% + */ +#define ST_CONFIG_ACCEL_ST_LIM_POS 0x03 +#define ST_CONFIG_ACCEL_ST_LIM_MASK (0x07 << ST_CONFIG_ACCEL_ST_LIM_POS) + +/* + * gyro_st_lim + * These bits control the tolerated ratio between self-test processed values and reference (fused) ones for gyro. + * 0 : 5% + * 1: 10% + * 2: 15% + * 3: 20% + * 4: 25% + * 5: 30% + * 6: 40% + * 7: 50% + */ +#define ST_CONFIG_GYRO_ST_LIM_POS 0x00 +#define ST_CONFIG_GYRO_ST_LIM_MASK 0x07 + + + +/* + * SELFTEST + * Register Name : SELFTEST + */ + +/* + * gyro_st_en + * 1: enable gyro self test operation. Host needs to program this bit to 0 to move chip out of self test mode. If host programs this bit to 0 while st_busy = 1 and st_done =0, the current running self-test operation is terminated by host. + */ +#define SELFTEST_GYRO_ST_EN_POS 0x07 +#define SELFTEST_GYRO_ST_EN_MASK (0x01 << SELFTEST_GYRO_ST_EN_POS) + +/* + * accel_st_en + * 1: enable accel self test operation. Host needs to program this bit to 0 to move chip out of self test mode. If host programs this bit to 0 while st_busy = 1 and st_done =0, the current running self-test operation is terminated by host. + */ +#define SELFTEST_ACCEL_ST_EN_POS 0x06 +#define SELFTEST_ACCEL_ST_EN_MASK (0x01 << SELFTEST_ACCEL_ST_EN_POS) + +/* + * en_gz_st + * Enable Gyro Z-axis self test + */ +#define SELFTEST_EN_GZ_ST_POS 0x05 +#define SELFTEST_EN_GZ_ST_MASK (0x01 << SELFTEST_EN_GZ_ST_POS) + +/* + * en_gy_st + * Enable Gyro Y-axis self test + */ +#define SELFTEST_EN_GY_ST_POS 0x04 +#define SELFTEST_EN_GY_ST_MASK (0x01 << SELFTEST_EN_GY_ST_POS) + +/* + * en_gx_st + * Enable Gyro X-axis self test + */ +#define SELFTEST_EN_GX_ST_POS 0x03 +#define SELFTEST_EN_GX_ST_MASK (0x01 << SELFTEST_EN_GX_ST_POS) + +/* + * en_az_st + * Enable Accel Z-axis self test + */ +#define SELFTEST_EN_AZ_ST_POS 0x02 +#define SELFTEST_EN_AZ_ST_MASK (0x01 << SELFTEST_EN_AZ_ST_POS) + +/* + * en_ay_st + * Enable Accel Y-axis self test + */ +#define SELFTEST_EN_AY_ST_POS 0x01 +#define SELFTEST_EN_AY_ST_MASK (0x01 << SELFTEST_EN_AY_ST_POS) + +/* + * en_ax_st + * Enable Accel X-axis self test + */ +#define SELFTEST_EN_AX_ST_POS 0x00 +#define SELFTEST_EN_AX_ST_MASK 0x01 + + + +/* + * INTF_CONFIG6 + * Register Name : INTF_CONFIG6 + */ + +/* + * i3c_timeout_en + * Value of 1 to enable i2c/i3c timeout function + */ +#define INTF_CONFIG6_I3C_TIMEOUT_EN_POS 0x04 +#define INTF_CONFIG6_I3C_TIMEOUT_EN_MASK (0x01 << INTF_CONFIG6_I3C_TIMEOUT_EN_POS) + +/* + * i3c_ibi_byte_en + * I3C Enable IBI-payload function. + */ +#define INTF_CONFIG6_I3C_IBI_BYTE_EN_POS 0x03 +#define INTF_CONFIG6_I3C_IBI_BYTE_EN_MASK (0x01 << INTF_CONFIG6_I3C_IBI_BYTE_EN_POS) + +/* + * i3c_ibi_en + * I3C Enable IBI function. + */ +#define INTF_CONFIG6_I3C_IBI_EN_POS 0x02 +#define INTF_CONFIG6_I3C_IBI_EN_MASK (0x01 << INTF_CONFIG6_I3C_IBI_EN_POS) + + + +/* + * INTF_CONFIG10 + * Register Name : INTF_CONFIG10 + */ + +/* + * asynctime0_dis + * 1: Disable asynchronous timing control mode 0 operation. + */ +#define INTF_CONFIG10_ASYNCTIME0_DIS_POS 0x07 +#define INTF_CONFIG10_ASYNCTIME0_DIS_MASK (0x01 << INTF_CONFIG10_ASYNCTIME0_DIS_POS) + +/* + * INTF_CONFIG7 + * Register Name : INTF_CONFIG7 + */ + +/* + * i3c_ddr_wr_mode + * This bit controls how I3C slave treats the 1st 2-byte data from + * host in a DDR write operation. + * + * 0: (a) The 1st-byte in DDR-WR configures the starting register + * address where the write operation should occur. + * (b) The 2nd-byte in DDR-WR is ignored and dropped. + * (c) The 3rd-byte in DDR-WR will be written into the register + * with address specified by the 1st-byte. + * Or, the next DDR-RD will be starting from the address + * specified by the 1st-byte of previous DDR-WR. + * + * 1: (a) The 1st-byte in DDR-WR configures the starting register + * address where the write operation should occur. + * (b) The 2nd-byte in DDR-WR will be written into the register + * with address specified by the 1st-byte. + */ +#define INTF_CONFIG7_I3C_DDR_WR_MODE_POS 0x03 +#define INTF_CONFIG7_I3C_DDR_WR_MODE_MASK (0x01 << INTF_CONFIG7_I3C_DDR_WR_MODE_POS) + +/* + * OTP_CONFIG + * Register Name : OTP_CONFIG + */ + +/* + * otp_copy_mode + * 00: Reserved + * 01: Enable copying OTP block to SRAM + * 10: Reserved + * 11: Enable copying self-test data from OTP memory to SRAM + */ +#define OTP_CONFIG_OTP_COPY_MODE_POS 0x02 +#define OTP_CONFIG_OTP_COPY_MODE_MASK (0x03 << OTP_CONFIG_OTP_COPY_MODE_POS) + +/* + * INT_SOURCE6 + * Register Name : INT_SOURCE6 + */ + +/* + * ff_int1_en + * 0: Freefall interrupt not routed to INT1 + * 1: Freefall interrupt routed to INT1 + */ +#define INT_SOURCE6_FF_INT1_EN_POS 0x07 +#define INT_SOURCE6_FF_INT1_EN_MASK (0x01 << INT_SOURCE6_FF_INT1_EN_POS) + +/* + * lowg_int1_en + * 0: Low-g interrupt not routed to INT1 + * 1: Low-g interrupt routed to INT1 + */ +#define INT_SOURCE6_LOWG_INT1_EN_POS 0x06 +#define INT_SOURCE6_LOWG_INT1_EN_MASK (0x01 << INT_SOURCE6_LOWG_INT1_EN_POS) + +/* + * step_det_int1_en + * 0: Step detect interrupt not routed to INT1 + * 1: Step detect interrupt routed to INT1 + */ +#define INT_SOURCE6_STEP_DET_INT1_EN_POS 0x05 +#define INT_SOURCE6_STEP_DET_INT1_EN_MASK (0x01 << INT_SOURCE6_STEP_DET_INT1_EN_POS) + +/* + * step_cnt_ofl_int1_en + * 0: Step count overflow interrupt not routed to INT1 + * 1: Step count overflow interrupt routed to INT1 + */ +#define INT_SOURCE6_STEP_CNT_OFL_INT1_EN_POS 0x04 +#define INT_SOURCE6_STEP_CNT_OFL_INT1_EN_MASK (0x01 << INT_SOURCE6_STEP_CNT_OFL_INT1_EN_POS) + +/* + * tilt_det_int1_en + * 0: Tilt detect interrupt not routed to INT1 + * 1: Tile detect interrupt routed to INT1 + */ +#define INT_SOURCE6_TILT_DET_INT1_EN_POS 0x03 +#define INT_SOURCE6_TILT_DET_INT1_EN_MASK (0x01 << INT_SOURCE6_TILT_DET_INT1_EN_POS) + + + +/* + * INT_SOURCE7 + * Register Name : INT_SOURCE7 + */ + +/* + * ff_int2_en + * 0: Freefall interrupt not routed to INT2 + * 1: Freefall interrupt routed to INT2 + */ +#define INT_SOURCE7_FF_INT2_EN_POS 0x07 +#define INT_SOURCE7_FF_INT2_EN_MASK (0x01 << INT_SOURCE7_FF_INT2_EN_POS) + +/* + * lowg_int2_en + * 0: Low-g interrupt not routed to INT2 + * 1: Low-g interrupt routed to INT2 + */ +#define INT_SOURCE7_LOWG_INT2_EN_POS 0x06 +#define INT_SOURCE7_LOWG_INT2_EN_MASK (0x01 << INT_SOURCE7_LOWG_INT2_EN_POS) + +/* + * step_det_int2_en + * 0: Step detect interrupt not routed to INT2 + * 1: Step detect interrupt routed to INT2 + */ +#define INT_SOURCE7_STEP_DET_INT2_EN_POS 0x05 +#define INT_SOURCE7_STEP_DET_INT2_EN_MASK (0x01 << INT_SOURCE7_STEP_DET_INT2_EN_POS) + +/* + * step_cnt_ofl_int2_en + * 0: Step count overflow interrupt not routed to INT2 + * 1: Step count overflow interrupt routed to INT2 + */ +#define INT_SOURCE7_STEP_CNT_OFL_INT2_EN_POS 0x04 +#define INT_SOURCE7_STEP_CNT_OFL_INT2_EN_MASK (0x01 << INT_SOURCE7_STEP_CNT_OFL_INT2_EN_POS) + +/* + * tilt_det_int2_en + * 0: Tilt detect interrupt not routed to INT2 + * 1: Tile detect interrupt routed to INT2 + */ +#define INT_SOURCE7_TILT_DET_INT2_EN_POS 0x03 +#define INT_SOURCE7_TILT_DET_INT2_EN_MASK (0x01 << INT_SOURCE7_TILT_DET_INT2_EN_POS) + + + +/* + * INT_SOURCE8 + * Register Name : INT_SOURCE8 + */ + +/* + * fsync_ibi_en + * 0: FSYNC interrupt not routed to IBI + * 1: FSYNC interrupt routed to IBI + */ +#define INT_SOURCE8_FSYNC_IBI_EN_POS 0x05 +#define INT_SOURCE8_FSYNC_IBI_EN_MASK (0x01 << INT_SOURCE8_FSYNC_IBI_EN_POS) + +/* + * pll_rdy_ibi_en + * 0: PLL ready interrupt not routed to IBI + * 1: PLL ready interrupt routed to IBI + */ +#define INT_SOURCE8_PLL_RDY_IBI_EN_POS 0x04 +#define INT_SOURCE8_PLL_RDY_IBI_EN_MASK (0x01 << INT_SOURCE8_PLL_RDY_IBI_EN_POS) + +/* + * ui_drdy_ibi_en + * 0: UI data ready interrupt not routed to IBI + * 1: UI data ready interrupt routed to IBI + */ +#define INT_SOURCE8_UI_DRDY_IBI_EN_POS 0x03 +#define INT_SOURCE8_UI_DRDY_IBI_EN_MASK (0x01 << INT_SOURCE8_UI_DRDY_IBI_EN_POS) + +/* + * fifo_ths_ibi_en + * 0: FIFO threshold interrupt not routed to IBI + * 1: FIFO threshold interrupt routed to IBI + */ +#define INT_SOURCE8_FIFO_THS_IBI_EN_POS 0x02 +#define INT_SOURCE8_FIFO_THS_IBI_EN_MASK (0x01 << INT_SOURCE8_FIFO_THS_IBI_EN_POS) + +/* + * fifo_full_ibi_en + * 0: FIFO full interrupt not routed to IBI + * 1: FIFO full interrupt routed to IBI + */ +#define INT_SOURCE8_FIFO_FULL_IBI_EN_POS 0x01 +#define INT_SOURCE8_FIFO_FULL_IBI_EN_MASK (0x01 << INT_SOURCE8_FIFO_FULL_IBI_EN_POS) + +/* + * agc_rdy_ibi_en + * 0: AGC ready interrupt not routed to IBI + * 1: AGC ready interrupt routed to IBI + */ +#define INT_SOURCE8_AGC_RDY_IBI_EN_POS 0x00 +#define INT_SOURCE8_AGC_RDY_IBI_EN_MASK 0x01 + + + +/* + * INT_SOURCE9 + * Register Name : INT_SOURCE9 + */ + +/* + * i3c_protocol_error_ibi_en + * 0: I3CSM protocol error interrupt not routed to IBI + * 1: I3CSM protocol error interrupt routed to IBI + */ +#define INT_SOURCE9_I3C_PROTOCOL_ERROR_IBI_EN_POS 0x07 +#define INT_SOURCE9_I3C_PROTOCOL_ERROR_IBI_EN_MASK (0x01 << INT_SOURCE9_I3C_PROTOCOL_ERROR_IBI_EN_POS) + +/* + * ff_ibi_en + * 0: Freefall interrupt not routed to IBI + * 1: Freefall interrupt routed to IBI + */ +#define INT_SOURCE9_FF_IBI_EN_POS 0x06 +#define INT_SOURCE9_FF_IBI_EN_MASK (0x01 << INT_SOURCE9_FF_IBI_EN_POS) + +/* + * lowg_ibi_en + * 0: Low-g interrupt not routed to IBI + * 1: Low-g interrupt routed to IBI + */ +#define INT_SOURCE9_LOWG_IBI_EN_POS 0x05 +#define INT_SOURCE9_LOWG_IBI_EN_MASK (0x01 << INT_SOURCE9_LOWG_IBI_EN_POS) + +/* + * smd_ibi_en + * 0: SMD interrupt not routed to IBI + * 1: SMD interrupt routed to IBI + */ +#define INT_SOURCE9_SMD_IBI_EN_POS 0x04 +#define INT_SOURCE9_SMD_IBI_EN_MASK (0x01 << INT_SOURCE9_SMD_IBI_EN_POS) + +/* + * wom_z_ibi_en + * 0: Z-axis WOM interrupt not routed to IBI + * 1: Z-axis WOM interrupt routed to IBI + */ +#define INT_SOURCE9_WOM_Z_IBI_EN_POS 0x03 +#define INT_SOURCE9_WOM_Z_IBI_EN_MASK (0x01 << INT_SOURCE9_WOM_Z_IBI_EN_POS) + +/* + * wom_y_ibi_en + * 0: Y-axis WOM interrupt not routed to IBI + * 1: Y-axis WOM interrupt routed to IBI + */ +#define INT_SOURCE9_WOM_Y_IBI_EN_POS 0x02 +#define INT_SOURCE9_WOM_Y_IBI_EN_MASK (0x01 << INT_SOURCE9_WOM_Y_IBI_EN_POS) + +/* + * wom_x_ibi_en + * 0: X-axis WOM interrupt not routed to IBI + * 1: X-axis WOM interrupt routed to IBI + */ +#define INT_SOURCE9_WOM_X_IBI_EN_POS 0x01 +#define INT_SOURCE9_WOM_X_IBI_EN_MASK (0x01 << INT_SOURCE9_WOM_X_IBI_EN_POS) + +/* + * st_done_ibi_en + * 0: Self-test done interrupt not routed to IBI + * 1: Self-test done interrupt routed to IBI + */ +#define INT_SOURCE9_ST_DONE_IBI_EN_POS 0x00 +#define INT_SOURCE9_ST_DONE_IBI_EN_MASK 0x01 + + + +/* + * INT_SOURCE10 + * Register Name : INT_SOURCE10 + */ + +/* + * step_det_ibi_en + * 0: Step detect interrupt not routed to IBI + * 1: Step detect interrupt routed to IBI + */ +#define INT_SOURCE10_STEP_DET_IBI_EN_POS 0x05 +#define INT_SOURCE10_STEP_DET_IBI_EN_MASK (0x01 << INT_SOURCE10_STEP_DET_IBI_EN_POS) + +/* + * step_cnt_ofl_ibi_en + * 0: Step count overflow interrupt not routed to IBI + * 1: Step count overflow interrupt routed to IBI + */ +#define INT_SOURCE10_STEP_CNT_OFL_IBI_EN_POS 0x04 +#define INT_SOURCE10_STEP_CNT_OFL_IBI_EN_MASK (0x01 << INT_SOURCE10_STEP_CNT_OFL_IBI_EN_POS) + +/* + * tilt_det_ibi_en + * 0: Tilt detect interrupt not routed to IBI + * 1: Tile detect interrupt routed to IBI + */ +#define INT_SOURCE10_TILT_DET_IBI_EN_POS 0x03 +#define INT_SOURCE10_TILT_DET_IBI_EN_MASK (0x01 << INT_SOURCE10_TILT_DET_IBI_EN_POS) + + + +/* + * APEX_CONFIG2 + * Register Name : APEX_CONFIG2 + */ + +/* + * low_energy_amp_th_sel + * Threshold to select a valid step. Used to increase step detection for slow walk use case. + * + * 0000: 30 mg + * 0001: 35 mg + * 0010: 40 mg + * 0011: 45 mg + * 0100: 50 mg + * 0101: 55 mg + * 0110: 60 mg + * 0111: 65 mg + * 1000: 70 mg + * 1001: 75 mg + * 1010: 80 mg (default) + * 1011: 85 mg + * 1100: 90 mg + * 1101: 95 mg + * 1110: 100 mg + * 1111: 105 mg + */ +#define APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS 0x04 +#define APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_MASK (0x0f << APEX_CONFIG2_LOW_ENERGY_AMP_TH_SEL_POS) + +/* + * dmp_power_save_time_sel + * Duration of the period while the DMP stays awake after receiving a WOM event. + * + * 0000: 0 seconds + * 0001: 4 seconds + * 0010: 8 seconds (default) + * 0011: 12 seconds + * 0100: 16 seconds + * 0101: 20 seconds + * 0110: 24 seconds + * 0111: 28 seconds + * 1000: 32 seconds + * 1001: 36 seconds + * 1010: 40 seconds + * 1011: 44 seconds + * 1100: 48 seconds + * 1101: 52 seconds + * 1110: 56 seconds + * 1111: 60 seconds + */ +#define APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_POS 0x00 +#define APEX_CONFIG2_DMP_POWER_SAVE_TIME_SEL_MASK 0x0f + + + +/* + * APEX_CONFIG3 + * Register Name : APEX_CONFIG3 + */ + +/* + * ped_amp_th_sel + * Threshold of step detection sensitivity. + * + * Low values increase detection sensitivity: reduce miss-detection. + * High values reduce detection sensitivity: reduce false-positive. + * + * 0000: 30 mg + * 0001: 34 mg + * 0010: 38 mg + * 0011: 42 mg + * 0100: 46 mg + * 0101: 50 mg + * 0110: 54 mg + * 0111: 58 mg + * 1000: 62 mg (default) + * 1001: 66 mg + * 1010: 70 mg + * 1011: 74 mg + * 1100: 78 mg + * 1101: 82 mg + * 1110: 86 mg + * 1111: 90 mg + */ +#define APEX_CONFIG3_PED_AMP_TH_SEL_POS 0x04 +#define APEX_CONFIG3_PED_AMP_TH_SEL_MASK (0x0f << APEX_CONFIG3_PED_AMP_TH_SEL_POS) + +/* + * ped_step_cnt_th_sel + * Minimum number of steps that must be detected before step count is incremented. + * + * Low values reduce latency but increase false positives. + * High values increase step count accuracy but increase latency. + * + * 0000: 0 steps + * 0001: 1 step + * 0010: 2 steps + * 0011: 3 steps + * 0100: 4 steps + * 0101: 5 steps (default) + * 0110: 6 steps + * 0111: 7 steps + * 1000: 8 steps + * 1001: 9 steps + * 1010: 10 steps + * 1011: 11 steps + * 1100: 12 steps + * 1101: 13 steps + * 1110: 14 steps + * 1111: 15 steps + */ +#define APEX_CONFIG3_PED_STEP_CNT_TH_SEL_POS 0x00 +#define APEX_CONFIG3_PED_STEP_CNT_TH_SEL_MASK 0x0f + + + +/* + * APEX_CONFIG4 + * Register Name : APEX_CONFIG4 + */ + +/* + * ped_step_det_th_sel + * Minimum number of steps that must be detected before step event is signaled. + * + * Low values reduce latency but increase false positives. + * High values increase step event validity but increase latency. + * + * 000: 0 steps + * 001: 1 step + * 010: 2 steps (default) + * 011: 3 steps + * 100: 4 steps + * 101: 5 steps + * 110: 6 steps + * 111: 7 steps + */ +#define APEX_CONFIG4_PED_STEP_DET_TH_SEL_POS 0x05 +#define APEX_CONFIG4_PED_STEP_DET_TH_SEL_MASK (0x07 << APEX_CONFIG4_PED_STEP_DET_TH_SEL_POS) + +/* + * ped_sb_timer_th_sel + * Duration before algorithm considers that user has stopped taking steps. + * + * 000: 50 samples + * 001: 75 sample + * 010: 100 samples + * 011: 125 samples + * 100: 150 samples (default) + * 101: 175 samples + * 110: 200 samples + * 111: 225 samples + */ +#define APEX_CONFIG4_PED_SB_TIMER_TH_SEL_POS 0x02 +#define APEX_CONFIG4_PED_SB_TIMER_TH_SEL_MASK (0x07 << APEX_CONFIG4_PED_SB_TIMER_TH_SEL_POS) + +/* + * ped_hi_en_th_sel + * Threshold to classify acceleration signal as motion not due to steps. + * + * High values improve vibration rejection. + * Low values improve detection. + * + * 00: 87.89 mg + * 01: 104.49 mg (default) + * 10: 132.81 mg + * 11: 155.27 mg + */ +#define APEX_CONFIG4_PED_HI_EN_TH_SEL_POS 0x00 +#define APEX_CONFIG4_PED_HI_EN_TH_SEL_MASK 0x03 + + + +/* + * APEX_CONFIG5 + * Register Name : APEX_CONFIG5 + */ + +/* + * tilt_wait_time_sel + * Minimum duration for which the device should be tilted before signaling event. + * + * 00: 0s + * 01: 2s + * 10: 4s (default) + * 11: 6s + */ +#define APEX_CONFIG5_TILT_WAIT_TIME_SEL_POS 0x06 +#define APEX_CONFIG5_TILT_WAIT_TIME_SEL_MASK (0x03 << APEX_CONFIG5_TILT_WAIT_TIME_SEL_POS) + +/* + * lowg_peak_th_hyst_sel + * Hysteresis value added to the low-g threshold after exceeding it. + * + * 000: 31 mg (default) + * 001: 63 mg + * 010: 94 mg + * 011: 125 mg + * 100: 156 mg + * 101: 188 mg + * 110: 219 mg + * 111: 250 mg + */ +#define APEX_CONFIG5_LOWG_PEAK_TH_HYST_SEL_POS 0x03 +#define APEX_CONFIG5_LOWG_PEAK_TH_HYST_SEL_MASK (0x07 << APEX_CONFIG5_LOWG_PEAK_TH_HYST_SEL_POS) + +/* + * highg_peak_th_hyst_sel + * Hysteresis value subtracted from the high-g threshold after exceeding it. + * + * 000: 31 mg (default) + * 001: 63 mg + * 010: 94 mg + * 011: 125 mg + * 100: 156 mg + * 101: 188 mg + * 110: 219 mg + * 111: 250 mg + */ +#define APEX_CONFIG5_HIGHG_PEAK_TH_HYST_SEL_POS 0x00 +#define APEX_CONFIG5_HIGHG_PEAK_TH_HYST_SEL_MASK 0x07 + + + +/* + * APEX_CONFIG9 + * Register Name : APEX_CONFIG9 + */ + +/* + * ff_debounce_duration_sel + * Period after a freefall is signaled during which a new freefall will not be detected. Prevents false detection due to bounces. + * + * 0000: 0 ms + * 0001: 1250 ms + * 0010: 1375 ms + * 0011: 1500 ms + * 0100: 1625 ms + * 0101: 1750 ms + * 0110: 1875 ms + * 0111: 2000 ms + * 1000: 2125 ms (default) + * 1001: 2250 ms + * 1010: 2375 ms + * 1011: 2500 ms + * 1100: 2625 ms + * 1101: 2750 ms + * 1110: 2875 ms + * 1111: 3000 ms + */ +#define APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS 0x04 +#define APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_MASK (0x0f << APEX_CONFIG9_FF_DEBOUNCE_DURATION_SEL_POS) + +/* + * smd_sensitivity_sel + * Parameter to tune SMD algorithm robustness to rejection, ranging from 0 to 4 (values higher than 4 are reserved). + * + * Low values increase detection rate but increase false positives. + * High values reduce false positives but reduce detection rate (especially for transport use cases). + * + * Default value is 0. + */ +#define APEX_CONFIG9_SMD_SENSITIVITY_SEL_POS 0x01 +#define APEX_CONFIG9_SMD_SENSITIVITY_SEL_MASK (0x07 << APEX_CONFIG9_SMD_SENSITIVITY_SEL_POS) + +/* + * sensitivity_mode + * Pedometer sensitivity mode + * 0: Normal (default) + * 1: Slow walk + * + * Slow walk mode improves slow walk detection (<1Hz) but the number of false positives may increase. + */ +#define APEX_CONFIG9_SENSITIVITY_MODE_POS 0x00 +#define APEX_CONFIG9_SENSITIVITY_MODE_MASK 0x01 + + + +/* + * APEX_CONFIG10 + * Register Name : APEX_CONFIG10 + */ + +/* + * lowg_peak_th_sel + * Threshold for accel values below which low-g state is detected. + * + * 00000: 31 mg (default) + * 00001: 63 mg + * 00010: 94 mg + * 00011: 125 mg + * 00100: 156 mg + * 00101: 188 mg + * 00110: 219 mg + * 00111: 250 mg + * 01000: 281 mg + * 01001: 313 mg + * 01010: 344 mg + * 01011: 375 mg + * 01100: 406 mg + * 01101: 438 mg + * 01110: 469 mg + * 01111: 500 mg + * 10000: 531 mg + * 10001: 563 mg + * 10010: 594 mg + * 10011: 625 mg + * 10100: 656 mg + * 10101: 688 mg + * 10110: 719 mg + * 10111: 750 mg + * 11000: 781 mg + * 11001: 813 mg + * 11010: 844 mg + * 11011: 875 mg + * 11100: 906 mg + * 11101: 938 mg + * 11110: 969 mg + * 11111: 1000 mg + */ +#define APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS 0x03 +#define APEX_CONFIG10_LOWG_PEAK_TH_SEL_MASK (0x1f << APEX_CONFIG10_LOWG_PEAK_TH_SEL_POS) + +/* + * lowg_time_th_sel + * Number of samples required to enter low-g state. + * + * 000: 1 sample (default) + * 001: 2 samples + * 010: 3 samples + * 011: 4 samples + * 100: 5 samples + * 101: 6 samples + * 110: 7 samples + * 111: 8 samples + */ +#define APEX_CONFIG10_LOWG_TIME_TH_SEL_POS 0x00 +#define APEX_CONFIG10_LOWG_TIME_TH_SEL_MASK 0x07 + + + +/* + * APEX_CONFIG11 + * Register Name : APEX_CONFIG11 + */ + +/* + * highg_peak_th_sel + * Threshold for accel values above which high-g state is detected. + * + * 00000: 250 mg (default) + * 00001: 500 mg + * 00010: 750 mg + * 00011: 1000 mg + * 00100: 1250 mg + * 00101: 1500 mg + * 00110: 1750 mg + * 00111: 2000 mg + * 01000: 2250 mg + * 01001: 2500 mg + * 01010: 2750 mg + * 01011: 3000 mg + * 01100: 3250 mg + * 01101: 3500 mg + * 01110: 3750 mg + * 01111: 4000 mg + * 10000: 4250 mg + * 10001: 4500 mg + * 10010: 4750 mg + * 10011: 5000 mg + * 10100: 5250 mg + * 10101: 5500 mg + * 10110: 5750 mg + * 10111: 6000 mg + * 11000: 6250 mg + * 11001: 6500 mg + * 11010: 6750 mg + * 11011: 7000 mg + * 11100: 7250 mg + * 11101: 7500 mg + * 11110: 7750 mg + * 11111: 8000 mg + */ +#define APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS 0x03 +#define APEX_CONFIG11_HIGHG_PEAK_TH_SEL_MASK (0x1f << APEX_CONFIG11_HIGHG_PEAK_TH_SEL_POS) + +/* + * highg_time_th_sel + * Number of samples required to enter high-g state. + * + * 000: 1 sample (default) + * 001: 2 samples + * 010: 3 samples + * 011: 4 samples + * 100: 5 samples + * 101: 6 samples + * 110: 7 samples + * 111: 8 samples + */ +#define APEX_CONFIG11_HIGHG_TIME_TH_SEL_POS 0x00 +#define APEX_CONFIG11_HIGHG_TIME_TH_SEL_MASK 0x07 + + + +/* + * ACCEL_WOM_X_THR + * Register Name : ACCEL_WOM_X_THR + */ + +/* + * wom_x_th + * Threshold value for the Wake on Motion Interrupt for X-axis accelerometer + * WoM thresholds are expressed in fixed “mg” independent of the selected Range [0g : 1g]; Resolution 1g/256=~3.9mg + */ +#define ACCEL_WOM_X_THR_WOM_X_TH_POS 0x00 +#define ACCEL_WOM_X_THR_WOM_X_TH_MASK 0xff + + + +/* + * ACCEL_WOM_Y_THR + * Register Name : ACCEL_WOM_Y_THR + */ + +/* + * wom_y_th + * Threshold value for the Wake on Motion Interrupt for Y-axis accelerometer + * WoM thresholds are expressed in fixed “mg” independent of the selected Range [0g : 1g]; Resolution 1g/256=~3.9mg + */ +#define ACCEL_WOM_Y_THR_WOM_Y_TH_POS 0x00 +#define ACCEL_WOM_Y_THR_WOM_Y_TH_MASK 0xff + + + +/* + * ACCEL_WOM_Z_THR + * Register Name : ACCEL_WOM_Z_THR + */ + +/* + * wom_z_th + * Threshold value for the Wake on Motion Interrupt for Z-axis accelerometer + * WoM thresholds are expressed in fixed “mg” independent of the selected Range [0g : 1g]; Resolution 1g/256=~3.9mg + */ +#define ACCEL_WOM_Z_THR_WOM_Z_TH_POS 0x00 +#define ACCEL_WOM_Z_THR_WOM_Z_TH_MASK 0xff + + + +/* + * OFFSET_USER0 + * Register Name : OFFSET_USER0 + */ + +/* + * gyro_x_offuser + * Gyro offset programmed by user. Max value is +/-64 dps, resolution is 1/32 dps + */ +#define OFFSET_USER0_GYRO_X_OFFUSER_POS 0x00 +#define OFFSET_USER0_GYRO_X_OFFUSER_MASK 0xff + + + +/* + * OFFSET_USER1 + * Register Name : OFFSET_USER1 + */ + +/* + * gyro_x_offuser + * Gyro offset programmed by user. Max value is +/-64 dps, resolution is 1/32 dps + */ +#define OFFSET_USER1_GYRO_X_OFFUSER_POS 0x00 +#define OFFSET_USER1_GYRO_X_OFFUSER_MASK 0x0f + +/* + * gyro_y_offuser + * Gyro offset programmed by user. Max value is +/-64 dps, resolution is 1/32 dps + */ +#define OFFSET_USER1_GYRO_Y_OFFUSER_POS 0x04 +#define OFFSET_USER1_GYRO_Y_OFFUSER_MASK (0x0f << OFFSET_USER1_GYRO_Y_OFFUSER_POS) + + + +/* + * OFFSET_USER2 + * Register Name : OFFSET_USER2 + */ + +/* + * gyro_y_offuser + * Gyro offset programmed by user. Max value is +/-64 dps, resolution is 1/32 dps + */ +#define OFFSET_USER2_GYRO_Y_OFFUSER_POS 0x00 +#define OFFSET_USER2_GYRO_Y_OFFUSER_MASK 0xff + + + +/* + * OFFSET_USER3 + * Register Name : OFFSET_USER3 + */ + +/* + * gyro_z_offuser + * Gyro offset programmed by user. Max value is +/-64 dps, resolution is 1/32 dps + */ +#define OFFSET_USER3_GYRO_Z_OFFUSER_POS 0x00 +#define OFFSET_USER3_GYRO_Z_OFFUSER_MASK 0xff + + + +/* + * OFFSET_USER4 + * Register Name : OFFSET_USER4 + */ + +/* + * gyro_z_offuser + * Gyro offset programmed by user. Max value is +/-64 dps, resolution is 1/32 dps + */ +#define OFFSET_USER4_GYRO_Z_OFFUSER_POS 0x00 +#define OFFSET_USER4_GYRO_Z_OFFUSER_MASK 0x0f + +/* + * accel_x_offuser + * Accel offset programmed by user. Max value is +/-1 gee, resolution is 0.5 mgee + */ +#define OFFSET_USER4_ACCEL_X_OFFUSER_POS 0x04 +#define OFFSET_USER4_ACCEL_X_OFFUSER_MASK (0x0f << OFFSET_USER4_ACCEL_X_OFFUSER_POS) + + + +/* + * OFFSET_USER5 + * Register Name : OFFSET_USER5 + */ + +/* + * accel_x_offuser + * Accel offset programmed by user. Max value is +/-1 gee, resolution is 0.5 mgee + */ +#define OFFSET_USER5_ACCEL_X_OFFUSER_POS 0x00 +#define OFFSET_USER5_ACCEL_X_OFFUSER_MASK 0xff + + + +/* + * OFFSET_USER6 + * Register Name : OFFSET_USER6 + */ + +/* + * accel_y_offuser + * Accel offset programmed by user. Max value is +/-1 gee, resolution is 0.5 mgee + */ +#define OFFSET_USER6_ACCEL_Y_OFFUSER_POS 0x00 +#define OFFSET_USER6_ACCEL_Y_OFFUSER_MASK 0xff + + + +/* + * OFFSET_USER7 + * Register Name : OFFSET_USER7 + */ + +/* + * accel_y_offuser + * Accel offset programmed by user. Max value is +/-1 gee, resolution is 0.5 mgee + */ +#define OFFSET_USER7_ACCEL_Y_OFFUSER_POS 0x00 +#define OFFSET_USER7_ACCEL_Y_OFFUSER_MASK 0x0f + +/* + * accel_z_offuser + * Accel offset programmed by user. Max value is +/-1 gee, resolution is 0.5 mgee + */ +#define OFFSET_USER7_ACCEL_Z_OFFUSER_POS 0x04 +#define OFFSET_USER7_ACCEL_Z_OFFUSER_MASK (0x0f << OFFSET_USER7_ACCEL_Z_OFFUSER_POS) + + + +/* + * OFFSET_USER8 + * Register Name : OFFSET_USER8 + */ + +/* + * accel_z_offuser + * Accel offset programmed by user. Max value is +/-1 gee, resolution is 0.5 mgee + */ +#define OFFSET_USER8_ACCEL_Z_OFFUSER_POS 0x00 +#define OFFSET_USER8_ACCEL_Z_OFFUSER_MASK 0xff + + + +/* + * ST_STATUS1 + * Register Name : ST_STATUS1 + */ + +/* + * accel_st_pass + * 1: Accel self-test passed for all the 3 axes + */ +#define ST_STATUS1_ACCEL_ST_PASS_POS 0x05 +#define ST_STATUS1_ACCEL_ST_PASS_MASK (0x01 << ST_STATUS1_ACCEL_ST_PASS_POS) + +/* + * accel_st_done + * 1: Accel self-test done for all the 3 axes + */ +#define ST_STATUS1_ACCEL_ST_DONE_POS 0x04 +#define ST_STATUS1_ACCEL_ST_DONE_MASK (0x01 << ST_STATUS1_ACCEL_ST_DONE_POS) + +/* + * az_st_pass + * 1: Accel Z-axis self-test passed + */ +#define ST_STATUS1_AZ_ST_PASS_POS 0x03 +#define ST_STATUS1_AZ_ST_PASS_MASK (0x01 << ST_STATUS1_AZ_ST_PASS_POS) + +/* + * ay_st_pass + * 1: Accel Y-axis self-test passed + */ +#define ST_STATUS1_AY_ST_PASS_POS 0x02 +#define ST_STATUS1_AY_ST_PASS_MASK (0x01 << ST_STATUS1_AY_ST_PASS_POS) + +/* + * ax_st_pass + * 1: Accel X-axis self-test passed + */ +#define ST_STATUS1_AX_ST_PASS_POS 0x01 +#define ST_STATUS1_AX_ST_PASS_MASK (0x01 << ST_STATUS1_AX_ST_PASS_POS) + + + +/* + * ST_STATUS2 + * Register Name : ST_STATUS2 + */ + +/* + * st_incomplete + * 1: Self-test is incomplete. + * This bit is set to 1 if the self-test was aborted. + * One possible cause of aborting the self-test may be the detection of significant movement in the gyro when the self-test for gyro and/or accel is being executed. + */ +#define ST_STATUS2_ST_INCOMPLETE_POS 0x06 +#define ST_STATUS2_ST_INCOMPLETE_MASK (0x01 << ST_STATUS2_ST_INCOMPLETE_POS) + +/* + * gyro_st_pass + * 1: Gyro self-test passed for all the 3 axes + */ +#define ST_STATUS2_GYRO_ST_PASS_POS 0x05 +#define ST_STATUS2_GYRO_ST_PASS_MASK (0x01 << ST_STATUS2_GYRO_ST_PASS_POS) + +/* + * gyro_st_done + * 1: Gyro self-test done for all the 3 axes + */ +#define ST_STATUS2_GYRO_ST_DONE_POS 0x04 +#define ST_STATUS2_GYRO_ST_DONE_MASK (0x01 << ST_STATUS2_GYRO_ST_DONE_POS) + +/* + * gz_st_pass + * 1: Gyro Z-axis self-test passed + */ +#define ST_STATUS2_GZ_ST_PASS_POS 0x03 +#define ST_STATUS2_GZ_ST_PASS_MASK (0x01 << ST_STATUS2_GZ_ST_PASS_POS) + +/* + * gy_st_pass + * 1: Gyro Y-axis self-test passed + */ +#define ST_STATUS2_GY_ST_PASS_POS 0x02 +#define ST_STATUS2_GY_ST_PASS_MASK (0x01 << ST_STATUS2_GY_ST_PASS_POS) + +/* + * gx_st_pass + * 1: Gyro X-axis self-test passed + */ +#define ST_STATUS2_GX_ST_PASS_POS 0x01 +#define ST_STATUS2_GX_ST_PASS_MASK (0x01 << ST_STATUS2_GX_ST_PASS_POS) + + + +/* + * FDR_CONFIG + * Register Name : FDR_CONFIG + */ + +/* + * fdr_sel + * [7:4] Reserved + * [3:0] FIFO packet rate decimation factor. Sets the number of discarded FIFO packets. Valid range is 0 to 127. User must disable sensors when initializing FDR_SEL value or making changes to it. + * + * 0xxx: Decimation is disabled, all packets are sent to FIFO + * 1000: 1 packet out of 2 is sent to FIFO + * 1001: 1 packet out of 4 is sent to FIFO + * 1010: 1 packet out of 8 is sent to FIFO + * 1011: 1 packet out of 16 is sent to FIFO + * 1100: 1 packet out of 32 is sent to FIFO + * 1101: 1 packet out of 64 is sent to FIFO + * 1110: 1 packet out of 128 is sent to FIFO + * 1111: 1 packet out of 256 is sent to FIFO + */ +#define FDR_CONFIG_FDR_SEL_POS 0x00 +#define FDR_CONFIG_FDR_SEL_MASK 0xff + + + +/* + * APEX_CONFIG12 + * Register Name : APEX_CONFIG12 + */ + +/* + * ff_max_duration_sel + * Maximum freefall length. Longer freefalls are ignored. + * + * 0000: 102 cm (default) + * 0001: 120 cm + * 0010: 139 cm + * 0011: 159 cm + * 0100: 181 cm + * 0101: 204 cm + * 0110: 228 cm + * 0111: 254 cm + * 1000: 281 cm + * 1001: 310 cm + * 1010: 339 cm + * 1011: 371 cm + * 1100: 403 cm + * 1101: 438 cm + * 1110: 473 cm + * 1111: 510 cm + */ +#define APEX_CONFIG12_FF_MAX_DURATION_SEL_POS 0x04 +#define APEX_CONFIG12_FF_MAX_DURATION_SEL_MASK (0x0f << APEX_CONFIG12_FF_MAX_DURATION_SEL_POS) + +/* + * ff_min_duration_sel + * Minimum freefall length. Shorter freefalls are ignored. + * + * 0000: 10 cm (default) + * 0001: 12 cm + * 0010: 13 cm + * 0011: 16 cm + * 0100: 18 cm + * 0101: 20 cm + * 0110: 23 cm + * 0111: 25 cm + * 1000: 28 cm + * 1001: 31 cm + * 1010: 34 cm + * 1011: 38 cm + * 1100: 41 cm + * 1101: 45 cm + * 1110: 48 cm + * 1111: 52 cm + */ +#define APEX_CONFIG12_FF_MIN_DURATION_SEL_POS 0x00 +#define APEX_CONFIG12_FF_MIN_DURATION_SEL_MASK 0x0f + + +/* --------------------------------------------------------------------------- + * register MREG3 + * ---------------------------------------------------------------------------*/ + +/* + * XA_ST_DATA + * Register Name : XA_ST_DATA + */ + +/* + * xa_st_data + * Accel X-axis self test data converted to 8 bit code. + */ +#define XA_ST_DATA_XA_ST_DATA_POS 0x00 +#define XA_ST_DATA_XA_ST_DATA_MASK 0xff + + + +/* + * YA_ST_DATA + * Register Name : YA_ST_DATA + */ + +/* + * ya_st_data + * Accel Y-axis self test data converted to 8 bit code. + */ +#define YA_ST_DATA_YA_ST_DATA_POS 0x00 +#define YA_ST_DATA_YA_ST_DATA_MASK 0xff + + + +/* + * ZA_ST_DATA + * Register Name : ZA_ST_DATA + */ + +/* + * za_st_data + * Accel Z-axis self test data converted to 8 bit code. + */ +#define ZA_ST_DATA_ZA_ST_DATA_POS 0x00 +#define ZA_ST_DATA_ZA_ST_DATA_MASK 0xff + + + +/* + * XG_ST_DATA + * Register Name : XG_ST_DATA + */ + +/* + * xg_st_data + * Gyro X-axis self test data converted to 8 bit code. + */ +#define XG_ST_DATA_XG_ST_DATA_POS 0x00 +#define XG_ST_DATA_XG_ST_DATA_MASK 0xff + + + +/* + * YG_ST_DATA + * Register Name : YG_ST_DATA + */ + +/* + * yg_st_data + * Gyro Y-axis self test data converted to 8 bit code. + */ +#define YG_ST_DATA_YG_ST_DATA_POS 0x00 +#define YG_ST_DATA_YG_ST_DATA_MASK 0xff + + + +/* + * ZG_ST_DATA + * Register Name : ZG_ST_DATA + */ + +/* + * zg_st_data + * Gyro Z-axis self test data converted to 8 bit code. + */ +#define ZG_ST_DATA_ZG_ST_DATA_POS 0x00 +#define ZG_ST_DATA_ZG_ST_DATA_MASK 0xff + + +/* --------------------------------------------------------------------------- + * register MREG2 + * ---------------------------------------------------------------------------*/ + +/* + * OTP_CTRL7 + * Register Name : OTP_CTRL7 + */ + +/* + * otp_reload + * 1: to trigger OTP copy operation. This bit is cleared to 0 after OTP copy is done. + * + * With otp_copy_mode[1:0] = 2'b01, it takes 280us to complete the OTP reloading operation. + * With otp_copy_mode[1:0] = 2'b11, it takes 20us to complete the OTP reloading operation. + */ +#define OTP_CTRL7_OTP_RELOAD_POS 0x03 +#define OTP_CTRL7_OTP_RELOAD_MASK (0x01 << OTP_CTRL7_OTP_RELOAD_POS) + +/* + * otp_pwr_down + * 0: Power up OTP to copy from OTP to SRAM + * 1: Power down OTP + * + * This bit is automatically set to 1 when OTP copy operation is complete. + */ +#define OTP_CTRL7_OTP_PWR_DOWN_POS 0x01 +#define OTP_CTRL7_OTP_PWR_DOWN_MASK (0x01 << OTP_CTRL7_OTP_PWR_DOWN_POS) + +#ifdef __cplusplus +} +#endif + +#endif /*#ifndef _INV_IMU_REGMAP_H_*/ diff --git a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_selftest.c b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_selftest.c similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_selftest.c rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_selftest.c index 4fa1f3f..56b6d18 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_selftest.c +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_selftest.c @@ -1,179 +1,179 @@ -/* - * ________________________________________________________________________________________________________ - * Copyright (c) 2015-2015 InvenSense Inc. All rights reserved. - * - * This software, related documentation and any modifications thereto (collectively "Software") is subject - * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright - * and other intellectual property rights laws. - * - * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software - * and any use, reproduction, disclosure or distribution of the Software without an express license agreement - * from InvenSense is strictly prohibited. - * - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS - * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED - * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL - * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY - * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, - * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE - * OF THE SOFTWARE. - * ________________________________________________________________________________________________________ - */ - -#include "inv_imu_selftest.h" -#include "inv_imu_extfunc.h" -#include "inv_imu_transport.h" - -static int configure_selftest_parameters(struct inv_imu_device *s, - const inv_imu_selftest_parameters_t st_params); - -int inv_imu_run_selftest(struct inv_imu_device *s, - const inv_imu_selftest_parameters_t st_params, - inv_imu_selftest_output_t *st_output) -{ - int status = 0; - uint8_t value; - uint8_t data[2] = {0}; - uint8_t st_done = 0; - int polling_timeout_ms = 1000; - - /* Disables Gyro/Accel sensors */ - status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &value); - value &= ~(PWR_MGMT0_ACCEL_MODE_MASK | PWR_MGMT0_GYRO_MODE_MASK); - status |= inv_imu_write_reg(s, PWR_MGMT0, 1, &value); - - /* Enable RC oscillator */ - status |= inv_imu_switch_on_mclk(s); - - /* Clear DMP SRAM (1 ms wait included in `inv_imu_reset_dmp()`) */ - status |= inv_imu_reset_dmp(s, APEX_CONFIG0_DMP_MEM_RESET_APEX_ST_EN); - /* Update `dmp_is_on` since APEX features will have to restart from scratch */ - s->dmp_is_on = 0; - - /* Load self-test data */ - status |= inv_imu_load_selftest_data(s); - - /* Set self-test parameters */ - status |= configure_selftest_parameters(s, st_params); - - /* - * Enable accel and/or gyro self-test. - * If both accel and gyro self-test are enabled, - * they should be set simultaneously in the same write access - */ - status |= inv_imu_read_reg(s, SELFTEST_MREG1, 1, &value); - value &= ~SELFTEST_EN; - value |= (uint8_t)st_params.st_control; - status |= inv_imu_write_reg(s, SELFTEST_MREG1, 1, &value); - - /* Poll int_status_st_done bit */ - do { - inv_imu_sleep_us(1000); - status |= inv_imu_read_reg(s, INT_STATUS, 1, &st_done); - st_done &= INT_STATUS_ST_INT_MASK; - - if (0 == --polling_timeout_ms) - return (status | -1); /* Return error if timeout is reached */ - - } while ( !st_done /* Exit if ST_DONE */ - && !status /* Or if error is detected */); - - /* Read self-test results */ - status |= inv_imu_read_reg(s, ST_STATUS1_MREG1, 2, &data[0]); - st_output->accel_status = (data[0] & ST_STATUS1_ACCEL_ST_PASS_MASK) >> ST_STATUS1_ACCEL_ST_PASS_POS; - st_output->ax_status = (data[0] & ST_STATUS1_AX_ST_PASS_MASK) >> ST_STATUS1_AX_ST_PASS_POS; - st_output->ay_status = (data[0] & ST_STATUS1_AY_ST_PASS_MASK) >> ST_STATUS1_AY_ST_PASS_POS; - st_output->az_status = (data[0] & ST_STATUS1_AZ_ST_PASS_MASK) >> ST_STATUS1_AZ_ST_PASS_POS; - st_output->gyro_status = (data[1] & ST_STATUS2_GYRO_ST_PASS_MASK) >> ST_STATUS2_GYRO_ST_PASS_POS; - st_output->gyro_status |= ((data[1] & ST_STATUS2_ST_INCOMPLETE_MASK) >> ST_STATUS2_ST_INCOMPLETE_POS) << 1; - st_output->gx_status = (data[1] & ST_STATUS2_GX_ST_PASS_MASK) >> ST_STATUS2_GX_ST_PASS_POS; - st_output->gy_status = (data[1] & ST_STATUS2_GY_ST_PASS_MASK) >> ST_STATUS2_GY_ST_PASS_POS; - st_output->gz_status = (data[1] & ST_STATUS2_GZ_ST_PASS_MASK) >> ST_STATUS2_GZ_ST_PASS_POS; - - /* Disable self-test */ - status |= inv_imu_read_reg(s, SELFTEST_MREG1, 1, &value); - value &= ~SELFTEST_EN; - value |= (uint8_t)SELFTEST_DIS; - status |= inv_imu_write_reg(s, SELFTEST_MREG1, 1, &value); - - /* Reset FIFO because ST data may have been pushed to it */ - status |= inv_imu_reset_fifo(s); - - /* Restore idle bit */ - status |= inv_imu_switch_off_mclk(s); - - return status; -} - -int inv_imu_init_selftest_parameters_struct(struct inv_imu_device *s, - inv_imu_selftest_parameters_t *st_params) -{ - (void)s; - st_params->st_num_samples = ST_CONFIG_16_SAMPLES; - st_params->st_control = (SELFTEST_ACCEL_GYRO_ST_EN_t)SELFTEST_EN; - return 0; -} - -int inv_imu_load_selftest_data(struct inv_imu_device *s) -{ - int status = 0; - uint8_t value; - - /* Enable RC oscillator */ - status |= inv_imu_switch_on_mclk(s); - - /* Set up OTP controller to reload factory-trimmed self-test response into SRAM */ - status |= inv_imu_read_reg(s, OTP_CONFIG_MREG1, 1, &value); - value &= ~OTP_CONFIG_OTP_COPY_MODE_MASK; - value |= (uint8_t)OTP_CONFIG_OTP_COPY_ST_DATA; - status |= inv_imu_write_reg(s, OTP_CONFIG_MREG1, 1, &value); - - /* Take the OTP macro out of power-down mode */ - status |= inv_imu_read_reg(s, OTP_CTRL7_MREG2, 1, &value); - value &= ~OTP_CTRL7_OTP_PWR_DOWN_MASK; - value |= (uint8_t)OTP_CTRL7_PWR_DOWN_DIS; - status |= inv_imu_write_reg(s, OTP_CTRL7_MREG2, 1, &value); - - /* Wait for voltage generator to power on */ - inv_imu_sleep_us(100); - - /* Host should disable INT function first before kicking off OTP copy operation */ - - /* Trigger OTP to reload data (this time in self-test mode) */ - status |= inv_imu_read_reg(s, OTP_CTRL7_MREG2, 1, &value); - value &= ~OTP_CTRL7_OTP_RELOAD_MASK; - value |= (uint8_t)OTP_CTRL7_OTP_RELOAD_EN; - status |= inv_imu_write_reg(s, OTP_CTRL7_MREG2, 1, &value); - - /* Wait for OTP reload */ - inv_imu_sleep_us(20); - - /* Disable RC oscillator */ - status |= inv_imu_switch_off_mclk(s); - - return status; -} - -static int configure_selftest_parameters(struct inv_imu_device *s, - const inv_imu_selftest_parameters_t st_params) -{ - int status = 0; - uint8_t value; - - /* Self-test configuration cannot be updated if it already running */ - status |= inv_imu_read_reg(s, SELFTEST_MREG1, 1, &value); - if ((value & SELFTEST_EN) != SELFTEST_DIS) - return INV_ERROR_UNEXPECTED; - - status |= inv_imu_read_reg(s, ST_CONFIG_MREG1, 1, &value); - value &= ~((uint8_t)ST_CONFIG_ST_NUMBER_SAMPLE_MASK - | (uint8_t)ST_CONFIG_ACCEL_ST_LIM_MASK - | (uint8_t)ST_CONFIG_GYRO_ST_LIM_MASK); - value |= (uint8_t)st_params.st_num_samples - | (uint8_t)ST_CONFIG_ACCEL_ST_LIM_50 - | (uint8_t)ST_CONFIG_GYRO_ST_LIM_50; - status |= inv_imu_write_reg(s, ST_CONFIG_MREG1, 1, &value); - - return status; -} +/* + * ________________________________________________________________________________________________________ + * Copyright (c) 2015-2015 InvenSense Inc. All rights reserved. + * + * This software, related documentation and any modifications thereto (collectively "Software") is subject + * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright + * and other intellectual property rights laws. + * + * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software + * and any use, reproduction, disclosure or distribution of the Software without an express license agreement + * from InvenSense is strictly prohibited. + * + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS + * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED + * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL + * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, + * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THE SOFTWARE. + * ________________________________________________________________________________________________________ + */ + +#include "inv_imu_selftest.h" +#include "inv_imu_extfunc.h" +#include "inv_imu_transport.h" + +static int configure_selftest_parameters(struct inv_imu_device *s, + const inv_imu_selftest_parameters_t st_params); + +int inv_imu_run_selftest(struct inv_imu_device *s, + const inv_imu_selftest_parameters_t st_params, + inv_imu_selftest_output_t *st_output) +{ + int status = 0; + uint8_t value; + uint8_t data[2] = {0}; + uint8_t st_done = 0; + int polling_timeout_ms = 1000; + + /* Disables Gyro/Accel sensors */ + status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &value); + value &= ~(PWR_MGMT0_ACCEL_MODE_MASK | PWR_MGMT0_GYRO_MODE_MASK); + status |= inv_imu_write_reg(s, PWR_MGMT0, 1, &value); + + /* Enable RC oscillator */ + status |= inv_imu_switch_on_mclk(s); + + /* Clear DMP SRAM (1 ms wait included in `inv_imu_reset_dmp()`) */ + status |= inv_imu_reset_dmp(s, APEX_CONFIG0_DMP_MEM_RESET_APEX_ST_EN); + /* Update `dmp_is_on` since APEX features will have to restart from scratch */ + s->dmp_is_on = 0; + + /* Load self-test data */ + status |= inv_imu_load_selftest_data(s); + + /* Set self-test parameters */ + status |= configure_selftest_parameters(s, st_params); + + /* + * Enable accel and/or gyro self-test. + * If both accel and gyro self-test are enabled, + * they should be set simultaneously in the same write access + */ + status |= inv_imu_read_reg(s, SELFTEST_MREG1, 1, &value); + value &= ~SELFTEST_EN; + value |= (uint8_t)st_params.st_control; + status |= inv_imu_write_reg(s, SELFTEST_MREG1, 1, &value); + + /* Poll int_status_st_done bit */ + do { + inv_imu_sleep_us(1000); + status |= inv_imu_read_reg(s, INT_STATUS, 1, &st_done); + st_done &= INT_STATUS_ST_INT_MASK; + + if (0 == --polling_timeout_ms) + return (status | -1); /* Return error if timeout is reached */ + + } while ( !st_done /* Exit if ST_DONE */ + && !status /* Or if error is detected */); + + /* Read self-test results */ + status |= inv_imu_read_reg(s, ST_STATUS1_MREG1, 2, &data[0]); + st_output->accel_status = (data[0] & ST_STATUS1_ACCEL_ST_PASS_MASK) >> ST_STATUS1_ACCEL_ST_PASS_POS; + st_output->ax_status = (data[0] & ST_STATUS1_AX_ST_PASS_MASK) >> ST_STATUS1_AX_ST_PASS_POS; + st_output->ay_status = (data[0] & ST_STATUS1_AY_ST_PASS_MASK) >> ST_STATUS1_AY_ST_PASS_POS; + st_output->az_status = (data[0] & ST_STATUS1_AZ_ST_PASS_MASK) >> ST_STATUS1_AZ_ST_PASS_POS; + st_output->gyro_status = (data[1] & ST_STATUS2_GYRO_ST_PASS_MASK) >> ST_STATUS2_GYRO_ST_PASS_POS; + st_output->gyro_status |= ((data[1] & ST_STATUS2_ST_INCOMPLETE_MASK) >> ST_STATUS2_ST_INCOMPLETE_POS) << 1; + st_output->gx_status = (data[1] & ST_STATUS2_GX_ST_PASS_MASK) >> ST_STATUS2_GX_ST_PASS_POS; + st_output->gy_status = (data[1] & ST_STATUS2_GY_ST_PASS_MASK) >> ST_STATUS2_GY_ST_PASS_POS; + st_output->gz_status = (data[1] & ST_STATUS2_GZ_ST_PASS_MASK) >> ST_STATUS2_GZ_ST_PASS_POS; + + /* Disable self-test */ + status |= inv_imu_read_reg(s, SELFTEST_MREG1, 1, &value); + value &= ~SELFTEST_EN; + value |= (uint8_t)SELFTEST_DIS; + status |= inv_imu_write_reg(s, SELFTEST_MREG1, 1, &value); + + /* Reset FIFO because ST data may have been pushed to it */ + status |= inv_imu_reset_fifo(s); + + /* Restore idle bit */ + status |= inv_imu_switch_off_mclk(s); + + return status; +} + +int inv_imu_init_selftest_parameters_struct(struct inv_imu_device *s, + inv_imu_selftest_parameters_t *st_params) +{ + (void)s; + st_params->st_num_samples = ST_CONFIG_16_SAMPLES; + st_params->st_control = (SELFTEST_ACCEL_GYRO_ST_EN_t)SELFTEST_EN; + return 0; +} + +int inv_imu_load_selftest_data(struct inv_imu_device *s) +{ + int status = 0; + uint8_t value; + + /* Enable RC oscillator */ + status |= inv_imu_switch_on_mclk(s); + + /* Set up OTP controller to reload factory-trimmed self-test response into SRAM */ + status |= inv_imu_read_reg(s, OTP_CONFIG_MREG1, 1, &value); + value &= ~OTP_CONFIG_OTP_COPY_MODE_MASK; + value |= (uint8_t)OTP_CONFIG_OTP_COPY_ST_DATA; + status |= inv_imu_write_reg(s, OTP_CONFIG_MREG1, 1, &value); + + /* Take the OTP macro out of power-down mode */ + status |= inv_imu_read_reg(s, OTP_CTRL7_MREG2, 1, &value); + value &= ~OTP_CTRL7_OTP_PWR_DOWN_MASK; + value |= (uint8_t)OTP_CTRL7_PWR_DOWN_DIS; + status |= inv_imu_write_reg(s, OTP_CTRL7_MREG2, 1, &value); + + /* Wait for voltage generator to power on */ + inv_imu_sleep_us(100); + + /* Host should disable INT function first before kicking off OTP copy operation */ + + /* Trigger OTP to reload data (this time in self-test mode) */ + status |= inv_imu_read_reg(s, OTP_CTRL7_MREG2, 1, &value); + value &= ~OTP_CTRL7_OTP_RELOAD_MASK; + value |= (uint8_t)OTP_CTRL7_OTP_RELOAD_EN; + status |= inv_imu_write_reg(s, OTP_CTRL7_MREG2, 1, &value); + + /* Wait for OTP reload */ + inv_imu_sleep_us(20); + + /* Disable RC oscillator */ + status |= inv_imu_switch_off_mclk(s); + + return status; +} + +static int configure_selftest_parameters(struct inv_imu_device *s, + const inv_imu_selftest_parameters_t st_params) +{ + int status = 0; + uint8_t value; + + /* Self-test configuration cannot be updated if it already running */ + status |= inv_imu_read_reg(s, SELFTEST_MREG1, 1, &value); + if ((value & SELFTEST_EN) != SELFTEST_DIS) + return INV_ERROR_UNEXPECTED; + + status |= inv_imu_read_reg(s, ST_CONFIG_MREG1, 1, &value); + value &= ~((uint8_t)ST_CONFIG_ST_NUMBER_SAMPLE_MASK + | (uint8_t)ST_CONFIG_ACCEL_ST_LIM_MASK + | (uint8_t)ST_CONFIG_GYRO_ST_LIM_MASK); + value |= (uint8_t)st_params.st_num_samples + | (uint8_t)ST_CONFIG_ACCEL_ST_LIM_50 + | (uint8_t)ST_CONFIG_GYRO_ST_LIM_50; + status |= inv_imu_write_reg(s, ST_CONFIG_MREG1, 1, &value); + + return status; +} diff --git a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_selftest.h b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_selftest.h similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_selftest.h rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_selftest.h index 484c65a..3199f14 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_selftest.h +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_selftest.h @@ -1,101 +1,101 @@ -/* - * ________________________________________________________________________________________________________ - * Copyright (c) 2015-2015 InvenSense Inc. All rights reserved. - * - * This software, related documentation and any modifications thereto (collectively "Software") is subject - * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright - * and other intellectual property rights laws. - * - * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software - * and any use, reproduction, disclosure or distribution of the Software without an express license agreement - * from InvenSense is strictly prohibited. - * - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS - * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED - * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL - * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY - * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, - * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE - * OF THE SOFTWARE. - * ________________________________________________________________________________________________________ - */ - -/** @defgroup DriverST SelfTest IMU selftest - * @brief Low-level function to run selftest on a IMU device - * @ingroup Driver - * @{ - */ - -/** @file inv_imu_selftest.h - * Low-level function to run selftest on a IMU device - */ - -#ifndef _INV_IMU_SELFTEST_H_ -#define _INV_IMU_SELFTEST_H_ - -#include - -#include "InvExport.h" -#include "inv_imu_defs.h" -#include "inv_imu_driver.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/* forward declaration */ -struct inv_imu_device; - - -/** @brief Self-test input parameters - */ -typedef struct { - ST_CONFIG_NUM_SAMPLES_t st_num_samples; /**< Number of samples used to perform self-test */ - SELFTEST_ACCEL_GYRO_ST_EN_t st_control; /**< Define which sensor is under self-test */ -} inv_imu_selftest_parameters_t; - -/** @brief Self-test routine outputs - */ -typedef struct { - int8_t accel_status; /**< global accelerometer self-test passed */ - int8_t gyro_status; /**< global gyroscope self-test status: st_pass (bit0), st_incomplete (bit1) */ - int8_t ax_status; /**< AX self-test status */ - int8_t ay_status; /**< AY self-test status */ - int8_t az_status; /**< AZ self-test status */ - int8_t gx_status; /**< GX self-test status */ - int8_t gy_status; /**< GY self-test status */ - int8_t gz_status; /**< GZ self-test status */ -} inv_imu_selftest_output_t; - - -/** -* @brief Perform hardware self-test for Accel and Gyro -* @param[in] Self-test parameters (see inv_imu_selftest_parameters_t) -* @param[out] Self-test results (see inv_imu_selftest_output_t) -* @return 0 on completion, negative number if intermediate errors occurred -*/ -int inv_imu_run_selftest(struct inv_imu_device *s, - const inv_imu_selftest_parameters_t st_params, - inv_imu_selftest_output_t *st_output); - -/** @brief Fill the self-test configuration structure with default configuration - * @param[in] selftest_params self-test parameters to be initialized - * @return 0 on success, negative return code otherwise - */ -int inv_imu_init_selftest_parameters_struct(struct inv_imu_device *s, - inv_imu_selftest_parameters_t *selftest_params); - -/** @brief Load self-test data - * @return 0 on success, negative return code otherwise - */ -int inv_imu_load_selftest_data(struct inv_imu_device *s); - - -#ifdef __cplusplus -} -#endif - -#endif /* _INV_IMU_SELFTEST_H_ */ - -/** @} */ +/* + * ________________________________________________________________________________________________________ + * Copyright (c) 2015-2015 InvenSense Inc. All rights reserved. + * + * This software, related documentation and any modifications thereto (collectively "Software") is subject + * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright + * and other intellectual property rights laws. + * + * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software + * and any use, reproduction, disclosure or distribution of the Software without an express license agreement + * from InvenSense is strictly prohibited. + * + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS + * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED + * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL + * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, + * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THE SOFTWARE. + * ________________________________________________________________________________________________________ + */ + +/** @defgroup DriverST SelfTest IMU selftest + * @brief Low-level function to run selftest on a IMU device + * @ingroup Driver + * @{ + */ + +/** @file inv_imu_selftest.h + * Low-level function to run selftest on a IMU device + */ + +#ifndef _INV_IMU_SELFTEST_H_ +#define _INV_IMU_SELFTEST_H_ + +#include + +#include "InvExport.h" +#include "inv_imu_defs.h" +#include "inv_imu_driver.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* forward declaration */ +struct inv_imu_device; + + +/** @brief Self-test input parameters + */ +typedef struct { + ST_CONFIG_NUM_SAMPLES_t st_num_samples; /**< Number of samples used to perform self-test */ + SELFTEST_ACCEL_GYRO_ST_EN_t st_control; /**< Define which sensor is under self-test */ +} inv_imu_selftest_parameters_t; + +/** @brief Self-test routine outputs + */ +typedef struct { + int8_t accel_status; /**< global accelerometer self-test passed */ + int8_t gyro_status; /**< global gyroscope self-test status: st_pass (bit0), st_incomplete (bit1) */ + int8_t ax_status; /**< AX self-test status */ + int8_t ay_status; /**< AY self-test status */ + int8_t az_status; /**< AZ self-test status */ + int8_t gx_status; /**< GX self-test status */ + int8_t gy_status; /**< GY self-test status */ + int8_t gz_status; /**< GZ self-test status */ +} inv_imu_selftest_output_t; + + +/** +* @brief Perform hardware self-test for Accel and Gyro +* @param[in] Self-test parameters (see inv_imu_selftest_parameters_t) +* @param[out] Self-test results (see inv_imu_selftest_output_t) +* @return 0 on completion, negative number if intermediate errors occurred +*/ +int inv_imu_run_selftest(struct inv_imu_device *s, + const inv_imu_selftest_parameters_t st_params, + inv_imu_selftest_output_t *st_output); + +/** @brief Fill the self-test configuration structure with default configuration + * @param[in] selftest_params self-test parameters to be initialized + * @return 0 on success, negative return code otherwise + */ +int inv_imu_init_selftest_parameters_struct(struct inv_imu_device *s, + inv_imu_selftest_parameters_t *selftest_params); + +/** @brief Load self-test data + * @return 0 on success, negative return code otherwise + */ +int inv_imu_load_selftest_data(struct inv_imu_device *s); + + +#ifdef __cplusplus +} +#endif + +#endif /* _INV_IMU_SELFTEST_H_ */ + +/** @} */ diff --git a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_transport.c b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_transport.c similarity index 96% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_transport.c rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_transport.c index 96adc6e..8ed3b17 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_transport.c +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_transport.c @@ -1,257 +1,257 @@ -/* - * ________________________________________________________________________________________________________ - * Copyright (c) 2015-2015 InvenSense Inc. All rights reserved. - * - * This software, related documentation and any modifications thereto (collectively "Software") is subject - * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright - * and other intellectual property rights laws. - * - * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software - * and any use, reproduction, disclosure or distribution of the Software without an express license agreement - * from InvenSense is strictly prohibited. - * - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS - * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED - * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL - * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY - * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, - * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE - * OF THE SOFTWARE. - * ________________________________________________________________________________________________________ - */ - -#include "inv_imu_extfunc.h" -#include "inv_imu_transport.h" -#include "inv_imu_regmap.h" - -#include "InvError.h" - - -/* Function definition */ -static uint8_t *get_register_cache_addr(struct inv_imu_device *s, uint32_t reg); -static int write_sreg(struct inv_imu_device *s, uint8_t reg, uint32_t len, const uint8_t *buf); -static int read_sreg(struct inv_imu_device *s, uint8_t reg, uint32_t len, uint8_t *buf); -static int write_mclk_reg(struct inv_imu_device *s, uint16_t regaddr, uint8_t wr_cnt, const uint8_t *buf); -static int read_mclk_reg(struct inv_imu_device *s, uint16_t regaddr, uint8_t rd_cnt, uint8_t *buf); - - -int inv_imu_init_transport(struct inv_imu_device *s) -{ - int status = 0; - struct inv_imu_transport *t = (struct inv_imu_transport *)s; - - status |= read_sreg(s, (uint8_t)PWR_MGMT0, 1, &(t->register_cache.pwr_mgmt0_reg)); - status |= read_sreg(s, (uint8_t)GYRO_CONFIG0, 1, &(t->register_cache.gyro_config0_reg)); - status |= read_sreg(s, (uint8_t)ACCEL_CONFIG0, 1, &(t->register_cache.accel_config0_reg)); - - status |= read_mclk_reg(s, (TMST_CONFIG1_MREG1 & 0xFFFF), 1, &(t->register_cache.tmst_config1_reg)); - - t->need_mclk_cnt = 0; - - return status; -} - -int inv_imu_read_reg(struct inv_imu_device *s, uint32_t reg, uint32_t len, uint8_t *buf) -{ - uint32_t i; - int rc = 0; - - for (i = 0; i < len; i++) { - uint8_t *cache_addr = get_register_cache_addr(s, reg + i); - - if (cache_addr) { - buf[i] = *cache_addr; - } else { - if (!(reg & 0x10000)) { - rc |= read_mclk_reg(s, ((reg + i) & 0xFFFF), 1, &buf[i]); - } else { - rc |= read_sreg(s, (uint8_t)reg + i, len - i, &buf[i]); - break; - } - } - } - - return rc; -} - -int inv_imu_write_reg(struct inv_imu_device *s, uint32_t reg, uint32_t len, const uint8_t *buf) -{ - uint32_t i; - int rc = 0; - - for (i = 0; i < len; i++) { - uint8_t *cache_addr = get_register_cache_addr(s, reg + i); - - if (cache_addr) - *cache_addr = buf[i]; - - if (!(reg & 0x10000)) - rc |= write_mclk_reg(s, ((reg + i) & 0xFFFF), 1, &buf[i]); - } - - if (reg & 0x10000) - rc |= write_sreg(s, (uint8_t)reg, len, buf); - - return rc; -} - -int inv_imu_switch_on_mclk(struct inv_imu_device *s) -{ - int status = 0; - uint8_t data; - struct inv_imu_transport *t = (struct inv_imu_transport *)s; - - /* set IDLE bit only if it is not set yet */ - if (t->need_mclk_cnt == 0) { - - status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &data); - data |= PWR_MGMT0_IDLE_MASK; - status |= inv_imu_write_reg(s, PWR_MGMT0, 1, &data); - - if (status) - return status; - - /* Check if MCLK is ready */ - do { - status = inv_imu_read_reg(s, MCLK_RDY, 1, &data); - } while ((status != 0) || !(data & MCLK_RDY_MCLK_RDY_MASK)); - } else { - - /* Make sure it is already on */ - status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &data); - if (0 == (data &= PWR_MGMT0_IDLE_MASK)) - status |= INV_ERROR; - } - - /* Increment the counter to keep track of number of MCLK requesters */ - t->need_mclk_cnt++; - - return status; -} - -int inv_imu_switch_off_mclk(struct inv_imu_device *s) -{ - int status = 0; - uint8_t data; - struct inv_imu_transport *t = (struct inv_imu_transport *)s; - - /* Reset the IDLE but only if there is one requester left */ - if (t->need_mclk_cnt == 1) { - status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &data); - data &= ~PWR_MGMT0_IDLE_MASK; - status |= inv_imu_write_reg(s, PWR_MGMT0, 1, &data); - } else { - /* Make sure it is still on */ - status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &data); - if (0 == (data &= PWR_MGMT0_IDLE_MASK)) - status |= INV_ERROR; - } - - /* Decrement the counter */ - t->need_mclk_cnt--; - - return status; -} - - -/* Static function */ - -static uint8_t *get_register_cache_addr(struct inv_imu_device *s, uint32_t reg) -{ - struct inv_imu_transport *t = (struct inv_imu_transport *)s; - - switch(reg) { - case PWR_MGMT0: return &(t->register_cache.pwr_mgmt0_reg); - case GYRO_CONFIG0: return &(t->register_cache.gyro_config0_reg); - case ACCEL_CONFIG0: return &(t->register_cache.accel_config0_reg); - case TMST_CONFIG1_MREG1: return &(t->register_cache.tmst_config1_reg); - default: return (uint8_t *)0; // Not found - } -} - -static int read_sreg(struct inv_imu_device *s, uint8_t reg, uint32_t len, uint8_t *buf) -{ - struct inv_imu_serif *serif = (struct inv_imu_serif *)s; - - if (len > serif->max_read) - return INV_ERROR_SIZE; - - if (serif->read_reg(serif, reg, buf, len) != 0) - return INV_ERROR_TRANSPORT; - - return 0; -} - -static int write_sreg(struct inv_imu_device *s, uint8_t reg, uint32_t len, const uint8_t *buf) -{ - struct inv_imu_serif *serif = (struct inv_imu_serif *)s; - - if (len > serif->max_write) - return INV_ERROR_SIZE; - - if (serif->write_reg(serif, reg, buf, len) != 0) - return INV_ERROR_TRANSPORT; - - return 0; -} - -static int read_mclk_reg(struct inv_imu_device *s, uint16_t regaddr, uint8_t rd_cnt, uint8_t *buf) -{ - uint8_t data; - uint8_t blk_sel = (regaddr & 0xFF00) >> 8; - int status = 0; - - // Have IMU not in IDLE mode to access MCLK domain - status |= inv_imu_switch_on_mclk(s); - - // optimize by changing BLK_SEL only if not NULL - if (blk_sel) - status |= write_sreg(s, (uint8_t)BLK_SEL_R & 0xff, 1, &blk_sel); - - data = (regaddr & 0x00FF); - status |= write_sreg(s, (uint8_t)MADDR_R, 1, &data); - inv_imu_sleep_us(10); - status |= read_sreg(s, (uint8_t)M_R, rd_cnt, buf); - inv_imu_sleep_us(10); - - if (blk_sel) { - data = 0; - status |= write_sreg(s, (uint8_t)BLK_SEL_R, 1, &data); - } - - // switch OFF MCLK if needed - status |= inv_imu_switch_off_mclk(s); - - return status; -} - -static int write_mclk_reg(struct inv_imu_device *s, uint16_t regaddr, uint8_t wr_cnt, const uint8_t *buf) -{ - uint8_t data; - uint8_t blk_sel = (regaddr & 0xFF00) >> 8; - int status = 0; - - // Have IMU not in IDLE mode to access MCLK domain - status |= inv_imu_switch_on_mclk(s); - - // optimize by changing BLK_SEL only if not NULL - if (blk_sel) - status |= write_sreg(s, (uint8_t)BLK_SEL_W, 1, &blk_sel); - - data = (regaddr & 0x00FF); - status |= write_sreg(s, (uint8_t)MADDR_W, 1, &data); - for (uint8_t i = 0; i < wr_cnt; i++) { - status |= write_sreg(s, (uint8_t)M_W, 1, &buf[i]); - inv_imu_sleep_us(10); - } - - if (blk_sel) { - data = 0; - status = write_sreg(s, (uint8_t)BLK_SEL_W, 1, &data); - } - - status |= inv_imu_switch_off_mclk(s); - - return status; -} +/* + * ________________________________________________________________________________________________________ + * Copyright (c) 2015-2015 InvenSense Inc. All rights reserved. + * + * This software, related documentation and any modifications thereto (collectively "Software") is subject + * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright + * and other intellectual property rights laws. + * + * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software + * and any use, reproduction, disclosure or distribution of the Software without an express license agreement + * from InvenSense is strictly prohibited. + * + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS + * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED + * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL + * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, + * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THE SOFTWARE. + * ________________________________________________________________________________________________________ + */ + +#include "inv_imu_extfunc.h" +#include "inv_imu_transport.h" +#include "inv_imu_regmap.h" + +#include "InvError.h" + + +/* Function definition */ +static uint8_t *get_register_cache_addr(struct inv_imu_device *s, uint32_t reg); +static int write_sreg(struct inv_imu_device *s, uint8_t reg, uint32_t len, const uint8_t *buf); +static int read_sreg(struct inv_imu_device *s, uint8_t reg, uint32_t len, uint8_t *buf); +static int write_mclk_reg(struct inv_imu_device *s, uint16_t regaddr, uint8_t wr_cnt, const uint8_t *buf); +static int read_mclk_reg(struct inv_imu_device *s, uint16_t regaddr, uint8_t rd_cnt, uint8_t *buf); + + +int inv_imu_init_transport(struct inv_imu_device *s) +{ + int status = 0; + struct inv_imu_transport *t = (struct inv_imu_transport *)s; + + status |= read_sreg(s, (uint8_t)PWR_MGMT0, 1, &(t->register_cache.pwr_mgmt0_reg)); + status |= read_sreg(s, (uint8_t)GYRO_CONFIG0, 1, &(t->register_cache.gyro_config0_reg)); + status |= read_sreg(s, (uint8_t)ACCEL_CONFIG0, 1, &(t->register_cache.accel_config0_reg)); + + status |= read_mclk_reg(s, (TMST_CONFIG1_MREG1 & 0xFFFF), 1, &(t->register_cache.tmst_config1_reg)); + + t->need_mclk_cnt = 0; + + return status; +} + +int inv_imu_read_reg(struct inv_imu_device *s, uint32_t reg, uint32_t len, uint8_t *buf) +{ + uint32_t i; + int rc = 0; + + for (i = 0; i < len; i++) { + uint8_t *cache_addr = get_register_cache_addr(s, reg + i); + + if (cache_addr) { + buf[i] = *cache_addr; + } else { + if (!(reg & 0x10000)) { + rc |= read_mclk_reg(s, ((reg + i) & 0xFFFF), 1, &buf[i]); + } else { + rc |= read_sreg(s, (uint8_t)reg + i, len - i, &buf[i]); + break; + } + } + } + + return rc; +} + +int inv_imu_write_reg(struct inv_imu_device *s, uint32_t reg, uint32_t len, const uint8_t *buf) +{ + uint32_t i; + int rc = 0; + + for (i = 0; i < len; i++) { + uint8_t *cache_addr = get_register_cache_addr(s, reg + i); + + if (cache_addr) + *cache_addr = buf[i]; + + if (!(reg & 0x10000)) + rc |= write_mclk_reg(s, ((reg + i) & 0xFFFF), 1, &buf[i]); + } + + if (reg & 0x10000) + rc |= write_sreg(s, (uint8_t)reg, len, buf); + + return rc; +} + +int inv_imu_switch_on_mclk(struct inv_imu_device *s) +{ + int status = 0; + uint8_t data; + struct inv_imu_transport *t = (struct inv_imu_transport *)s; + + /* set IDLE bit only if it is not set yet */ + if (t->need_mclk_cnt == 0) { + + status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &data); + data |= PWR_MGMT0_IDLE_MASK; + status |= inv_imu_write_reg(s, PWR_MGMT0, 1, &data); + + if (status) + return status; + + /* Check if MCLK is ready */ + do { + status = inv_imu_read_reg(s, MCLK_RDY, 1, &data); + } while ((status != 0) || !(data & MCLK_RDY_MCLK_RDY_MASK)); + } else { + + /* Make sure it is already on */ + status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &data); + if (0 == (data &= PWR_MGMT0_IDLE_MASK)) + status |= INV_ERROR; + } + + /* Increment the counter to keep track of number of MCLK requesters */ + t->need_mclk_cnt++; + + return status; +} + +int inv_imu_switch_off_mclk(struct inv_imu_device *s) +{ + int status = 0; + uint8_t data; + struct inv_imu_transport *t = (struct inv_imu_transport *)s; + + /* Reset the IDLE but only if there is one requester left */ + if (t->need_mclk_cnt == 1) { + status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &data); + data &= ~PWR_MGMT0_IDLE_MASK; + status |= inv_imu_write_reg(s, PWR_MGMT0, 1, &data); + } else { + /* Make sure it is still on */ + status |= inv_imu_read_reg(s, PWR_MGMT0, 1, &data); + if (0 == (data &= PWR_MGMT0_IDLE_MASK)) + status |= INV_ERROR; + } + + /* Decrement the counter */ + t->need_mclk_cnt--; + + return status; +} + + +/* Static function */ + +static uint8_t *get_register_cache_addr(struct inv_imu_device *s, uint32_t reg) +{ + struct inv_imu_transport *t = (struct inv_imu_transport *)s; + + switch(reg) { + case PWR_MGMT0: return &(t->register_cache.pwr_mgmt0_reg); + case GYRO_CONFIG0: return &(t->register_cache.gyro_config0_reg); + case ACCEL_CONFIG0: return &(t->register_cache.accel_config0_reg); + case TMST_CONFIG1_MREG1: return &(t->register_cache.tmst_config1_reg); + default: return (uint8_t *)0; // Not found + } +} + +static int read_sreg(struct inv_imu_device *s, uint8_t reg, uint32_t len, uint8_t *buf) +{ + struct inv_imu_serif *serif = (struct inv_imu_serif *)s; + + if (len > serif->max_read) + return INV_ERROR_SIZE; + + if (serif->read_reg(serif, reg, buf, len) != 0) + return INV_ERROR_TRANSPORT; + + return 0; +} + +static int write_sreg(struct inv_imu_device *s, uint8_t reg, uint32_t len, const uint8_t *buf) +{ + struct inv_imu_serif *serif = (struct inv_imu_serif *)s; + + if (len > serif->max_write) + return INV_ERROR_SIZE; + + if (serif->write_reg(serif, reg, buf, len) != 0) + return INV_ERROR_TRANSPORT; + + return 0; +} + +static int read_mclk_reg(struct inv_imu_device *s, uint16_t regaddr, uint8_t rd_cnt, uint8_t *buf) +{ + uint8_t data; + uint8_t blk_sel = (regaddr & 0xFF00) >> 8; + int status = 0; + + // Have IMU not in IDLE mode to access MCLK domain + status |= inv_imu_switch_on_mclk(s); + + // optimize by changing BLK_SEL only if not NULL + if (blk_sel) + status |= write_sreg(s, (uint8_t)BLK_SEL_R & 0xff, 1, &blk_sel); + + data = (regaddr & 0x00FF); + status |= write_sreg(s, (uint8_t)MADDR_R, 1, &data); + inv_imu_sleep_us(10); + status |= read_sreg(s, (uint8_t)M_R, rd_cnt, buf); + inv_imu_sleep_us(10); + + if (blk_sel) { + data = 0; + status |= write_sreg(s, (uint8_t)BLK_SEL_R, 1, &data); + } + + // switch OFF MCLK if needed + status |= inv_imu_switch_off_mclk(s); + + return status; +} + +static int write_mclk_reg(struct inv_imu_device *s, uint16_t regaddr, uint8_t wr_cnt, const uint8_t *buf) +{ + uint8_t data; + uint8_t blk_sel = (regaddr & 0xFF00) >> 8; + int status = 0; + + // Have IMU not in IDLE mode to access MCLK domain + status |= inv_imu_switch_on_mclk(s); + + // optimize by changing BLK_SEL only if not NULL + if (blk_sel) + status |= write_sreg(s, (uint8_t)BLK_SEL_W, 1, &blk_sel); + + data = (regaddr & 0x00FF); + status |= write_sreg(s, (uint8_t)MADDR_W, 1, &data); + for (uint8_t i = 0; i < wr_cnt; i++) { + status |= write_sreg(s, (uint8_t)M_W, 1, &buf[i]); + inv_imu_sleep_us(10); + } + + if (blk_sel) { + data = 0; + status = write_sreg(s, (uint8_t)BLK_SEL_W, 1, &data); + } + + status |= inv_imu_switch_off_mclk(s); + + return status; +} diff --git a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_transport.h b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_transport.h similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_transport.h rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_transport.h index cfdfb47..57b7432 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_transport.h +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_transport.h @@ -1,122 +1,122 @@ -/* - * ________________________________________________________________________________________________________ - * Copyright (c) 2015-2015 InvenSense Inc. All rights reserved. - * - * This software, related documentation and any modifications thereto (collectively "Software") is subject - * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright - * and other intellectual property rights laws. - * - * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software - * and any use, reproduction, disclosure or distribution of the Software without an express license agreement - * from InvenSense is strictly prohibited. - * - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS - * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED - * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL - * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY - * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, - * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE - * OF THE SOFTWARE. - * ________________________________________________________________________________________________________ - */ - -/** @defgroup Transport IMU transport - * @brief Low-level IMU SCLK register access - * @ingroup Driver - * @{ - */ - -/** @file inv_imu_transport.h - * Low-level IMU SCLK register access - */ - -#ifndef _INV_IMU_TRANSPORT_H_ -#define _INV_IMU_TRANSPORT_H_ - - -#ifdef __cplusplus -extern "C" { -#endif - -#include - -/* forward declaration */ -struct inv_imu_device; - - -/** @brief enumeration of serial interfaces available on IMU */ -typedef enum -{ - UI_I2C, - UI_SPI4, - UI_SPI3 -} SERIAL_IF_TYPE_t; - -/** @brief basesensor serial interface - */ -struct inv_imu_serif { - void *context; - int (*read_reg)(struct inv_imu_serif *serif, uint8_t reg, uint8_t *buf, uint32_t len); - int (*write_reg)(struct inv_imu_serif *serif, uint8_t reg, const uint8_t *buf, uint32_t len); - int (*configure)(struct inv_imu_serif *serif); - uint32_t max_read; - uint32_t max_write; - SERIAL_IF_TYPE_t serif_type; -}; - -/** @brief transport interface - */ -struct inv_imu_transport { - struct inv_imu_serif serif; /**< Warning : this field MUST be the first one of struct inv_imu_transport */ - - /** @brief Contains mirrored values of some IP registers */ - struct register_cache { - uint8_t pwr_mgmt0_reg; /**< PWR_MGMT0, Bank: 0 */ - uint8_t gyro_config0_reg; /**< GYRO_CONFIG0, Bank: 0 */ - uint8_t accel_config0_reg; /**< ACCEL_CONFIG0, Bank: 0 */ - uint8_t tmst_config1_reg; /**< TMST_CONFIG1, Bank: MREG_TOP1 */ - } register_cache; /**< Store mostly used register values on SRAM */ - - uint8_t need_mclk_cnt; /**< internal counter to keep track of everyone that needs MCLK */ - -}; - -/** @brief Init cache variable. - * @return 0 in case of success, -1 for any error - */ -int inv_imu_init_transport(struct inv_imu_device *s); - -/** @brief Reads data from a register on IMU. - * @param[in] reg register address to be read - * @param[in] len number of byte to be read - * @param[out] buf output data from the register - * @return 0 in case of success, -1 for any error - */ -int inv_imu_read_reg(struct inv_imu_device *s, uint32_t reg, uint32_t len, uint8_t *buf); - -/** @brief Writes data to a register on IMU. - * @param[in] reg register address to be written - * @param[in] len number of byte to be written - * @param[in] buf input data to write - * @return 0 in case of success, -1 for any error - */ -int inv_imu_write_reg(struct inv_imu_device *s, uint32_t reg, uint32_t len, const uint8_t *buf); - -/** @brief Enable MCLK so that MREG are clocked and system beyond SOI can be safely accessed - * @return 0 in case of success, -1 for any error - */ -int inv_imu_switch_on_mclk(struct inv_imu_device *s); - -/** @brief Disable MCLK so that MREG are not clocked anymore, hence reducing power consumption - * @return 0 in case of success, -1 for any error - */ -int inv_imu_switch_off_mclk(struct inv_imu_device *s); - -#ifdef __cplusplus -} -#endif - -#endif /* _INV_IMU_TRANSPORT_H_ */ - -/** @} */ +/* + * ________________________________________________________________________________________________________ + * Copyright (c) 2015-2015 InvenSense Inc. All rights reserved. + * + * This software, related documentation and any modifications thereto (collectively "Software") is subject + * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright + * and other intellectual property rights laws. + * + * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software + * and any use, reproduction, disclosure or distribution of the Software without an express license agreement + * from InvenSense is strictly prohibited. + * + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS + * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED + * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL + * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, + * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THE SOFTWARE. + * ________________________________________________________________________________________________________ + */ + +/** @defgroup Transport IMU transport + * @brief Low-level IMU SCLK register access + * @ingroup Driver + * @{ + */ + +/** @file inv_imu_transport.h + * Low-level IMU SCLK register access + */ + +#ifndef _INV_IMU_TRANSPORT_H_ +#define _INV_IMU_TRANSPORT_H_ + + +#ifdef __cplusplus +extern "C" { +#endif + +#include + +/* forward declaration */ +struct inv_imu_device; + + +/** @brief enumeration of serial interfaces available on IMU */ +typedef enum +{ + UI_I2C, + UI_SPI4, + UI_SPI3 +} SERIAL_IF_TYPE_t; + +/** @brief basesensor serial interface + */ +struct inv_imu_serif { + void *context; + int (*read_reg)(struct inv_imu_serif *serif, uint8_t reg, uint8_t *buf, uint32_t len); + int (*write_reg)(struct inv_imu_serif *serif, uint8_t reg, const uint8_t *buf, uint32_t len); + int (*configure)(struct inv_imu_serif *serif); + uint32_t max_read; + uint32_t max_write; + SERIAL_IF_TYPE_t serif_type; +}; + +/** @brief transport interface + */ +struct inv_imu_transport { + struct inv_imu_serif serif; /**< Warning : this field MUST be the first one of struct inv_imu_transport */ + + /** @brief Contains mirrored values of some IP registers */ + struct register_cache { + uint8_t pwr_mgmt0_reg; /**< PWR_MGMT0, Bank: 0 */ + uint8_t gyro_config0_reg; /**< GYRO_CONFIG0, Bank: 0 */ + uint8_t accel_config0_reg; /**< ACCEL_CONFIG0, Bank: 0 */ + uint8_t tmst_config1_reg; /**< TMST_CONFIG1, Bank: MREG_TOP1 */ + } register_cache; /**< Store mostly used register values on SRAM */ + + uint8_t need_mclk_cnt; /**< internal counter to keep track of everyone that needs MCLK */ + +}; + +/** @brief Init cache variable. + * @return 0 in case of success, -1 for any error + */ +int inv_imu_init_transport(struct inv_imu_device *s); + +/** @brief Reads data from a register on IMU. + * @param[in] reg register address to be read + * @param[in] len number of byte to be read + * @param[out] buf output data from the register + * @return 0 in case of success, -1 for any error + */ +int inv_imu_read_reg(struct inv_imu_device *s, uint32_t reg, uint32_t len, uint8_t *buf); + +/** @brief Writes data to a register on IMU. + * @param[in] reg register address to be written + * @param[in] len number of byte to be written + * @param[in] buf input data to write + * @return 0 in case of success, -1 for any error + */ +int inv_imu_write_reg(struct inv_imu_device *s, uint32_t reg, uint32_t len, const uint8_t *buf); + +/** @brief Enable MCLK so that MREG are clocked and system beyond SOI can be safely accessed + * @return 0 in case of success, -1 for any error + */ +int inv_imu_switch_on_mclk(struct inv_imu_device *s); + +/** @brief Disable MCLK so that MREG are not clocked anymore, hence reducing power consumption + * @return 0 in case of success, -1 for any error + */ +int inv_imu_switch_off_mclk(struct inv_imu_device *s); + +#ifdef __cplusplus +} +#endif + +#endif /* _INV_IMU_TRANSPORT_H_ */ + +/** @} */ diff --git a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_version.h b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_version.h similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_version.h rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_version.h index 6f63a46..8a70a71 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/imu/inv_imu_version.h +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/imu/inv_imu_version.h @@ -1,37 +1,37 @@ -/* - * ________________________________________________________________________________________________________ - * Copyright (c) 2019 InvenSense Inc. All rights reserved. - * - * This software, related documentation and any modifications thereto (collectively “Software”) is subject - * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright - * and other intellectual property rights laws. - * - * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software - * and any use, reproduction, disclosure or distribution of the Software without an express license agreement - * from InvenSense is strictly prohibited. - * - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS - * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED - * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL - * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY - * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, - * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE - * OF THE SOFTWARE. - * ________________________________________________________________________________________________________ - */ - -#ifndef _INV_IMU_VERSION_H_ -#define _INV_IMU_VERSION_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -#define INV_IMU_VERSION_STRING "2.0.4" - -#ifdef __cplusplus -} -#endif - -#endif /* _INV_IMU_VERSION_H_ */ +/* + * ________________________________________________________________________________________________________ + * Copyright (c) 2019 InvenSense Inc. All rights reserved. + * + * This software, related documentation and any modifications thereto (collectively “Software”) is subject + * to InvenSense and its licensors' intellectual property rights under U.S. and international copyright + * and other intellectual property rights laws. + * + * InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software + * and any use, reproduction, disclosure or distribution of the Software without an express license agreement + * from InvenSense is strictly prohibited. + * + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, THE SOFTWARE IS + * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED + * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * EXCEPT AS OTHERWISE PROVIDED IN A LICENSE AGREEMENT BETWEEN THE PARTIES, IN NO EVENT SHALL + * INVENSENSE BE LIABLE FOR ANY DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, + * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THE SOFTWARE. + * ________________________________________________________________________________________________________ + */ + +#ifndef _INV_IMU_VERSION_H_ +#define _INV_IMU_VERSION_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define INV_IMU_VERSION_STRING "2.0.4" + +#ifdef __cplusplus +} +#endif + +#endif /* _INV_IMU_VERSION_H_ */ diff --git a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/lib_agm/invn/common/invn_types.h b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/lib_agm/invn/common/invn_types.h similarity index 98% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/lib_agm/invn/common/invn_types.h rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/lib_agm/invn/common/invn_types.h index e5d26b3..4026713 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/lib_agm/invn/common/invn_types.h +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/lib_agm/invn/common/invn_types.h @@ -1,153 +1,153 @@ -//----------------------------------------------------------------------------- -/* - Copyright 2014-2015 InvenSense Inc. Portions Copyright 2014-2015 Movea. All rights reserved. - - This software, related documentation and any modifications thereto (collectively Software) is subject - to InvenSense and its licensors' intellectual property rights under U.S. and international copyright - and other intellectual property rights laws. - - InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software - and any use, reproduction, disclosure or distribution of the Software without an express license agreement - from InvenSense is strictly prohibited. -*/ -//----------------------------------------------------------------------------- - -#ifndef INVN_COMMON_INVN_TYPES_H_ -#define INVN_COMMON_INVN_TYPES_H_ - -/** - * @defgroup invn_types Types - * @brief Motion Library - Type definitions. - * \details Definition of codes and error codes used within the MPL and - * returned to the user. - * Every function tries to return a meaningful error code basing - * on the occuring error condition. The error code is numeric. - * - * The available error codes and their associated values are: - * - (0) INV_SUCCESS - * - (32) INV_ERROR - * - (22 / EINVAL) INV_ERROR_INVALID_PARAMETER - * - (1 / EPERM) INV_ERROR_FEATURE_NOT_ENABLED - * - (36) INV_ERROR_FEATURE_NOT_IMPLEMENTED - * - (64) INV_ERROR_FIFO_READ_COUNT - * \todo Clean up the details documentation in order to use only the \\def one. - * \todo Add documentation to all the definitions - * \ingroup Common - * @file invn_types.h - */ - -//=======================================// -//========= Integer Definition =========// -//=======================================// -#ifdef _MSC_VER -# include "inttypes.h" -#else -# include -#endif - -//=======================================// -//======= Fixed Point Conversion =======// -//=======================================// - -//! \def INVN_FLT_TO_FXP -//! Convert the \a value from float to QN value. \ingroup invn_macro -#define INVN_FLT_TO_FXP(value, shift) ( (int32_t) ((float)(value)*(1ULL << (shift)) + ( (value>=0)-0.5f )) ) -//! \def INVN_DBL_TO_FXP -//! Convert the \a value from double to QN value. \ingroup invn_macro -#define INVN_DBL_TO_FXP(value, shift) ( (int32_t) ((double)(value)*(1ULL << (shift)) + ( (value>=0)-0.5 )) ) -//! \def INVN_FLT_TO_UFXP -//! Convert the \a value from float to unsigned QN value. \ingroup invn_macro -#define INVN_FLT_TO_UFXP(value, shift) ( (uint32_t) ((float)(value)*(1ULL << (shift)) + 0.5f) ) -//! \def INVN_DBL_TO_UFXP -//! Convert the \a value from double to unsigned QN value. \ingroup invn_macro -#define INVN_DBL_TO_UFXP(value, shift) ( (uint32_t) ((double)(value)*(1ULL << (shift)) + 0.5) ) -//! \def INVN_FXP_TO_FLT -//! Convert the \a value from QN value to float. \ingroup invn_macro -#define INVN_FXP_TO_FLT(value, shift) ( (float) (int32_t)(value) / (float)(1ULL << (shift)) ) -//! \def INVN_FXP_TO_DBL -//! Convert the \a value from QN value to double. \ingroup invn_macro -#define INVN_FXP_TO_DBL(value, shift) ( (double) (int32_t)(value) / (double)(1ULL << (shift)) ) -//! \def INVN_UFXP_TO_FLT -//! Convert the \a value from unsigned QN value to float. \ingroup invn_macro -#define INVN_UFXP_TO_FLT(value, shift) ( (float) (uint32_t)(value) / (float)(1ULL << (shift)) ) -//! \def INVN_UFXP_TO_DBL -//! Convert the \a value from unsigned QN value to double. \ingroup invn_macro -#define INVN_UFXP_TO_DBL(value, shift) ( (double) (uint32_t)(value) / (double)(1ULL << (shift)) ) -//! \def INVN_CONVERT_FLT_TO_FXP -//! Macro to convert float values from an address into QN values, and copy them to another address. \ingroup invn_macro -#define INVN_CONVERT_FLT_TO_FXP(fltptr, fixptr, length, shift) { int32_t i; for(i=0; i<(length); ++i) (fixptr)[i] = INVN_FLT_TO_FXP((fltptr)[i], shift); } -//! \def INVN_CONVERT_FLT_TO_UFXP -//! Macro to convert float values from an address into unsigned QN values, and copy them to another address. \ingroup invn_macro -#define INVN_CONVERT_FLT_TO_UFXP(fltptr, fixptr, length, shift) { int32_t i; for(i=0; i<(length); ++i) (fixptr)[i] = INVN_FLT_TO_UFXP((fltptr)[i], shift); } -//! \def INVN_CONVERT_DBL_TO_FXP -//! Macro to convert double values from an address into QN values, and copy them to another address. \ingroup invn_macro -#define INVN_CONVERT_DBL_TO_FXP(fltptr, fixptr, length, shift) { int32_t i; for(i=0; i<(length); ++i) (fixptr)[i] = INVN_DBL_TO_FXP((fltptr)[i], shift); } -//! \def INVN_CONVERT_DBL_TO_UFXP -//! Macro to convert double values from an address into unsigned QN values, and copy them to another address. \ingroup invn_macro -#define INVN_CONVERT_DBL_TO_UFXP(fltptr, fixptr, length, shift) { int32_t i; for(i=0; i<(length); ++i) (fixptr)[i] = INVN_DBL_TO_UFXP((fltptr)[i], shift); } -//! \def INVN_CONVERT_FXP_TO_FLT -//! Macro to convert QN values from an address into float values, and copy them to another address. \ingroup invn_macro -#define INVN_CONVERT_FXP_TO_FLT(fixptr, fltptr, length, shift) { int32_t i; for(i=0; i<(length); ++i) (fltptr)[i] = INVN_FXP_TO_FLT((fixptr)[i], shift); } -//! \def INVN_CONVERT_UFXP_TO_FLT -//! Macro to convert unsigned QN values from an address into float values, and copy them to another address. \ingroup invn_macro -#define INVN_CONVERT_UFXP_TO_FLT(fixptr, fltptr, length, shift) { int32_t i; for(i=0; i<(length); ++i) (fltptr)[i] = INVN_UFXP_TO_FLT((fixptr)[i], shift); } -//! \def INVN_CONVERT_FXP_TO_DBL -//! Macro to convert QN values from an address into double values, and copy them to another address. \ingroup invn_macro -#define INVN_CONVERT_FXP_TO_DBL(fixptr, fltptr, length, shift) { int32_t i; for(i=0; i<(length); ++i) (fltptr)[i] = INVN_FXP_TO_DBL((fixptr)[i], shift); } -//! \def INVN_CONVERT_UFXP_TO_DBL -//! \brief Macro to convert unsigned QN values from an address into double values, and copy them to another address. \ingroup invn_macro -#define INVN_CONVERT_UFXP_TO_DBL(fixptr, fltptr, length, shift) { int32_t i; for(i=0; i<(length); ++i) (fltptr)[i] = INVN_UFXP_TO_DBL((fixptr)[i], shift); } - - -//=====================================// -//========= Error Definition =========// -//=====================================// - -#ifndef REMOVE_INV_ERROR_T - typedef int32_t inv_error_t; /*!< Type used for error definitions. \ingroup invn_types */ -#endif - -//typedef int32_t mpu_error_t; -typedef int64_t mpu_time_t; /*!< Type used for mpu time. \ingroup invn_types */ - -// Typically I2C addresses are 8-bit, but some specifications allow for a 10-bit address -// This definition allows the length to be optimally defined for the platform -typedef uint8_t inv_i2c_addr_t; /*!< Type used for I2C addresses. \ingroup invn_types */ - -#ifdef __IAR_SYSTEMS_ICC__ - // These are defined in standard C errno.h - #define EINVAL (22) - #define EPERM (1) - #define ENOMEM (12) -#else - #include "errno.h" -#endif - -#define INVN_SUCCESS (0) /*!< Constant definition for success. \ingroup invn_types */ -#define INVN_ERROR_BASE (0x20) /*!< Constant definition for basic error. Value is \b 32 \ingroup invn_types */ -#define INVN_ERROR (INVN_ERROR_BASE) /*!< Constant definition for error. Value is \b 32 \ingroup invn_types */ -#define INVN_ERROR_FEATURE_NOT_ENABLED (EPERM) /*!< Constant definition for feature not enabled error. \ingroup invn_types */ -#define INVN_ERROR_FEATURE_NOT_IMPLEMENTED (INVN_ERROR_BASE + 4) /*!< Constant definition for feature not implemented error. \ingroup invn_types */ -#define INVN_ERROR_INVALID_PARAMETER (EINVAL) /*!< Constant definition for invalid parameter error. \ingroup invn_types */ -#define INVN_ERROR_FILE_OPEN (INVN_ERROR_BASE + 14) /*!< Constant definition for opening file error. \ingroup invn_types */ -#define INVN_ERROR_FILE_READ (INVN_ERROR_BASE + 15) /*!< Constant definition for reading file error. \ingroup invn_types */ -#define INVN_ERROR_FILE_WRITE (INVN_ERROR_BASE + 16) /*!< Constant definition for writing file error. \ingroup invn_types */ -#define INVN_ERROR_INVALID_CONFIGURATION (INVN_ERROR_BASE + 17) /*!< Constant definition for invalid configuration error. \ingroup invn_types */ -/* Serial Communication */ -#define INVN_ERROR_SERIAL_OPEN_ERROR (INVN_ERROR_BASE + 21) /*!< Constant definition for serial open error. \ingroup invn_types */ -#define INVN_ERROR_SERIAL_READ (INVN_ERROR_BASE + 22) /*!< Constant definition for serial read error. \ingroup invn_types */ -#define INVN_ERROR_SERIAL_WRITE (INVN_ERROR_BASE + 23) /*!< Constant definition for serial write error. \ingroup invn_types */ -/* Fifo */ -#define INVN_ERROR_FIFO_OVERFLOW (INVN_ERROR_BASE + 30) /*!< Constant definition for fifo overflow error. \ingroup invn_types */ -#define INVN_ERROR_FIFO_FOOTER (INVN_ERROR_BASE + 31) /*!< Constant definition for fifo footer error. \ingroup invn_types */ -#define INVN_ERROR_FIFO_READ_COUNT (INVN_ERROR_BASE + 32) /*!< Constant definition for fifo read count error. \ingroup invn_types */ -#define INVN_ERROR_FIFO_READ_DATA (INVN_ERROR_BASE + 33) /*!< Constant definition for fifo read data error. \ingroup invn_types */ -/* OS interface errors */ -#define INVN_ERROR_OS_BAD_HANDLE (INVN_ERROR_BASE + 61) /*!< Constant definition for OS bad handle error. \ingroup invn_types */ -#define INVN_ERROR_OS_CREATE_FAILED (INVN_ERROR_BASE + 62) /*!< Constant definition for OS create failed error. \ingroup invn_types */ -#define INVN_ERROR_OS_LOCK_FAILED (INVN_ERROR_BASE + 63) /*!< Constant definition for OS lock failed error. \ingroup invn_types */ -/* Warning */ -#define INVN_WARNING_SEMAPHORE_TIMEOUT (INVN_ERROR_BASE + 86) /*!< Constant definition for semaphore timeout warning. \ingroup invn_types */ - - -#endif // INVN_COMMON_INVN_TYPES_H_ +//----------------------------------------------------------------------------- +/* + Copyright 2014-2015 InvenSense Inc. Portions Copyright 2014-2015 Movea. All rights reserved. + + This software, related documentation and any modifications thereto (collectively Software) is subject + to InvenSense and its licensors' intellectual property rights under U.S. and international copyright + and other intellectual property rights laws. + + InvenSense and its licensors retain all intellectual property and proprietary rights in and to the Software + and any use, reproduction, disclosure or distribution of the Software without an express license agreement + from InvenSense is strictly prohibited. +*/ +//----------------------------------------------------------------------------- + +#ifndef INVN_COMMON_INVN_TYPES_H_ +#define INVN_COMMON_INVN_TYPES_H_ + +/** + * @defgroup invn_types Types + * @brief Motion Library - Type definitions. + * \details Definition of codes and error codes used within the MPL and + * returned to the user. + * Every function tries to return a meaningful error code basing + * on the occuring error condition. The error code is numeric. + * + * The available error codes and their associated values are: + * - (0) INV_SUCCESS + * - (32) INV_ERROR + * - (22 / EINVAL) INV_ERROR_INVALID_PARAMETER + * - (1 / EPERM) INV_ERROR_FEATURE_NOT_ENABLED + * - (36) INV_ERROR_FEATURE_NOT_IMPLEMENTED + * - (64) INV_ERROR_FIFO_READ_COUNT + * \todo Clean up the details documentation in order to use only the \\def one. + * \todo Add documentation to all the definitions + * \ingroup Common + * @file invn_types.h + */ + +//=======================================// +//========= Integer Definition =========// +//=======================================// +#ifdef _MSC_VER +# include "inttypes.h" +#else +# include +#endif + +//=======================================// +//======= Fixed Point Conversion =======// +//=======================================// + +//! \def INVN_FLT_TO_FXP +//! Convert the \a value from float to QN value. \ingroup invn_macro +#define INVN_FLT_TO_FXP(value, shift) ( (int32_t) ((float)(value)*(1ULL << (shift)) + ( (value>=0)-0.5f )) ) +//! \def INVN_DBL_TO_FXP +//! Convert the \a value from double to QN value. \ingroup invn_macro +#define INVN_DBL_TO_FXP(value, shift) ( (int32_t) ((double)(value)*(1ULL << (shift)) + ( (value>=0)-0.5 )) ) +//! \def INVN_FLT_TO_UFXP +//! Convert the \a value from float to unsigned QN value. \ingroup invn_macro +#define INVN_FLT_TO_UFXP(value, shift) ( (uint32_t) ((float)(value)*(1ULL << (shift)) + 0.5f) ) +//! \def INVN_DBL_TO_UFXP +//! Convert the \a value from double to unsigned QN value. \ingroup invn_macro +#define INVN_DBL_TO_UFXP(value, shift) ( (uint32_t) ((double)(value)*(1ULL << (shift)) + 0.5) ) +//! \def INVN_FXP_TO_FLT +//! Convert the \a value from QN value to float. \ingroup invn_macro +#define INVN_FXP_TO_FLT(value, shift) ( (float) (int32_t)(value) / (float)(1ULL << (shift)) ) +//! \def INVN_FXP_TO_DBL +//! Convert the \a value from QN value to double. \ingroup invn_macro +#define INVN_FXP_TO_DBL(value, shift) ( (double) (int32_t)(value) / (double)(1ULL << (shift)) ) +//! \def INVN_UFXP_TO_FLT +//! Convert the \a value from unsigned QN value to float. \ingroup invn_macro +#define INVN_UFXP_TO_FLT(value, shift) ( (float) (uint32_t)(value) / (float)(1ULL << (shift)) ) +//! \def INVN_UFXP_TO_DBL +//! Convert the \a value from unsigned QN value to double. \ingroup invn_macro +#define INVN_UFXP_TO_DBL(value, shift) ( (double) (uint32_t)(value) / (double)(1ULL << (shift)) ) +//! \def INVN_CONVERT_FLT_TO_FXP +//! Macro to convert float values from an address into QN values, and copy them to another address. \ingroup invn_macro +#define INVN_CONVERT_FLT_TO_FXP(fltptr, fixptr, length, shift) { int32_t i; for(i=0; i<(length); ++i) (fixptr)[i] = INVN_FLT_TO_FXP((fltptr)[i], shift); } +//! \def INVN_CONVERT_FLT_TO_UFXP +//! Macro to convert float values from an address into unsigned QN values, and copy them to another address. \ingroup invn_macro +#define INVN_CONVERT_FLT_TO_UFXP(fltptr, fixptr, length, shift) { int32_t i; for(i=0; i<(length); ++i) (fixptr)[i] = INVN_FLT_TO_UFXP((fltptr)[i], shift); } +//! \def INVN_CONVERT_DBL_TO_FXP +//! Macro to convert double values from an address into QN values, and copy them to another address. \ingroup invn_macro +#define INVN_CONVERT_DBL_TO_FXP(fltptr, fixptr, length, shift) { int32_t i; for(i=0; i<(length); ++i) (fixptr)[i] = INVN_DBL_TO_FXP((fltptr)[i], shift); } +//! \def INVN_CONVERT_DBL_TO_UFXP +//! Macro to convert double values from an address into unsigned QN values, and copy them to another address. \ingroup invn_macro +#define INVN_CONVERT_DBL_TO_UFXP(fltptr, fixptr, length, shift) { int32_t i; for(i=0; i<(length); ++i) (fixptr)[i] = INVN_DBL_TO_UFXP((fltptr)[i], shift); } +//! \def INVN_CONVERT_FXP_TO_FLT +//! Macro to convert QN values from an address into float values, and copy them to another address. \ingroup invn_macro +#define INVN_CONVERT_FXP_TO_FLT(fixptr, fltptr, length, shift) { int32_t i; for(i=0; i<(length); ++i) (fltptr)[i] = INVN_FXP_TO_FLT((fixptr)[i], shift); } +//! \def INVN_CONVERT_UFXP_TO_FLT +//! Macro to convert unsigned QN values from an address into float values, and copy them to another address. \ingroup invn_macro +#define INVN_CONVERT_UFXP_TO_FLT(fixptr, fltptr, length, shift) { int32_t i; for(i=0; i<(length); ++i) (fltptr)[i] = INVN_UFXP_TO_FLT((fixptr)[i], shift); } +//! \def INVN_CONVERT_FXP_TO_DBL +//! Macro to convert QN values from an address into double values, and copy them to another address. \ingroup invn_macro +#define INVN_CONVERT_FXP_TO_DBL(fixptr, fltptr, length, shift) { int32_t i; for(i=0; i<(length); ++i) (fltptr)[i] = INVN_FXP_TO_DBL((fixptr)[i], shift); } +//! \def INVN_CONVERT_UFXP_TO_DBL +//! \brief Macro to convert unsigned QN values from an address into double values, and copy them to another address. \ingroup invn_macro +#define INVN_CONVERT_UFXP_TO_DBL(fixptr, fltptr, length, shift) { int32_t i; for(i=0; i<(length); ++i) (fltptr)[i] = INVN_UFXP_TO_DBL((fixptr)[i], shift); } + + +//=====================================// +//========= Error Definition =========// +//=====================================// + +#ifndef REMOVE_INV_ERROR_T + typedef int32_t inv_error_t; /*!< Type used for error definitions. \ingroup invn_types */ +#endif + +//typedef int32_t mpu_error_t; +typedef int64_t mpu_time_t; /*!< Type used for mpu time. \ingroup invn_types */ + +// Typically I2C addresses are 8-bit, but some specifications allow for a 10-bit address +// This definition allows the length to be optimally defined for the platform +typedef uint8_t inv_i2c_addr_t; /*!< Type used for I2C addresses. \ingroup invn_types */ + +#ifdef __IAR_SYSTEMS_ICC__ + // These are defined in standard C errno.h + #define EINVAL (22) + #define EPERM (1) + #define ENOMEM (12) +#else + #include "errno.h" +#endif + +#define INVN_SUCCESS (0) /*!< Constant definition for success. \ingroup invn_types */ +#define INVN_ERROR_BASE (0x20) /*!< Constant definition for basic error. Value is \b 32 \ingroup invn_types */ +#define INVN_ERROR (INVN_ERROR_BASE) /*!< Constant definition for error. Value is \b 32 \ingroup invn_types */ +#define INVN_ERROR_FEATURE_NOT_ENABLED (EPERM) /*!< Constant definition for feature not enabled error. \ingroup invn_types */ +#define INVN_ERROR_FEATURE_NOT_IMPLEMENTED (INVN_ERROR_BASE + 4) /*!< Constant definition for feature not implemented error. \ingroup invn_types */ +#define INVN_ERROR_INVALID_PARAMETER (EINVAL) /*!< Constant definition for invalid parameter error. \ingroup invn_types */ +#define INVN_ERROR_FILE_OPEN (INVN_ERROR_BASE + 14) /*!< Constant definition for opening file error. \ingroup invn_types */ +#define INVN_ERROR_FILE_READ (INVN_ERROR_BASE + 15) /*!< Constant definition for reading file error. \ingroup invn_types */ +#define INVN_ERROR_FILE_WRITE (INVN_ERROR_BASE + 16) /*!< Constant definition for writing file error. \ingroup invn_types */ +#define INVN_ERROR_INVALID_CONFIGURATION (INVN_ERROR_BASE + 17) /*!< Constant definition for invalid configuration error. \ingroup invn_types */ +/* Serial Communication */ +#define INVN_ERROR_SERIAL_OPEN_ERROR (INVN_ERROR_BASE + 21) /*!< Constant definition for serial open error. \ingroup invn_types */ +#define INVN_ERROR_SERIAL_READ (INVN_ERROR_BASE + 22) /*!< Constant definition for serial read error. \ingroup invn_types */ +#define INVN_ERROR_SERIAL_WRITE (INVN_ERROR_BASE + 23) /*!< Constant definition for serial write error. \ingroup invn_types */ +/* Fifo */ +#define INVN_ERROR_FIFO_OVERFLOW (INVN_ERROR_BASE + 30) /*!< Constant definition for fifo overflow error. \ingroup invn_types */ +#define INVN_ERROR_FIFO_FOOTER (INVN_ERROR_BASE + 31) /*!< Constant definition for fifo footer error. \ingroup invn_types */ +#define INVN_ERROR_FIFO_READ_COUNT (INVN_ERROR_BASE + 32) /*!< Constant definition for fifo read count error. \ingroup invn_types */ +#define INVN_ERROR_FIFO_READ_DATA (INVN_ERROR_BASE + 33) /*!< Constant definition for fifo read data error. \ingroup invn_types */ +/* OS interface errors */ +#define INVN_ERROR_OS_BAD_HANDLE (INVN_ERROR_BASE + 61) /*!< Constant definition for OS bad handle error. \ingroup invn_types */ +#define INVN_ERROR_OS_CREATE_FAILED (INVN_ERROR_BASE + 62) /*!< Constant definition for OS create failed error. \ingroup invn_types */ +#define INVN_ERROR_OS_LOCK_FAILED (INVN_ERROR_BASE + 63) /*!< Constant definition for OS lock failed error. \ingroup invn_types */ +/* Warning */ +#define INVN_WARNING_SEMAPHORE_TIMEOUT (INVN_ERROR_BASE + 86) /*!< Constant definition for semaphore timeout warning. \ingroup invn_types */ + + +#endif // INVN_COMMON_INVN_TYPES_H_ diff --git a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/lib_agm/invn_algo_agm.h b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/lib_agm/invn_algo_agm.h similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/lib_agm/invn_algo_agm.h rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/lib_agm/invn_algo_agm.h index 7f851b4..213c158 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/lib_agm/invn_algo_agm.h +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/lib_agm/invn_algo_agm.h @@ -1,156 +1,156 @@ -/* -$License: - Copyright (C) 2018 InvenSense Corporation, All Rights Reserved. -$ -*/ - - -#ifndef _INVN_ALGO_AGM_H_ -#define _INVN_ALGO_AGM_H_ - -#include "invn_types.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** \defgroup AGM AGM - * \brief Algorithm that provides device orientation. Algorithm inputs are raw Accelerometer, Gyroscope and Magnetometer data. - * Algorithm outputs: calibrated sensor and 9-axis sensor fusion. - * \warning supported sampling frequency [50 Hz-1000 Hz] - * \warning supported gyroscope FSR [250 dps, 500 dps, 1000 dps, 2000 dps, 4000 dps] - * \warning supported accelerometer FSR [1 g, 2 g, 4 g, 8 g, 16 g] - */ - -#define INVN_ALGO_AGM_INPUT_MASK_ACC 1 ///< Raw Accel update mask -#define INVN_ALGO_AGM_INPUT_MASK_GYR 2 ///< Raw Gyro update mask -#define INVN_ALGO_AGM_INPUT_MASK_MAG 4 ///< Raw Mag update mask - -#define INVN_ALGO_AGM_OUTPUT_MASK_ACCEL_CAL 1 ///< Accel cal output update mask -#define INVN_ALGO_AGM_OUTPUT_MASK_GYRO_CAL 2 ///< Gyro cal output update mask -#define INVN_ALGO_AGM_OUTPUT_MASK_MAG_CAL 4 ///< Mag cal output update mask -#define INVN_ALGO_AGM_OUTPUT_MASK_QUAT_AG 8 ///< Game Rotation Vector (Accel and Gyro Fusion) output update mask -#define INVN_ALGO_AGM_OUTPUT_MASK_QUAT_AGM 16 ///< Rotation Vector (Accel, Gyro and Magnetometer Fusion) output update mask -#define INVN_ALGO_AGM_OUTPUT_MASK_GRAVITY 32 ///< Gravity vector output update mask -#define INVN_ALGO_AGM_OUTPUT_MASK_LINEARACC 64 ///< Linear acceleration vector output update mask - - -/* Forward declarations */ -struct inv_icm426xx; - -/*! \struct InvnAlgoAGMInput - * AGM input structure (raw data) \ingroup AGM - */ -typedef struct -{ - int32_t mask; /*!< mask to specify updated inputs. */ - int64_t sRimu_time_us; /*!< timestamp \f$ [\mu s]\f$ of raw accel and gyro */ - int32_t sRacc_data[3]; /*!< raw accelerometer in high resolution mode. Expect Full Scale Value coded on 20 bit (i.e. +/- FSR g = 1<<19 LSB) */ - int32_t sRgyr_data[3]; /*!< raw gyroscope in high resolution mode. Expect Full Scale Value coded on 20 bit (i.e. +/- FSR dps = 1<<19 LSB) */ - int16_t sRtemp_data; /*!< raw temperature */ - int64_t sRmag_time_us; /*!< timestamp of raw mag */ - int32_t sRmag_data[3]; /*!< raw mag */ -} InvnAlgoAGMInput; - - -/*! \struct InvnAlgoAGMOutput - * AGM output structure (calibrated sensors and fusion output) \ingroup AGM - */ -typedef struct -{ - int32_t mask; /*!< mask to specify updated outputs */ - int32_t acc_uncal_q16[3]; /*!< uncalibrated accelerometer (1 g = 1<<16) */ - int32_t acc_cal_q16[3]; /*!< calibrated accelerometer (1 g = 1<<16) */ - int32_t acc_bias_q16[3]; /*!< accelerometer bias (1 g = 1<<16)*/ - int8_t acc_accuracy_flag; /*!< accelerometer accuracy from 0(non calibrated) to 3(well calibrated) */ - - int32_t gyr_uncal_q16[3]; /*!< uncalibrated gyroscope (1 dps = 1<<16) */ - int32_t gyr_cal_q16[3]; /*!< calibrated gyroscope (1 dps = 1<<16) */ - int32_t gyr_bias_q16[3]; /*!< gyro bias (1 dps = 1<<16)*/ - int8_t gyr_accuracy_flag; /*!< gyro accuracy, from 0(non calibrated) to 3(well calibrated) */ - - int32_t mag_uncal_q16[3]; /*!< uncalibrated magnetometer (1uT = 1<<16) */ - int32_t mag_cal_q16[3]; /*!< calibrated magnetometer (1uT = 1<<16) */ - int32_t mag_bias_q16[3]; /*!< magnetometer bias (1uT = 1<<16) */ - int8_t mag_accuracy_flag; /*!< magnetometer accuracy, from 0(non calibrated) to 3(well calibrated) */ - - int32_t grv_quat_q30[4]; /*!< 6-axis (accel and gyro fusion) quaternion */ - int32_t rv_quat_q30[4]; /*!< 9-axis (accel, gyro and magnetometer fusion) quaternion */ - int32_t rv_accuracy_q27; /*!< 9-axis (accel, gyro and magnetometer fusion) 3\sigma accuracy in rad */ - int32_t gravity_q16[3]; /*!< gravity estimation in sensor frame */ - int32_t linear_acc_q16[3]; /*!< linear acceleration estimation in sensor frame */ - - int32_t temp_degC_q16; /*!< temperature (1 \f$ [^{\circ}C]\f$ = 1<<16)*/ -} InvnAlgoAGMOutput; - - -/*! \struct InvnAlgoAGMConfig - * AGM configuration structure (sensor related settings) \ingroup AGM - */ -typedef struct -{ - int32_t * acc_bias_q16; /*!< Previously stored accel bias pointer. If pointer is NULL or 0, offset will be set to { 0, 0, 0} */ - int32_t * gyr_bias_q16; /*!< Previously stored gyro bias pointer. If pointer is NULL or 0, offset will be set to { 0, 0, 0} */ - int32_t * mag_bias_q16; /*!< mag_bias_q16 Previously stored mag bias pointer If pointer is NULL or 0, offset will be set to { 0, 0, 0} */ - int8_t acc_accuracy; /*!< Previously stored accelerometer bias accuracy (0 to 3) */ - int8_t gyr_accuracy; /*!< Previously stored gyroscope bias accuracy (0 to 3) */ - int8_t mag_accuracy; /*!< Previously stored magnetometer bias accuracy (0 to 3) */ - - int32_t acc_fsr; /*!< accelerometer full scale range [g] */ - int32_t gyr_fsr; /*!< gyroscope full scale range [dps] */ - - uint32_t acc_odr_us; /*!< accelerometer output data rate in \f$ [\mu s]\f$ */ - uint32_t gyr_odr_us; /*!< gyroscope output data rate \f$ [\mu s]\f$ */ - - int32_t mag_sc_q16; /*!< magnetometer sensitivity (uT/LSB, e.g. mag_uT = (mag_sc_q16 * raw_mag_LSB)/65536) */ - uint32_t mag_odr_us; /*!< magnetometer output data rate \f$ [\mu s]\f$ */ - - int32_t temp_sensitivity; /*!< temperature sensitivity in q30 (if temperature(\f$ ^{\circ}C \f$) = LSB * k + z, then temp_sensitivity = k) */ - int32_t temp_offset; /*!< temperature offset in q16 (if temperature(\f$ ^{\circ}C \f$) = LSB * k + z, then temp_offset = z) */ -} InvnAlgoAGMConfig; - - -/*! - * \brief Return library version x.y.z-suffix as a char array - * \retval library version a char array "x.y.z-suffix" - * \ingroup AGM - */ -const char * invn_algo_agm_version(void); - -/*! - * \brief Initializes algorithms with default parameters and reset states. - * (\icm_device[in] Invensense ICM426XX device pointer. Only when gyro assisted is enabled.) - * \config[in] algo init parameters structure. - * \return initialization success indicator. - * \retval 0 Success - * \retval 1 Fail - * \ingroup AGM - */ -#ifdef WITH_GYRO_ASSIST -uint8_t invn_algo_agm_init_a(struct inv_icm426xx * icm_device, const InvnAlgoAGMConfig * config); -#else -uint8_t invn_algo_agm_init(const InvnAlgoAGMConfig * config); -#endif - -/*! - * \brief Sets algo config structure. - * \config[in] config structure of the algo. - * \ingroup AGM - */ -void invn_algo_agm_set_config(const InvnAlgoAGMConfig * config); - - -/*! - * \brief Performs algorithm computation. - * \in inputs algorithm input. Input mask (inputs->mask) should be set with respect to new sensor data in InvnAlgoAGMInput. - * \out outputs algorithm output. Output mask (outputs->mask) reports updated outputs in InvnAlgoAGMOutput. - * \ingroup AGM - */ -void invn_algo_agm_process(const InvnAlgoAGMInput *inputs, InvnAlgoAGMOutput *outputs); - -#ifdef __cplusplus -} -#endif - - -#endif +/* +$License: + Copyright (C) 2018 InvenSense Corporation, All Rights Reserved. +$ +*/ + + +#ifndef _INVN_ALGO_AGM_H_ +#define _INVN_ALGO_AGM_H_ + +#include "invn_types.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** \defgroup AGM AGM + * \brief Algorithm that provides device orientation. Algorithm inputs are raw Accelerometer, Gyroscope and Magnetometer data. + * Algorithm outputs: calibrated sensor and 9-axis sensor fusion. + * \warning supported sampling frequency [50 Hz-1000 Hz] + * \warning supported gyroscope FSR [250 dps, 500 dps, 1000 dps, 2000 dps, 4000 dps] + * \warning supported accelerometer FSR [1 g, 2 g, 4 g, 8 g, 16 g] + */ + +#define INVN_ALGO_AGM_INPUT_MASK_ACC 1 ///< Raw Accel update mask +#define INVN_ALGO_AGM_INPUT_MASK_GYR 2 ///< Raw Gyro update mask +#define INVN_ALGO_AGM_INPUT_MASK_MAG 4 ///< Raw Mag update mask + +#define INVN_ALGO_AGM_OUTPUT_MASK_ACCEL_CAL 1 ///< Accel cal output update mask +#define INVN_ALGO_AGM_OUTPUT_MASK_GYRO_CAL 2 ///< Gyro cal output update mask +#define INVN_ALGO_AGM_OUTPUT_MASK_MAG_CAL 4 ///< Mag cal output update mask +#define INVN_ALGO_AGM_OUTPUT_MASK_QUAT_AG 8 ///< Game Rotation Vector (Accel and Gyro Fusion) output update mask +#define INVN_ALGO_AGM_OUTPUT_MASK_QUAT_AGM 16 ///< Rotation Vector (Accel, Gyro and Magnetometer Fusion) output update mask +#define INVN_ALGO_AGM_OUTPUT_MASK_GRAVITY 32 ///< Gravity vector output update mask +#define INVN_ALGO_AGM_OUTPUT_MASK_LINEARACC 64 ///< Linear acceleration vector output update mask + + +/* Forward declarations */ +struct inv_icm426xx; + +/*! \struct InvnAlgoAGMInput + * AGM input structure (raw data) \ingroup AGM + */ +typedef struct +{ + int32_t mask; /*!< mask to specify updated inputs. */ + int64_t sRimu_time_us; /*!< timestamp \f$ [\mu s]\f$ of raw accel and gyro */ + int32_t sRacc_data[3]; /*!< raw accelerometer in high resolution mode. Expect Full Scale Value coded on 20 bit (i.e. +/- FSR g = 1<<19 LSB) */ + int32_t sRgyr_data[3]; /*!< raw gyroscope in high resolution mode. Expect Full Scale Value coded on 20 bit (i.e. +/- FSR dps = 1<<19 LSB) */ + int16_t sRtemp_data; /*!< raw temperature */ + int64_t sRmag_time_us; /*!< timestamp of raw mag */ + int32_t sRmag_data[3]; /*!< raw mag */ +} InvnAlgoAGMInput; + + +/*! \struct InvnAlgoAGMOutput + * AGM output structure (calibrated sensors and fusion output) \ingroup AGM + */ +typedef struct +{ + int32_t mask; /*!< mask to specify updated outputs */ + int32_t acc_uncal_q16[3]; /*!< uncalibrated accelerometer (1 g = 1<<16) */ + int32_t acc_cal_q16[3]; /*!< calibrated accelerometer (1 g = 1<<16) */ + int32_t acc_bias_q16[3]; /*!< accelerometer bias (1 g = 1<<16)*/ + int8_t acc_accuracy_flag; /*!< accelerometer accuracy from 0(non calibrated) to 3(well calibrated) */ + + int32_t gyr_uncal_q16[3]; /*!< uncalibrated gyroscope (1 dps = 1<<16) */ + int32_t gyr_cal_q16[3]; /*!< calibrated gyroscope (1 dps = 1<<16) */ + int32_t gyr_bias_q16[3]; /*!< gyro bias (1 dps = 1<<16)*/ + int8_t gyr_accuracy_flag; /*!< gyro accuracy, from 0(non calibrated) to 3(well calibrated) */ + + int32_t mag_uncal_q16[3]; /*!< uncalibrated magnetometer (1uT = 1<<16) */ + int32_t mag_cal_q16[3]; /*!< calibrated magnetometer (1uT = 1<<16) */ + int32_t mag_bias_q16[3]; /*!< magnetometer bias (1uT = 1<<16) */ + int8_t mag_accuracy_flag; /*!< magnetometer accuracy, from 0(non calibrated) to 3(well calibrated) */ + + int32_t grv_quat_q30[4]; /*!< 6-axis (accel and gyro fusion) quaternion */ + int32_t rv_quat_q30[4]; /*!< 9-axis (accel, gyro and magnetometer fusion) quaternion */ + int32_t rv_accuracy_q27; /*!< 9-axis (accel, gyro and magnetometer fusion) 3\sigma accuracy in rad */ + int32_t gravity_q16[3]; /*!< gravity estimation in sensor frame */ + int32_t linear_acc_q16[3]; /*!< linear acceleration estimation in sensor frame */ + + int32_t temp_degC_q16; /*!< temperature (1 \f$ [^{\circ}C]\f$ = 1<<16)*/ +} InvnAlgoAGMOutput; + + +/*! \struct InvnAlgoAGMConfig + * AGM configuration structure (sensor related settings) \ingroup AGM + */ +typedef struct +{ + int32_t * acc_bias_q16; /*!< Previously stored accel bias pointer. If pointer is NULL or 0, offset will be set to { 0, 0, 0} */ + int32_t * gyr_bias_q16; /*!< Previously stored gyro bias pointer. If pointer is NULL or 0, offset will be set to { 0, 0, 0} */ + int32_t * mag_bias_q16; /*!< mag_bias_q16 Previously stored mag bias pointer If pointer is NULL or 0, offset will be set to { 0, 0, 0} */ + int8_t acc_accuracy; /*!< Previously stored accelerometer bias accuracy (0 to 3) */ + int8_t gyr_accuracy; /*!< Previously stored gyroscope bias accuracy (0 to 3) */ + int8_t mag_accuracy; /*!< Previously stored magnetometer bias accuracy (0 to 3) */ + + int32_t acc_fsr; /*!< accelerometer full scale range [g] */ + int32_t gyr_fsr; /*!< gyroscope full scale range [dps] */ + + uint32_t acc_odr_us; /*!< accelerometer output data rate in \f$ [\mu s]\f$ */ + uint32_t gyr_odr_us; /*!< gyroscope output data rate \f$ [\mu s]\f$ */ + + int32_t mag_sc_q16; /*!< magnetometer sensitivity (uT/LSB, e.g. mag_uT = (mag_sc_q16 * raw_mag_LSB)/65536) */ + uint32_t mag_odr_us; /*!< magnetometer output data rate \f$ [\mu s]\f$ */ + + int32_t temp_sensitivity; /*!< temperature sensitivity in q30 (if temperature(\f$ ^{\circ}C \f$) = LSB * k + z, then temp_sensitivity = k) */ + int32_t temp_offset; /*!< temperature offset in q16 (if temperature(\f$ ^{\circ}C \f$) = LSB * k + z, then temp_offset = z) */ +} InvnAlgoAGMConfig; + + +/*! + * \brief Return library version x.y.z-suffix as a char array + * \retval library version a char array "x.y.z-suffix" + * \ingroup AGM + */ +const char * invn_algo_agm_version(void); + +/*! + * \brief Initializes algorithms with default parameters and reset states. + * (\icm_device[in] Invensense ICM426XX device pointer. Only when gyro assisted is enabled.) + * \config[in] algo init parameters structure. + * \return initialization success indicator. + * \retval 0 Success + * \retval 1 Fail + * \ingroup AGM + */ +#ifdef WITH_GYRO_ASSIST +uint8_t invn_algo_agm_init_a(struct inv_icm426xx * icm_device, const InvnAlgoAGMConfig * config); +#else +uint8_t invn_algo_agm_init(const InvnAlgoAGMConfig * config); +#endif + +/*! + * \brief Sets algo config structure. + * \config[in] config structure of the algo. + * \ingroup AGM + */ +void invn_algo_agm_set_config(const InvnAlgoAGMConfig * config); + + +/*! + * \brief Performs algorithm computation. + * \in inputs algorithm input. Input mask (inputs->mask) should be set with respect to new sensor data in InvnAlgoAGMInput. + * \out outputs algorithm output. Output mask (outputs->mask) reports updated outputs in InvnAlgoAGMOutput. + * \ingroup AGM + */ +void invn_algo_agm_process(const InvnAlgoAGMInput *inputs, InvnAlgoAGMOutput *outputs); + +#ifdef __cplusplus +} +#endif + + +#endif diff --git a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/lib_agm/libInvnAlgoAGM.a b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/lib_agm/libInvnAlgoAGM.a similarity index 100% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/lib_agm/libInvnAlgoAGM.a rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/lib_agm/libInvnAlgoAGM.a diff --git a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/lib_agm/test_vector/out_invn_agm_1.h b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/lib_agm/test_vector/out_invn_agm_1.h similarity index 99% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/lib_agm/test_vector/out_invn_agm_1.h rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/lib_agm/test_vector/out_invn_agm_1.h index edc2c21..fcfa6eb 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/Invn/lib_agm/test_vector/out_invn_agm_1.h +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/Invn/lib_agm/test_vector/out_invn_agm_1.h @@ -1,3012 +1,3012 @@ -// sRimu_time_us, sRacc_data[0:2], sRgyr_data[0:2], sRtemp_data, sRmag_data[0:2], rv_quat_q30[0:3], acc_bias_q16[0:2], gyr_bias_q16[0:2], mag_bias_q16[0:2] - /* $License: - Copyright (C) 2019 InvenSense Corporation, All Rights Reserved. - Test vector - Input file is composed by - - Output generated with algorithm version: 0.0.0-dev - - Test Vector parameters: ACC_FSR = 32, GYR_FSR= 4000, ACC_ODR_US= 10000, GYR_ODR_US = 10000, mag_sc_q16 = 9830, MAG_ODR_US = 10000 - Test Vector composition: - sRimu_time_us, sRacc_data[0:2] , sRgyr_data[0:2], sRtemp_data, sRmag_data[0:2], rv_quat_q30[0:3], acc_bias_q16[0:2], gyr_bias_q16[0:2], mag_bias_q16[0:2] */ - -{ 5007514, 112, -560, 16492, 0, -2, 6, 86, -165, -226, -292, 1073741824, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, -{ 5017469, 84, -572, 16496, -4, 0, 4, 81, -150, -226, -296, -319808352, 8908946, -16311264, 1024840814, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, -{ 5027424, 64, -560, 16496, -6, -8, 0, 80, -160, -228, -307, -319578308, 8899139, -16326515, 1024912415, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, -{ 5037379, 40, -564, 16484, 10, -2, 4, 85, -158, -228, -292, -319484751, 8876591, -16326265, 1024941781, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, -{ 5047335, 44, -584, 16472, -4, -4, 0, 84, -170, -222, -296, -319369202, 8852349, -16338808, 1024977803, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, -{ 5057290, 44, -600, 16500, -4, -8, 6, 77, -159, -229, -301, -319527701, 8840866, -16354052, 1024928260, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, -{ 5067245, 56, -620, 16472, -10, 2, 2, 81, -165, -222, -292, -319403153, 8821965, -16382002, 1024966795, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, -{ 5077201, 52, -644, 16484, -2, -8, -4, 84, -155, -235, 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164, 248, -2016, -3469, 1750, -604384, -938816, -829280 }, +// sRimu_time_us, sRacc_data[0:2], sRgyr_data[0:2], sRtemp_data, sRmag_data[0:2], rv_quat_q30[0:3], acc_bias_q16[0:2], gyr_bias_q16[0:2], mag_bias_q16[0:2] + /* $License: + Copyright (C) 2019 InvenSense Corporation, All Rights Reserved. + Test vector + Input file is composed by + + Output generated with algorithm version: 0.0.0-dev + + Test Vector parameters: ACC_FSR = 32, GYR_FSR= 4000, ACC_ODR_US= 10000, GYR_ODR_US = 10000, mag_sc_q16 = 9830, MAG_ODR_US = 10000 + Test Vector composition: + sRimu_time_us, sRacc_data[0:2] , sRgyr_data[0:2], sRtemp_data, sRmag_data[0:2], rv_quat_q30[0:3], acc_bias_q16[0:2], gyr_bias_q16[0:2], mag_bias_q16[0:2] */ + +{ 5007514, 112, -560, 16492, 0, -2, 6, 86, -165, -226, -292, 1073741824, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, +{ 5017469, 84, -572, 16496, -4, 0, 4, 81, -150, -226, -296, -319808352, 8908946, -16311264, 1024840814, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, +{ 5027424, 64, -560, 16496, -6, -8, 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similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/app_raw/app_raw.c rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/app_raw/app_raw.c index 08985f4..458cfc5 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/app_raw/app_raw.c +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/app_raw/app_raw.c @@ -1,582 +1,582 @@ -/******************************************************************************* - * @file app_raw.c - * @author CandyPops Co. - * @version V1.0.0 - * @date 2022-09-05 - * @brief - ******************************************************************************/ - -/******************************************************************************* - * [모듈 개요] ICM42670P IMU 드라이버 상위 레이어 - * - * ICM42670P IMU 센서의 초기화, 설정, 데이터 읽기를 담당하는 애플리케이션 레이어 모듈 - * InvenSense 드라이버 API를 래핑하여 사용 - * - * 주요 기능: - * 1) setup_imu_device() - IMU 초기화 및 WHOAMI 확인 (0x67 = ICM42670P) - * 2) configure_imu_device() - 센서 파라미터 설정 - * - 가속도계: ±4g FSR, 100Hz(저전력) 또는 800Hz(저잡음) - * - 자이로: ±2000dps FSR, 100Hz 또는 800Hz - * - FIFO 비활성화 (레지스터 직접 읽기 모드) - * 3) get_imu_data() - FIFO 또는 레지스터에서 센서 데이터 읽기 - * 4) imu_callback() - 센서 데이터 수신 콜백 - * - 마운팅 매트릭스 적용 (보드 방향 보정) - * - info4 모드: info_imu[6]에 데이터 저장 - * - BLE 모드: "rsp:" 태그로 6축 데이터 BLE 전송 - * - UART 모드: 텍스트 형식으로 시리얼 출력 - * 5) imu_read_direct() - 드라이버 API를 우회한 직접 I2C 레지스터 읽기 - * - 센서 설정 → 전원 ON → 80ms 대기 → 12바이트 읽기 → 슬립 - * - * 마운팅 매트릭스: - * Q30 고정소수점 형식의 3x3 회전 매트릭스로, 보드에 장착된 센서의물리적 방향을 소프트웨어 좌표계에 맞춰 보정 - ******************************************************************************/ - -#include "sdk_config.h" -#include "app_raw.h" -#include "inv_imu_extfunc.h" -#include "inv_imu_driver.h" -#include "ble_nus.h" -#include "nrf_log.h" -#include "nrf_log_ctrl.h" -#include "nrf_log_default_backends.h" - -#include "app_util_platform.h" -#include "main.h" -#include "debug_print.h" -#include "nrf_delay.h" - - -/* - * 데이터 출력 형식 선택 - * 0 : 원시 데이터 (raw accel, gyro, temp) 출력 - * 1 : 스케일링된 데이터 (g, dps, 섭씨) 출력 - */ -#define SCALED_DATA_G_DPS 0 - - -/* -------------------------------------------------------------------------------------- - * Static and extern variables - * -------------------------------------------------------------------------------------- */ - -/* IMU 드라이버 객체 — 드라이버 API 호출 시 항상 이 구조체 전달 */ -static struct inv_imu_device icm_driver; - -/* BLE 전송용 바이너리 버퍼 */ - uint8_t imu_bin_buffer[BLE_NUS_MAX_DATA_LEN]; - -/* - * ICM42670P 마운팅 매트릭스 (Q30 고정소수점) - * - * 센서가 보드에 장착된 물리적 방향에 따라 좌표 변환 - * Q30 형식: 1.0 = (1 << 30) = 0x40000000 - * - * SM_REVB_DB (개발보드): X→-Y, Y→X 변환 (90도 회전) - * 기본 (SmartMotion): 단위 행렬 (변환 없음) - */ -#if (SM_BOARD_REV == SM_REVB_DB) /* when DB or EVB are used */ -static int32_t icm_mounting_matrix[9] = { 0, -(1<<30), 0, - (1<<30), 0, 0, - 0, 0, (1<<30) }; -#else /* For SmartMotion */ -static int32_t icm_mounting_matrix[9] = {(1<<30), 0, 0, - 0, (1<<30), 0, - 0, 0, (1<<30)}; -#endif - -bool custom_add_data; /* 커스텀 데이터 추가 플래그 (BLE 전송 제어) */ -extern bool motion_raw_data_enabled; /* 외부에서 원시 데이터 읽기를 요청하는 플래그 */ -extern char ble_tx_buffer[BLE_NUS_MAX_DATA_LEN]; /* BLE 텍스트 전송 버퍼 */ -extern which_cmd_t cmd_type_t; /* 현재 명령 소스 (BLE 또는 UART) */ -uint16_t ssp_data[6]={0,}; /* BLE 전송용 6축 데이터 배열 (accel XYZ + gyro XYZ) */ -extern bool info4; /* info4 모드 플래그 (cmd_parse에서 설정) */ - volatile uint16_t info_imu[6]; /* info4 모드에서 IMU 데이터를 저장하는 전역 배열 */ - -/* -------------------------------------------------------------------------------------- - * static function declaration - * -------------------------------------------------------------------------------------- */ -static void apply_mounting_matrix(const int32_t matrix[9], int32_t raw[3]); - -/* -------------------------------------------------------------------------------------- - * Functions definition - * -------------------------------------------------------------------------------------- */ - -/* - * setup_imu_device() - * IMU 디바이스 초기화 및 식별 확인 - * - * 처리 흐름: - * 1) inv_imu_init()으로 드라이버 초기화 (시리얼 인터페이스 + 콜백 등록) - * 2) WHOAMI 레지스터 읽기로 디바이스 확인 - * 3) WHOAMI 값이 ICM_WHOAMI(0x67)와 일치하는지 검증 - * - * 반환값: 0=성공, 음수=에러 - */ -int setup_imu_device(struct inv_imu_serif *icm_serif) -{ - int rc = 0; - uint8_t who_am_i; - - /* IMU 드라이버 초기화 — 시리얼 인터페이스 연결 및 콜백 함수 등록 */ - rc = inv_imu_init(&icm_driver, icm_serif, imu_callback); - if (rc != INV_ERROR_SUCCESS) { - DBG_PRINTF("!!! ERROR : Failed to initialize IMU!\r\n"); - return rc; - } - - /* WHOAMI 레지스터 읽기 — 디바이스 존재 및 통신 확인 */ - rc = inv_imu_get_who_am_i(&icm_driver, &who_am_i); - if (rc != INV_ERROR_SUCCESS) { - DBG_PRINTF("!!! ERROR : Failed to read whoami!\r\n"); - return rc; - } - - /* WHOAMI 값 검증 — ICM42670P의 경우 0x67이어야 함 */ - if (who_am_i != ICM_WHOAMI) { - DBG_PRINTF("!!! ERROR : Bad WHOAMI value! Read 0x%02x, expected 0x%02x\r\n", who_am_i, ICM_WHOAMI); - return INV_ERROR; - } - - return rc; -} - -/* - * configure_imu_device() - * IMU 센서 동작 파라미터 설정 - * - * 설정 항목: - * - FIFO: 비활성화 (USE_FIFO=0일 때, 레지스터 직접 읽기 모드) - * - 가속도계 FSR: ±4g (USE_HIGH_RES_MODE=0일 때) - * - 자이로 FSR: ±2000dps - * - ODR(출력 데이터율): - * - 저잡음 모드(USE_LOW_NOISE_MODE=1): 800Hz - * - 저전력 모드(USE_LOW_NOISE_MODE=0): 100Hz - * - 자이로는 항상 저잡음 모드로 동작 - * - FIFO 미사용 시 자이로 스타트업 시간만큼 대기 - * - * 반환값: 0=성공, 음수=에러 - */ -int configure_imu_device(void) -{ - int rc = 0; - - /* FIFO 비활성화 — 레지스터에서 직접 데이터를 읽기 */ - if (!USE_FIFO) - rc |= inv_imu_configure_fifo(&icm_driver, INV_IMU_FIFO_DISABLED); - - if (USE_HIGH_RES_MODE) { - /* 고해상도 FIFO 모드: 20비트 데이터, FSR은 16g/2000dps로 고정됨 */ - rc |= inv_imu_enable_high_resolution_fifo(&icm_driver); - } else { - /* 표준 모드: 가속도계 ±4g, 자이로 ±2000dps FSR 설정 */ - rc |= inv_imu_set_accel_fsr(&icm_driver, ACCEL_CONFIG0_FS_SEL_4g); - rc |= inv_imu_set_gyro_fsr(&icm_driver, GYRO_CONFIG0_FS_SEL_2000dps); - } - - if (USE_LOW_NOISE_MODE) { - /* 저잡음 모드: 800Hz ODR, 가속도계 저잡음 모드 활성화 */ - rc |= inv_imu_set_accel_frequency(&icm_driver, ACCEL_CONFIG0_ODR_800_HZ); - rc |= inv_imu_set_gyro_frequency(&icm_driver, GYRO_CONFIG0_ODR_800_HZ); - rc |= inv_imu_enable_accel_low_noise_mode(&icm_driver); - } else { - /* 저전력 모드: 100Hz ODR, 가속도계 저전력 모드 활성화 */ - rc |= inv_imu_set_accel_frequency(&icm_driver, ACCEL_CONFIG0_ODR_100_HZ); - rc |= inv_imu_set_gyro_frequency(&icm_driver, GYRO_CONFIG0_ODR_100_HZ); - rc |= inv_imu_enable_accel_low_power_mode(&icm_driver); - } - - /* 자이로는 모드에 관계없이 항상 저잡음 모드로 동작 */ - rc |= inv_imu_enable_gyro_low_noise_mode(&icm_driver); - - /* FIFO 미사용 시 자이로 스타트업 시간만큼 대기 (첫 유효 데이터까지의 지연) */ - if (!USE_FIFO) - inv_imu_sleep_us(GYR_STARTUP_TIME_US); - - return rc; -} - - -/* - * get_imu_data() - * IMU에서 센서 데이터 읽기 - * USE_FIFO 설정에 따라 FIFO 또는 레지스터에서 데이터를 가져옴 - * 읽은 데이터는 imu_callback()을 통해 처리 - */ -int get_imu_data(void) -{ -#if USE_FIFO - return inv_imu_get_data_from_fifo(&icm_driver); -#else - - return inv_imu_get_data_from_registers(&icm_driver); -#endif -} - -#if SCALED_DATA_G_DPS -/* - * get_accel_and_gyr_fsr() - * 현재 설정된 가속도계와 자이로의 FSR(Full Scale Range) 값을 가져온다. - * 스케일링된 데이터(g, dps) 변환에 사용된다. - */ -static void get_accel_and_gyr_fsr(int16_t * accel_fsr_g, int16_t * gyro_fsr_dps) -{ - ACCEL_CONFIG0_FS_SEL_t accel_fsr_bitfield; - GYRO_CONFIG0_FS_SEL_t gyro_fsr_bitfield; - - inv_imu_get_accel_fsr(&icm_driver, &accel_fsr_bitfield); - switch(accel_fsr_bitfield) { - case ACCEL_CONFIG0_FS_SEL_2g: *accel_fsr_g = 2; - break; - case ACCEL_CONFIG0_FS_SEL_4g: *accel_fsr_g = 4; - break; - case ACCEL_CONFIG0_FS_SEL_8g: *accel_fsr_g = 8; - break; - case ACCEL_CONFIG0_FS_SEL_16g: *accel_fsr_g = 16; - break; - default: *accel_fsr_g = -1; - } - - inv_imu_get_gyro_fsr(&icm_driver, &gyro_fsr_bitfield); - switch(gyro_fsr_bitfield) { - case GYRO_CONFIG0_FS_SEL_250dps: *gyro_fsr_dps = 250; - break; - case GYRO_CONFIG0_FS_SEL_500dps: *gyro_fsr_dps = 500; - break; - case GYRO_CONFIG0_FS_SEL_1000dps: *gyro_fsr_dps = 1000; - break; - case GYRO_CONFIG0_FS_SEL_2000dps: *gyro_fsr_dps = 2000; - break; - default: *gyro_fsr_dps = -1; - } -} -#endif - - -/* - * imu_callback() - * IMU 드라이버가 새 센서 데이터를 읽을 때마다 호출되는 콜백 함수 - * - * 처리 흐름: - * 1) 이벤트에서 가속도/자이로 원시 데이터 추출 - * - FIFO 모드: 타임스탬프 롤오버 처리, 고해상도(20비트) 지원 - * - 레지스터 모드: 16비트 데이터 직접 사용 - * 2) 마운팅 매트릭스 적용 (보드 장착 방향 보정) - * 3) 데이터 출력 (모드에 따라 분기): - * - info4 모드: info_imu[6] 전역 배열에 저장 (외부에서 폴링) - * - UART 모드: "Tp" 접두사로 6축 데이터 텍스트 출력 - * - BLE 모드: "rsp:" 태그로 바이너리 패킷 전송 + UART 텍스트 동시 출력 - */ -void imu_callback(inv_imu_sensor_event_t *event) -{ - int32_t accel[3], gyro[3]; - -#if SCALED_DATA_G_DPS - float accel_g[3]; - float gyro_dps[3]; - float temp_degc; - int16_t accel_fsr_g, gyro_fsr_dps; -#endif - -#if USE_FIFO - static uint64_t last_fifo_timestamp = 0; - static uint32_t rollover_num = 0; - - /* FIFO 타임스탬프 롤오버 처리 (16비트 → 64비트 확장) */ - if (last_fifo_timestamp > event->timestamp_fsync) - rollover_num++; - last_fifo_timestamp = event->timestamp_fsync; - - /* 타임스탬프를 마이크로초 단위로 변환 (Q24 해상도 적용) */ - timestamp = event->timestamp_fsync + rollover_num * UINT16_MAX; - timestamp *= inv_imu_get_fifo_timestamp_resolution_us_q24(&icm_driver); - timestamp /= (1UL << 24); - - if (icm_driver.fifo_highres_enabled) { - /* 고해상도 모드: 16비트 데이터를 4비트 좌측 시프트 + 하위 4비트 추가 → 20비트 */ - accel[0] = (((int32_t)event->accel[0] << 4)) | event->accel_high_res[0]; - accel[1] = (((int32_t)event->accel[1] << 4)) | event->accel_high_res[1]; - accel[2] = (((int32_t)event->accel[2] << 4)) | event->accel_high_res[2]; - - gyro[0] = (((int32_t)event->gyro[0] << 4)) | event->gyro_high_res[0]; - gyro[1] = (((int32_t)event->gyro[1] << 4)) | event->gyro_high_res[1]; - gyro[2] = (((int32_t)event->gyro[2] << 4)) | event->gyro_high_res[2]; - - } else { - /* 표준 해상도: 16비트 데이터 그대로 사용 */ - accel[0] = event->accel[0]; - accel[1] = event->accel[1]; - accel[2] = event->accel[2]; - - gyro[0] = event->gyro[0]; - gyro[1] = event->gyro[1]; - gyro[2] = event->gyro[2]; - } -#else - - /* 레지스터 직접 읽기 모드: 16비트 원시 데이터 추출 */ - accel[0] = event->accel[0]; - accel[1] = event->accel[1]; - accel[2] = event->accel[2]; - - gyro[0] = event->gyro[0]; - gyro[1] = event->gyro[1]; - gyro[2] = event->gyro[2]; - - /* 레지스터 모드에서는 센서 마스크를 강제 설정하여 아래 출력 로직이 동작하도록 함 */ - event->sensor_mask |= (1 << INV_SENSOR_TEMPERATURE); - event->sensor_mask |= (1 << INV_SENSOR_ACCEL); - event->sensor_mask |= (1 << INV_SENSOR_GYRO); -#endif - - /* 마운팅 매트릭스 적용 — 센서의 물리적 장착 방향을 소프트웨어 좌표계로 보정 */ - apply_mounting_matrix(icm_mounting_matrix, accel); - apply_mounting_matrix(icm_mounting_matrix, gyro); - -#if SCALED_DATA_G_DPS - /* - * 원시 데이터를 물리 단위(g, dps)로 변환 - * 변환 공식: 물리값 = 원시값 * FSR / INT16_MAX - */ - get_accel_and_gyr_fsr(&accel_fsr_g, &gyro_fsr_dps); - accel_g[0] = (float)(accel[0] * accel_fsr_g) / INT16_MAX; - accel_g[1] = (float)(accel[1] * accel_fsr_g) / INT16_MAX; - accel_g[2] = (float)(accel[2] * accel_fsr_g) / INT16_MAX; - gyro_dps[0] = (float)(gyro[0] * gyro_fsr_dps) / INT16_MAX; - gyro_dps[1] = (float)(gyro[1] * gyro_fsr_dps) / INT16_MAX; - gyro_dps[2] = (float)(gyro[2] * gyro_fsr_dps) / INT16_MAX; - - /* 온도 변환: 고해상도/레지스터 모드는 /128, FIFO 표준 모드는 /2 */ - if (USE_HIGH_RES_MODE || !USE_FIFO) - temp_degc = 25 + ((float)event->temperature / 128); - else - temp_degc = 25 + ((float)event->temperature / 2); - - /* - * 스케일링된 데이터를 UART로 출력 - */ - if (event->sensor_mask & (1 << INV_SENSOR_ACCEL) && event->sensor_mask & (1 << INV_SENSOR_GYRO)) - DBG_PRINTF("%u: %.3f, \t%.3f, \t%.3f, \t%.3f, \t%.3f, \t%.3f, \t%.3f\r\n", - (uint32_t)timestamp, - accel_g[0], accel_g[1], accel_g[2], - temp_degc, - gyro_dps[0], gyro_dps[1], gyro_dps[2]); -#else - - /* - * 원시 데이터 출력 — 명령 소스(info4/UART/BLE)에 따라 분기 - */ - if (event->sensor_mask & (1 << INV_SENSOR_ACCEL) && event->sensor_mask & (1 << INV_SENSOR_GYRO) || motion_raw_data_enabled) - { - motion_raw_data_enabled = false; - - /* info4 모드: 전역 배열 info_imu[6]에 데이터 저장, 외부 모듈에서 이 배열을 폴링하여 데이터 사용 */ - if (info4 == true) - { - info_imu[0] = (uint16_t)accel[0]; - info_imu[1] = (uint16_t)accel[1]; - info_imu[2] = (uint16_t)accel[2]; - info_imu[3] = (uint16_t)gyro[0]; - info_imu[4] = (uint16_t)gyro[1]; - info_imu[5] = (uint16_t)gyro[2]; - } - - /* UART 모드: "Tp" 접두사로 6축 데이터를 텍스트 형식으로 출력 */ - else if(cmd_type_t == CMD_UART) { - //DBG_PRINTF("Tp%d,%d,%d,%d,%d,%d\r\n\r\n", accel[0], accel[1], accel[2], gyro[0], gyro[1], gyro[2]); - } - - /* - * BLE 모드: 6축 데이터를 바이너리 패킷으로 BLE 전송 - * ssp_data[0~2] = 가속도 XYZ, ssp_data[3~5] = 자이로 XYZ - * format_data()로 "rsp:" 태그 + 12바이트 데이터를 패킷화 - * dr_binary_tx_safe()로 8바이트 BLE 전송 - */ - else if(cmd_type_t == CMD_BLE) { - ssp_data[0] = (uint16_t)accel[0]; - ssp_data[1] = (uint16_t)accel[1]; - ssp_data[2] = (uint16_t)accel[2]; - ssp_data[3] = (uint16_t)gyro[0]; - ssp_data[4] = (uint16_t)gyro[1]; - ssp_data[5] = (uint16_t)gyro[2]; - - format_data(imu_bin_buffer, "rsp:", ssp_data,12); - //DBG_PRINTF("Tp%d,%d,%d,%d,%d,%d\r\n\r\n", accel[0], accel[1], accel[2], gyro[0], gyro[1], gyro[2]); - dr_binary_tx_safe(imu_bin_buffer,8); - - if(custom_add_data==true) { - custom_add_data = false; - } - else { - //data_tx_handler(ble_tx_buffer); - } - } - } -#endif -} - -/* -------------------------------------------------------------------------------------- - * Static functions definition - * -------------------------------------------------------------------------------------- */ - -/* - * apply_mounting_matrix() - * Q30 고정소수점 회전 매트릭스를 3축 벡터에 적용한다. - * - * 계산 방식: - * result[i] = matrix[i*3+0]*raw[0] + matrix[i*3+1]*raw[1] + matrix[i*3+2]*raw[2] - * 결과를 30비트 우측 시프트하여 Q30 → 정수 변환 - * - * 이를 통해 센서의 물리적 장착 방향에 관계없이 일관된 좌표계를 사용할 수 있다. - */ -static void apply_mounting_matrix(const int32_t matrix[9], int32_t raw[3]) -{ - unsigned i; - int64_t data_q30[3]; - - for(i = 0; i < 3; i++) { - data_q30[i] = ((int64_t)matrix[3*i+0] * raw[0]); - data_q30[i] += ((int64_t)matrix[3*i+1] * raw[1]); - data_q30[i] += ((int64_t)matrix[3*i+2] * raw[2]); - } - /* Q30 → 정수 변환: 30비트 우측 시프트 */ - raw[0] = (int32_t)(data_q30[0]>>30); - raw[1] = (int32_t)(data_q30[1]>>30); - raw[2] = (int32_t)(data_q30[2]>>30); -} - - -/* - * imu_read_direct() - * 드라이버 API를 우회하여 직접 I2C 레지스터를 읽는 함수. - * DRDY(데이터 준비) 인터럽트를 기다리지 않고 즉시 데이터를 읽는다. - * - * 처리 흐름: - * 1) TWI 초기화 확인 (최초 1회만) - * 2) 자이로 설정: ±2000dps, 100Hz ODR (GYRO_CONFIG0 = 0x09) - * 3) 가속도 설정: ±4g, 100Hz ODR (ACCEL_CONFIG0 = 0x29) - * 4) 전원 ON: 가속도+자이로 저잡음 모드 (PWR_MGMT0 = 0x0F) - * 5) 80ms 대기 (자이로 스타트업: 최소 45ms + 여유) - * 6) ACCEL_DATA_X1(0x0B)부터 12바이트 연속 읽기 (accel 6 + gyro 6) - * 7) 빅엔디안 → int16_t 변환 - * 8) 마운팅 매트릭스 적용 - * 9) "rsp:" 태그로 BLE 전송 - * 10) IMU 슬립 모드로 전환 (전력 절감) - * - * 반환값: 0=성공, -1=TX 실패, -2=RX 실패 - */ -/* Raw I2C read from ICM42670P — bypasses driver API entirely */ -#include "system_interface.h" -#include "nrfx_twi.h" - -extern const nrfx_twi_t m_twi_icm42670; - -#define IMU_I2C_ADDR 0x68 -#define REG_ACCEL_X1 0x0B /* ACCEL_DATA_X1 — 가속도 X축 상위 바이트 레지스터 */ - -/* -------------------------------------------------------------------------------------- - * Direct IMU register read — raw I2C, no DRDY, sends rsp: via BLE - * 직접 I2C로 레지스터 읽는 방식 (인터럽트 X, IMU 드라이버 API X) - * -------------------------------------------------------------------------------------- */ -int imu_read_direct(void) -{ - uint8_t raw[12]; /* 가속도 6바이트 + 자이로 6바이트 */ - int32_t accel[3], gyro[3]; - uint8_t reg; - uint32_t ret; - - static bool twi_ready = false; - - /* TWI(I2C) 초기화 — 최초 1회만 수행 (재초기화로 클린 상태 보장) */ - if (!twi_ready) { - inv_i2c_master_uninitialize(); - inv_i2c_master_initialize(); - twi_ready = true; - } - - /* 자이로 설정: GYRO_CONFIG0(0x20) = 0x09 → ±2000dps FSR, 100Hz ODR */ - { - uint8_t gyro_cfg[2] = { 0x20, 0x09 }; - icm42670_twi_tx(IMU_I2C_ADDR, gyro_cfg, 2, false); - } - - /* 가속도 설정: ACCEL_CONFIG0(0x21) = 0x29 → ±4g FSR, 100Hz ODR */ - { - uint8_t accel_cfg[2] = { 0x21, 0x29 }; - icm42670_twi_tx(IMU_I2C_ADDR, accel_cfg, 2, false); - } - - /* 전원 ON: PWR_MGMT0(0x1F) = 0x0F → 가속도(저잡음) + 자이로(저잡음) 활성화 */ - { - uint8_t pwr_cmd[2] = { 0x1F, 0x0F }; /* reg=0x1F, val=0x0F */ - icm42670_twi_tx(IMU_I2C_ADDR, pwr_cmd, 2, false); - //nrf_delay_ms(80); /* 자이로 스타트업: 최소 45ms + 안전 마진 */ - dr_sd_delay_ms(80); - } - - /* ACCEL_DATA_X1(0x0B)부터 12바이트 연속 읽기 (0x0B~0x16) */ - reg = REG_ACCEL_X1; - ret = icm42670_twi_tx(IMU_I2C_ADDR, ®, 1, true); /* 레지스터 주소 전송 (STOP 없음) */ - - if (ret) - { - DBG_PRINTF("[IMU] tx FAIL %u\r\n", ret); - return -1; - } - - ret = icm42670_twi_rx(IMU_I2C_ADDR, raw, 12); /* 12바이트 데이터 수신 */ - - if (ret) - { - DBG_PRINTF("[IMU] rx FAIL %u\r\n", ret); - return -2; - } - - /* - * 빅엔디안 레지스터 레이아웃을 int16_t로 변환 - * raw[0..5] = 가속도 X,Y,Z (각 2바이트, MSB first) - * raw[6..11] = 자이로 X,Y,Z (각 2바이트, MSB first) - */ - accel[0] = (int16_t)((raw[0] << 8) | raw[1]); - accel[1] = (int16_t)((raw[2] << 8) | raw[3]); - accel[2] = (int16_t)((raw[4] << 8) | raw[5]); - gyro[0] = (int16_t)((raw[6] << 8) | raw[7]); - gyro[1] = (int16_t)((raw[8] << 8) | raw[9]); - gyro[2] = (int16_t)((raw[10] << 8) | raw[11]); - - /* 마운팅 매트릭스 적용 — 보드 장착 방향 보정 */ - apply_mounting_matrix(icm_mounting_matrix, accel); - apply_mounting_matrix(icm_mounting_matrix, gyro); - - /* 데이터 패킹 */ - ssp_data[0] = (uint16_t)accel[0]; - ssp_data[1] = (uint16_t)accel[1]; - ssp_data[2] = (uint16_t)accel[2]; - ssp_data[3] = (uint16_t)gyro[0]; - ssp_data[4] = (uint16_t)gyro[1]; - ssp_data[5] = (uint16_t)gyro[2]; - - if (info4 == true) - { - /* info4 모드: 전역 배열에 저장 (mbb?에서 rbb: 패킷으로 일괄 전송) */ - info_imu[0] = ssp_data[0]; - info_imu[1] = ssp_data[1]; - info_imu[2] = ssp_data[2]; - info_imu[3] = ssp_data[3]; - info_imu[4] = ssp_data[4]; - info_imu[5] = ssp_data[5]; - } - else - { - /* 일반 모드: "rsp:" 태그로 BLE 즉시 전송 */ - format_data(imu_bin_buffer, "rsp:", ssp_data, 12); - dr_binary_tx_safe(imu_bin_buffer, 8); - DBG_PRINTF("0"); - } - - /* IMU 슬립 모드: PWR_MGMT0 = 0x00 → 가속도/자이로 모두 OFF (전력 절감) */ - { - uint8_t pwr_off[2] = { 0x1F, 0x00 }; /* reg=PWR_MGMT0, val=0x00 */ - icm42670_twi_tx(IMU_I2C_ADDR, pwr_off, 2, false); - } - - return 0; -} +/******************************************************************************* + * @file app_raw.c + * @author CandyPops Co. + * @version V1.0.0 + * @date 2022-09-05 + * @brief + ******************************************************************************/ + +/******************************************************************************* + * [모듈 개요] ICM42670P IMU 드라이버 상위 레이어 + * + * ICM42670P IMU 센서의 초기화, 설정, 데이터 읽기를 담당하는 애플리케이션 레이어 모듈 + * InvenSense 드라이버 API를 래핑하여 사용 + * + * 주요 기능: + * 1) setup_imu_device() - IMU 초기화 및 WHOAMI 확인 (0x67 = ICM42670P) + * 2) configure_imu_device() - 센서 파라미터 설정 + * - 가속도계: ±4g FSR, 100Hz(저전력) 또는 800Hz(저잡음) + * - 자이로: ±2000dps FSR, 100Hz 또는 800Hz + * - FIFO 비활성화 (레지스터 직접 읽기 모드) + * 3) get_imu_data() - FIFO 또는 레지스터에서 센서 데이터 읽기 + * 4) imu_callback() - 센서 데이터 수신 콜백 + * - 마운팅 매트릭스 적용 (보드 방향 보정) + * - info4 모드: info_imu[6]에 데이터 저장 + * - BLE 모드: "rsp:" 태그로 6축 데이터 BLE 전송 + * - UART 모드: 텍스트 형식으로 시리얼 출력 + * 5) imu_read_direct() - 드라이버 API를 우회한 직접 I2C 레지스터 읽기 + * - 센서 설정 → 전원 ON → 80ms 대기 → 12바이트 읽기 → 슬립 + * + * 마운팅 매트릭스: + * Q30 고정소수점 형식의 3x3 회전 매트릭스로, 보드에 장착된 센서의물리적 방향을 소프트웨어 좌표계에 맞춰 보정 + ******************************************************************************/ + +#include "sdk_config.h" +#include "app_raw.h" +#include "inv_imu_extfunc.h" +#include "inv_imu_driver.h" +#include "ble_nus.h" +#include "nrf_log.h" +#include "nrf_log_ctrl.h" +#include "nrf_log_default_backends.h" + +#include "app_util_platform.h" +#include "main.h" +#include "debug_print.h" +#include "nrf_delay.h" + + +/* + * 데이터 출력 형식 선택 + * 0 : 원시 데이터 (raw accel, gyro, temp) 출력 + * 1 : 스케일링된 데이터 (g, dps, 섭씨) 출력 + */ +#define SCALED_DATA_G_DPS 0 + + +/* -------------------------------------------------------------------------------------- + * Static and extern variables + * -------------------------------------------------------------------------------------- */ + +/* IMU 드라이버 객체 — 드라이버 API 호출 시 항상 이 구조체 전달 */ +static struct inv_imu_device icm_driver; + +/* BLE 전송용 바이너리 버퍼 */ + uint8_t imu_bin_buffer[BLE_NUS_MAX_DATA_LEN]; + +/* + * ICM42670P 마운팅 매트릭스 (Q30 고정소수점) + * + * 센서가 보드에 장착된 물리적 방향에 따라 좌표 변환 + * Q30 형식: 1.0 = (1 << 30) = 0x40000000 + * + * SM_REVB_DB (개발보드): X→-Y, Y→X 변환 (90도 회전) + * 기본 (SmartMotion): 단위 행렬 (변환 없음) + */ +#if (SM_BOARD_REV == SM_REVB_DB) /* when DB or EVB are used */ +static int32_t icm_mounting_matrix[9] = { 0, -(1<<30), 0, + (1<<30), 0, 0, + 0, 0, (1<<30) }; +#else /* For SmartMotion */ +static int32_t icm_mounting_matrix[9] = {(1<<30), 0, 0, + 0, (1<<30), 0, + 0, 0, (1<<30)}; +#endif + +bool custom_add_data; /* 커스텀 데이터 추가 플래그 (BLE 전송 제어) */ +extern bool motion_raw_data_enabled; /* 외부에서 원시 데이터 읽기를 요청하는 플래그 */ +extern char ble_tx_buffer[BLE_NUS_MAX_DATA_LEN]; /* BLE 텍스트 전송 버퍼 */ +extern which_cmd_t cmd_type_t; /* 현재 명령 소스 (BLE 또는 UART) */ +uint16_t ssp_data[6]={0,}; /* BLE 전송용 6축 데이터 배열 (accel XYZ + gyro XYZ) */ +extern bool info4; /* info4 모드 플래그 (cmd_parse에서 설정) */ + volatile uint16_t info_imu[6]; /* info4 모드에서 IMU 데이터를 저장하는 전역 배열 */ + +/* -------------------------------------------------------------------------------------- + * static function declaration + * -------------------------------------------------------------------------------------- */ +static void apply_mounting_matrix(const int32_t matrix[9], int32_t raw[3]); + +/* -------------------------------------------------------------------------------------- + * Functions definition + * -------------------------------------------------------------------------------------- */ + +/* + * setup_imu_device() + * IMU 디바이스 초기화 및 식별 확인 + * + * 처리 흐름: + * 1) inv_imu_init()으로 드라이버 초기화 (시리얼 인터페이스 + 콜백 등록) + * 2) WHOAMI 레지스터 읽기로 디바이스 확인 + * 3) WHOAMI 값이 ICM_WHOAMI(0x67)와 일치하는지 검증 + * + * 반환값: 0=성공, 음수=에러 + */ +int setup_imu_device(struct inv_imu_serif *icm_serif) +{ + int rc = 0; + uint8_t who_am_i; + + /* IMU 드라이버 초기화 — 시리얼 인터페이스 연결 및 콜백 함수 등록 */ + rc = inv_imu_init(&icm_driver, icm_serif, imu_callback); + if (rc != INV_ERROR_SUCCESS) { + DBG_PRINTF("!!! ERROR : Failed to initialize IMU!\r\n"); + return rc; + } + + /* WHOAMI 레지스터 읽기 — 디바이스 존재 및 통신 확인 */ + rc = inv_imu_get_who_am_i(&icm_driver, &who_am_i); + if (rc != INV_ERROR_SUCCESS) { + DBG_PRINTF("!!! ERROR : Failed to read whoami!\r\n"); + return rc; + } + + /* WHOAMI 값 검증 — ICM42670P의 경우 0x67이어야 함 */ + if (who_am_i != ICM_WHOAMI) { + DBG_PRINTF("!!! ERROR : Bad WHOAMI value! Read 0x%02x, expected 0x%02x\r\n", who_am_i, ICM_WHOAMI); + return INV_ERROR; + } + + return rc; +} + +/* + * configure_imu_device() + * IMU 센서 동작 파라미터 설정 + * + * 설정 항목: + * - FIFO: 비활성화 (USE_FIFO=0일 때, 레지스터 직접 읽기 모드) + * - 가속도계 FSR: ±4g (USE_HIGH_RES_MODE=0일 때) + * - 자이로 FSR: ±2000dps + * - ODR(출력 데이터율): + * - 저잡음 모드(USE_LOW_NOISE_MODE=1): 800Hz + * - 저전력 모드(USE_LOW_NOISE_MODE=0): 100Hz + * - 자이로는 항상 저잡음 모드로 동작 + * - FIFO 미사용 시 자이로 스타트업 시간만큼 대기 + * + * 반환값: 0=성공, 음수=에러 + */ +int configure_imu_device(void) +{ + int rc = 0; + + /* FIFO 비활성화 — 레지스터에서 직접 데이터를 읽기 */ + if (!USE_FIFO) + rc |= inv_imu_configure_fifo(&icm_driver, INV_IMU_FIFO_DISABLED); + + if (USE_HIGH_RES_MODE) { + /* 고해상도 FIFO 모드: 20비트 데이터, FSR은 16g/2000dps로 고정됨 */ + rc |= inv_imu_enable_high_resolution_fifo(&icm_driver); + } else { + /* 표준 모드: 가속도계 ±4g, 자이로 ±2000dps FSR 설정 */ + rc |= inv_imu_set_accel_fsr(&icm_driver, ACCEL_CONFIG0_FS_SEL_4g); + rc |= inv_imu_set_gyro_fsr(&icm_driver, GYRO_CONFIG0_FS_SEL_2000dps); + } + + if (USE_LOW_NOISE_MODE) { + /* 저잡음 모드: 800Hz ODR, 가속도계 저잡음 모드 활성화 */ + rc |= inv_imu_set_accel_frequency(&icm_driver, ACCEL_CONFIG0_ODR_800_HZ); + rc |= inv_imu_set_gyro_frequency(&icm_driver, GYRO_CONFIG0_ODR_800_HZ); + rc |= inv_imu_enable_accel_low_noise_mode(&icm_driver); + } else { + /* 저전력 모드: 100Hz ODR, 가속도계 저전력 모드 활성화 */ + rc |= inv_imu_set_accel_frequency(&icm_driver, ACCEL_CONFIG0_ODR_100_HZ); + rc |= inv_imu_set_gyro_frequency(&icm_driver, GYRO_CONFIG0_ODR_100_HZ); + rc |= inv_imu_enable_accel_low_power_mode(&icm_driver); + } + + /* 자이로는 모드에 관계없이 항상 저잡음 모드로 동작 */ + rc |= inv_imu_enable_gyro_low_noise_mode(&icm_driver); + + /* FIFO 미사용 시 자이로 스타트업 시간만큼 대기 (첫 유효 데이터까지의 지연) */ + if (!USE_FIFO) + inv_imu_sleep_us(GYR_STARTUP_TIME_US); + + return rc; +} + + +/* + * get_imu_data() + * IMU에서 센서 데이터 읽기 + * USE_FIFO 설정에 따라 FIFO 또는 레지스터에서 데이터를 가져옴 + * 읽은 데이터는 imu_callback()을 통해 처리 + */ +int get_imu_data(void) +{ +#if USE_FIFO + return inv_imu_get_data_from_fifo(&icm_driver); +#else + + return inv_imu_get_data_from_registers(&icm_driver); +#endif +} + +#if SCALED_DATA_G_DPS +/* + * get_accel_and_gyr_fsr() + * 현재 설정된 가속도계와 자이로의 FSR(Full Scale Range) 값을 가져온다. + * 스케일링된 데이터(g, dps) 변환에 사용된다. + */ +static void get_accel_and_gyr_fsr(int16_t * accel_fsr_g, int16_t * gyro_fsr_dps) +{ + ACCEL_CONFIG0_FS_SEL_t accel_fsr_bitfield; + GYRO_CONFIG0_FS_SEL_t gyro_fsr_bitfield; + + inv_imu_get_accel_fsr(&icm_driver, &accel_fsr_bitfield); + switch(accel_fsr_bitfield) { + case ACCEL_CONFIG0_FS_SEL_2g: *accel_fsr_g = 2; + break; + case ACCEL_CONFIG0_FS_SEL_4g: *accel_fsr_g = 4; + break; + case ACCEL_CONFIG0_FS_SEL_8g: *accel_fsr_g = 8; + break; + case ACCEL_CONFIG0_FS_SEL_16g: *accel_fsr_g = 16; + break; + default: *accel_fsr_g = -1; + } + + inv_imu_get_gyro_fsr(&icm_driver, &gyro_fsr_bitfield); + switch(gyro_fsr_bitfield) { + case GYRO_CONFIG0_FS_SEL_250dps: *gyro_fsr_dps = 250; + break; + case GYRO_CONFIG0_FS_SEL_500dps: *gyro_fsr_dps = 500; + break; + case GYRO_CONFIG0_FS_SEL_1000dps: *gyro_fsr_dps = 1000; + break; + case GYRO_CONFIG0_FS_SEL_2000dps: *gyro_fsr_dps = 2000; + break; + default: *gyro_fsr_dps = -1; + } +} +#endif + + +/* + * imu_callback() + * IMU 드라이버가 새 센서 데이터를 읽을 때마다 호출되는 콜백 함수 + * + * 처리 흐름: + * 1) 이벤트에서 가속도/자이로 원시 데이터 추출 + * - FIFO 모드: 타임스탬프 롤오버 처리, 고해상도(20비트) 지원 + * - 레지스터 모드: 16비트 데이터 직접 사용 + * 2) 마운팅 매트릭스 적용 (보드 장착 방향 보정) + * 3) 데이터 출력 (모드에 따라 분기): + * - info4 모드: info_imu[6] 전역 배열에 저장 (외부에서 폴링) + * - UART 모드: "Tp" 접두사로 6축 데이터 텍스트 출력 + * - BLE 모드: "rsp:" 태그로 바이너리 패킷 전송 + UART 텍스트 동시 출력 + */ +void imu_callback(inv_imu_sensor_event_t *event) +{ + int32_t accel[3], gyro[3]; + +#if SCALED_DATA_G_DPS + float accel_g[3]; + float gyro_dps[3]; + float temp_degc; + int16_t accel_fsr_g, gyro_fsr_dps; +#endif + +#if USE_FIFO + static uint64_t last_fifo_timestamp = 0; + static uint32_t rollover_num = 0; + + /* FIFO 타임스탬프 롤오버 처리 (16비트 → 64비트 확장) */ + if (last_fifo_timestamp > event->timestamp_fsync) + rollover_num++; + last_fifo_timestamp = event->timestamp_fsync; + + /* 타임스탬프를 마이크로초 단위로 변환 (Q24 해상도 적용) */ + timestamp = event->timestamp_fsync + rollover_num * UINT16_MAX; + timestamp *= inv_imu_get_fifo_timestamp_resolution_us_q24(&icm_driver); + timestamp /= (1UL << 24); + + if (icm_driver.fifo_highres_enabled) { + /* 고해상도 모드: 16비트 데이터를 4비트 좌측 시프트 + 하위 4비트 추가 → 20비트 */ + accel[0] = (((int32_t)event->accel[0] << 4)) | event->accel_high_res[0]; + accel[1] = (((int32_t)event->accel[1] << 4)) | event->accel_high_res[1]; + accel[2] = (((int32_t)event->accel[2] << 4)) | event->accel_high_res[2]; + + gyro[0] = (((int32_t)event->gyro[0] << 4)) | event->gyro_high_res[0]; + gyro[1] = (((int32_t)event->gyro[1] << 4)) | event->gyro_high_res[1]; + gyro[2] = (((int32_t)event->gyro[2] << 4)) | event->gyro_high_res[2]; + + } else { + /* 표준 해상도: 16비트 데이터 그대로 사용 */ + accel[0] = event->accel[0]; + accel[1] = event->accel[1]; + accel[2] = event->accel[2]; + + gyro[0] = event->gyro[0]; + gyro[1] = event->gyro[1]; + gyro[2] = event->gyro[2]; + } +#else + + /* 레지스터 직접 읽기 모드: 16비트 원시 데이터 추출 */ + accel[0] = event->accel[0]; + accel[1] = event->accel[1]; + accel[2] = event->accel[2]; + + gyro[0] = event->gyro[0]; + gyro[1] = event->gyro[1]; + gyro[2] = event->gyro[2]; + + /* 레지스터 모드에서는 센서 마스크를 강제 설정하여 아래 출력 로직이 동작하도록 함 */ + event->sensor_mask |= (1 << INV_SENSOR_TEMPERATURE); + event->sensor_mask |= (1 << INV_SENSOR_ACCEL); + event->sensor_mask |= (1 << INV_SENSOR_GYRO); +#endif + + /* 마운팅 매트릭스 적용 — 센서의 물리적 장착 방향을 소프트웨어 좌표계로 보정 */ + apply_mounting_matrix(icm_mounting_matrix, accel); + apply_mounting_matrix(icm_mounting_matrix, gyro); + +#if SCALED_DATA_G_DPS + /* + * 원시 데이터를 물리 단위(g, dps)로 변환 + * 변환 공식: 물리값 = 원시값 * FSR / INT16_MAX + */ + get_accel_and_gyr_fsr(&accel_fsr_g, &gyro_fsr_dps); + accel_g[0] = (float)(accel[0] * accel_fsr_g) / INT16_MAX; + accel_g[1] = (float)(accel[1] * accel_fsr_g) / INT16_MAX; + accel_g[2] = (float)(accel[2] * accel_fsr_g) / INT16_MAX; + gyro_dps[0] = (float)(gyro[0] * gyro_fsr_dps) / INT16_MAX; + gyro_dps[1] = (float)(gyro[1] * gyro_fsr_dps) / INT16_MAX; + gyro_dps[2] = (float)(gyro[2] * gyro_fsr_dps) / INT16_MAX; + + /* 온도 변환: 고해상도/레지스터 모드는 /128, FIFO 표준 모드는 /2 */ + if (USE_HIGH_RES_MODE || !USE_FIFO) + temp_degc = 25 + ((float)event->temperature / 128); + else + temp_degc = 25 + ((float)event->temperature / 2); + + /* + * 스케일링된 데이터를 UART로 출력 + */ + if (event->sensor_mask & (1 << INV_SENSOR_ACCEL) && event->sensor_mask & (1 << INV_SENSOR_GYRO)) + DBG_PRINTF("%u: %.3f, \t%.3f, \t%.3f, \t%.3f, \t%.3f, \t%.3f, \t%.3f\r\n", + (uint32_t)timestamp, + accel_g[0], accel_g[1], accel_g[2], + temp_degc, + gyro_dps[0], gyro_dps[1], gyro_dps[2]); +#else + + /* + * 원시 데이터 출력 — 명령 소스(info4/UART/BLE)에 따라 분기 + */ + if (event->sensor_mask & (1 << INV_SENSOR_ACCEL) && event->sensor_mask & (1 << INV_SENSOR_GYRO) || motion_raw_data_enabled) + { + motion_raw_data_enabled = false; + + /* info4 모드: 전역 배열 info_imu[6]에 데이터 저장, 외부 모듈에서 이 배열을 폴링하여 데이터 사용 */ + if (info4 == true) + { + info_imu[0] = (uint16_t)accel[0]; + info_imu[1] = (uint16_t)accel[1]; + info_imu[2] = (uint16_t)accel[2]; + info_imu[3] = (uint16_t)gyro[0]; + info_imu[4] = (uint16_t)gyro[1]; + info_imu[5] = (uint16_t)gyro[2]; + } + + /* UART 모드: "Tp" 접두사로 6축 데이터를 텍스트 형식으로 출력 */ + else if(cmd_type_t == CMD_UART) { + //DBG_PRINTF("Tp%d,%d,%d,%d,%d,%d\r\n\r\n", accel[0], accel[1], accel[2], gyro[0], gyro[1], gyro[2]); + } + + /* + * BLE 모드: 6축 데이터를 바이너리 패킷으로 BLE 전송 + * ssp_data[0~2] = 가속도 XYZ, ssp_data[3~5] = 자이로 XYZ + * format_data()로 "rsp:" 태그 + 12바이트 데이터를 패킷화 + * dr_binary_tx_safe()로 8바이트 BLE 전송 + */ + else if(cmd_type_t == CMD_BLE) { + ssp_data[0] = (uint16_t)accel[0]; + ssp_data[1] = (uint16_t)accel[1]; + ssp_data[2] = (uint16_t)accel[2]; + ssp_data[3] = (uint16_t)gyro[0]; + ssp_data[4] = (uint16_t)gyro[1]; + ssp_data[5] = (uint16_t)gyro[2]; + + format_data(imu_bin_buffer, "rsp:", ssp_data,12); + //DBG_PRINTF("Tp%d,%d,%d,%d,%d,%d\r\n\r\n", accel[0], accel[1], accel[2], gyro[0], gyro[1], gyro[2]); + dr_binary_tx_safe(imu_bin_buffer,8); + + if(custom_add_data==true) { + custom_add_data = false; + } + else { + //data_tx_handler(ble_tx_buffer); + } + } + } +#endif +} + +/* -------------------------------------------------------------------------------------- + * Static functions definition + * -------------------------------------------------------------------------------------- */ + +/* + * apply_mounting_matrix() + * Q30 고정소수점 회전 매트릭스를 3축 벡터에 적용한다. + * + * 계산 방식: + * result[i] = matrix[i*3+0]*raw[0] + matrix[i*3+1]*raw[1] + matrix[i*3+2]*raw[2] + * 결과를 30비트 우측 시프트하여 Q30 → 정수 변환 + * + * 이를 통해 센서의 물리적 장착 방향에 관계없이 일관된 좌표계를 사용할 수 있다. + */ +static void apply_mounting_matrix(const int32_t matrix[9], int32_t raw[3]) +{ + unsigned i; + int64_t data_q30[3]; + + for(i = 0; i < 3; i++) { + data_q30[i] = ((int64_t)matrix[3*i+0] * raw[0]); + data_q30[i] += ((int64_t)matrix[3*i+1] * raw[1]); + data_q30[i] += ((int64_t)matrix[3*i+2] * raw[2]); + } + /* Q30 → 정수 변환: 30비트 우측 시프트 */ + raw[0] = (int32_t)(data_q30[0]>>30); + raw[1] = (int32_t)(data_q30[1]>>30); + raw[2] = (int32_t)(data_q30[2]>>30); +} + + +/* + * imu_read_direct() + * 드라이버 API를 우회하여 직접 I2C 레지스터를 읽는 함수. + * DRDY(데이터 준비) 인터럽트를 기다리지 않고 즉시 데이터를 읽는다. + * + * 처리 흐름: + * 1) TWI 초기화 확인 (최초 1회만) + * 2) 자이로 설정: ±2000dps, 100Hz ODR (GYRO_CONFIG0 = 0x09) + * 3) 가속도 설정: ±4g, 100Hz ODR (ACCEL_CONFIG0 = 0x29) + * 4) 전원 ON: 가속도+자이로 저잡음 모드 (PWR_MGMT0 = 0x0F) + * 5) 80ms 대기 (자이로 스타트업: 최소 45ms + 여유) + * 6) ACCEL_DATA_X1(0x0B)부터 12바이트 연속 읽기 (accel 6 + gyro 6) + * 7) 빅엔디안 → int16_t 변환 + * 8) 마운팅 매트릭스 적용 + * 9) "rsp:" 태그로 BLE 전송 + * 10) IMU 슬립 모드로 전환 (전력 절감) + * + * 반환값: 0=성공, -1=TX 실패, -2=RX 실패 + */ +/* Raw I2C read from ICM42670P — bypasses driver API entirely */ +#include "system_interface.h" +#include "nrfx_twi.h" + +extern const nrfx_twi_t m_twi_icm42670; + +#define IMU_I2C_ADDR 0x68 +#define REG_ACCEL_X1 0x0B /* ACCEL_DATA_X1 — 가속도 X축 상위 바이트 레지스터 */ + +/* -------------------------------------------------------------------------------------- + * Direct IMU register read — raw I2C, no DRDY, sends rsp: via BLE + * 직접 I2C로 레지스터 읽는 방식 (인터럽트 X, IMU 드라이버 API X) + * -------------------------------------------------------------------------------------- */ +int imu_read_direct(void) +{ + uint8_t raw[12]; /* 가속도 6바이트 + 자이로 6바이트 */ + int32_t accel[3], gyro[3]; + uint8_t reg; + uint32_t ret; + + static bool twi_ready = false; + + /* TWI(I2C) 초기화 — 최초 1회만 수행 (재초기화로 클린 상태 보장) */ + if (!twi_ready) { + inv_i2c_master_uninitialize(); + inv_i2c_master_initialize(); + twi_ready = true; + } + + /* 자이로 설정: GYRO_CONFIG0(0x20) = 0x09 → ±2000dps FSR, 100Hz ODR */ + { + uint8_t gyro_cfg[2] = { 0x20, 0x09 }; + icm42670_twi_tx(IMU_I2C_ADDR, gyro_cfg, 2, false); + } + + /* 가속도 설정: ACCEL_CONFIG0(0x21) = 0x29 → ±4g FSR, 100Hz ODR */ + { + uint8_t accel_cfg[2] = { 0x21, 0x29 }; + icm42670_twi_tx(IMU_I2C_ADDR, accel_cfg, 2, false); + } + + /* 전원 ON: PWR_MGMT0(0x1F) = 0x0F → 가속도(저잡음) + 자이로(저잡음) 활성화 */ + { + uint8_t pwr_cmd[2] = { 0x1F, 0x0F }; /* reg=0x1F, val=0x0F */ + icm42670_twi_tx(IMU_I2C_ADDR, pwr_cmd, 2, false); + //nrf_delay_ms(80); /* 자이로 스타트업: 최소 45ms + 안전 마진 */ + dr_sd_delay_ms(80); + } + + /* ACCEL_DATA_X1(0x0B)부터 12바이트 연속 읽기 (0x0B~0x16) */ + reg = REG_ACCEL_X1; + ret = icm42670_twi_tx(IMU_I2C_ADDR, ®, 1, true); /* 레지스터 주소 전송 (STOP 없음) */ + + if (ret) + { + DBG_PRINTF("[IMU] tx FAIL %u\r\n", ret); + return -1; + } + + ret = icm42670_twi_rx(IMU_I2C_ADDR, raw, 12); /* 12바이트 데이터 수신 */ + + if (ret) + { + DBG_PRINTF("[IMU] rx FAIL %u\r\n", ret); + return -2; + } + + /* + * 빅엔디안 레지스터 레이아웃을 int16_t로 변환 + * raw[0..5] = 가속도 X,Y,Z (각 2바이트, MSB first) + * raw[6..11] = 자이로 X,Y,Z (각 2바이트, MSB first) + */ + accel[0] = (int16_t)((raw[0] << 8) | raw[1]); + accel[1] = (int16_t)((raw[2] << 8) | raw[3]); + accel[2] = (int16_t)((raw[4] << 8) | raw[5]); + gyro[0] = (int16_t)((raw[6] << 8) | raw[7]); + gyro[1] = (int16_t)((raw[8] << 8) | raw[9]); + gyro[2] = (int16_t)((raw[10] << 8) | raw[11]); + + /* 마운팅 매트릭스 적용 — 보드 장착 방향 보정 */ + apply_mounting_matrix(icm_mounting_matrix, accel); + apply_mounting_matrix(icm_mounting_matrix, gyro); + + /* 데이터 패킹 */ + ssp_data[0] = (uint16_t)accel[0]; + ssp_data[1] = (uint16_t)accel[1]; + ssp_data[2] = (uint16_t)accel[2]; + ssp_data[3] = (uint16_t)gyro[0]; + ssp_data[4] = (uint16_t)gyro[1]; + ssp_data[5] = (uint16_t)gyro[2]; + + if (info4 == true) + { + /* info4 모드: 전역 배열에 저장 (mbb?에서 rbb: 패킷으로 일괄 전송) */ + info_imu[0] = ssp_data[0]; + info_imu[1] = ssp_data[1]; + info_imu[2] = ssp_data[2]; + info_imu[3] = ssp_data[3]; + info_imu[4] = ssp_data[4]; + info_imu[5] = ssp_data[5]; + } + else + { + /* 일반 모드: "rsp:" 태그로 BLE 즉시 전송 */ + format_data(imu_bin_buffer, "rsp:", ssp_data, 12); + dr_binary_tx_safe(imu_bin_buffer, 8); + DBG_PRINTF("0"); + } + + /* IMU 슬립 모드: PWR_MGMT0 = 0x00 → 가속도/자이로 모두 OFF (전력 절감) */ + { + uint8_t pwr_off[2] = { 0x1F, 0x00 }; /* reg=PWR_MGMT0, val=0x00 */ + icm42670_twi_tx(IMU_I2C_ADDR, pwr_off, 2, false); + } + + return 0; +} diff --git a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/app_raw/app_raw.h b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/app_raw/app_raw.h similarity index 96% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/app_raw/app_raw.h rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/app_raw/app_raw.h index 3e4dc9e..c422909 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/app_raw/app_raw.h +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/app_raw/app_raw.h @@ -1,101 +1,101 @@ -/******************************************************************************* - * @file app_raw.h - * @author CandyPops Co. - * @version V1.0.0 - * @date 2022-09-05 - * @brief - ******************************************************************************/ - -/******************************************************************************* - * [헤더 개요] ICM42670P IMU 드라이버 상위 레이어 선언 - * - * IMU 센서의 초기화, 설정, 데이터 읽기를 위한 함수 프로토타입과 - * 동작 모드 설정 매크로를 정의한다. - * - * 주요 설정 매크로: - * SERIF_TYPE - 통신 인터페이스 (UI_I2C) - * USE_LOW_NOISE_MODE - 1:저잡음(800Hz), 0:저전력(100Hz) - * USE_HIGH_RES_MODE - 1:20비트 고해상도, 0:16비트 표준 - * USE_FIFO - 1:FIFO 사용, 0:레지스터 직접 읽기 - ******************************************************************************/ - -#ifndef _APP_RAW_H_ -#define _APP_RAW_H_ -#include "sdk_config.h" - -#include -#include "inv_imu_transport.h" -#include "inv_imu_defs.h" -#include "inv_imu_driver.h" - - -/*** 설정 매크로 ***/ - -/* - * MCU와 IMU 간 통신 인터페이스 선택 - * UI_I2C: I2C 통신 사용 (기본) - */ -#define SERIF_TYPE UI_I2C - -/* - * 전원 모드 설정 - * 1: 저잡음 모드 — 800Hz ODR, 높은 정밀도, 높은 전력 소모 - * 0: 저전력 모드 — 100Hz ODR, 낮은 전력 소모 - * 주의: 12.5Hz 미만 ODR에서는 저잡음 모드 사용 불가 - */ -#define USE_LOW_NOISE_MODE 1 - -/* - * FIFO 해상도 모드 선택 - * 0: 저해상도 — 16비트 데이터 (기본) - * 1: 고해상도 — 20비트 데이터 (FSR이 16g/2000dps로 강제 고정됨) - */ -#define USE_HIGH_RES_MODE 0 - -/* - * 데이터 읽기 방식 선택 - * 0: 레지스터 직접 읽기 (현재 사용 중) - * 1: FIFO에서 읽기 - */ -#define USE_FIFO 0 - - -/** - * \brief IMU 디바이스를 리셋하고 초기화한다. WHOAMI 확인 포함. - * 다른 IMU 접근 함수 호출 전에 반드시 성공적으로 실행되어야 한다. - * - * \return 0=성공, 음수=에러 - */ -int setup_imu_device(struct inv_imu_serif *icm_serif); - -/** - * \brief 자이로 및 가속도계 출력을 위한 디바이스 설정을 수행한다. - * FSR, ODR, 전원 모드, FIFO 설정 등을 적용한다. - * \return 0=성공, 음수=에러 - */ -int configure_imu_device(void); - -/** - * \brief FIFO 또는 레지스터에서 IMU 데이터를 추출한다. - * 내부적으로 imu_callback()이 호출되어 데이터를 처리한다. - * \return 0=성공, 음수=에러 - */ -int get_imu_data(void); - -/** - * \brief 센서 데이터 수신 콜백. 마운팅 매트릭스 적용 후 - * info4/BLE/UART 모드에 따라 데이터를 출력한다. - * \param[in] event 하나의 센서 데이터 패킷을 담은 구조체 - */ -void imu_callback(inv_imu_sensor_event_t *event); - -/** - * \brief 드라이버 API를 우회한 직접 I2C 레지스터 읽기. - * DRDY 인터럽트 없이 즉시 센서 데이터를 읽어 BLE로 전송한다. - * 읽기 후 IMU를 슬립 모드로 전환하여 전력을 절감한다. - * \return 0=성공, 음수=에러 - */ -int imu_read_direct(void); - - -#endif /* !_APP_RAW_H_ */ +/******************************************************************************* + * @file app_raw.h + * @author CandyPops Co. + * @version V1.0.0 + * @date 2022-09-05 + * @brief + ******************************************************************************/ + +/******************************************************************************* + * [헤더 개요] ICM42670P IMU 드라이버 상위 레이어 선언 + * + * IMU 센서의 초기화, 설정, 데이터 읽기를 위한 함수 프로토타입과 + * 동작 모드 설정 매크로를 정의한다. + * + * 주요 설정 매크로: + * SERIF_TYPE - 통신 인터페이스 (UI_I2C) + * USE_LOW_NOISE_MODE - 1:저잡음(800Hz), 0:저전력(100Hz) + * USE_HIGH_RES_MODE - 1:20비트 고해상도, 0:16비트 표준 + * USE_FIFO - 1:FIFO 사용, 0:레지스터 직접 읽기 + ******************************************************************************/ + +#ifndef _APP_RAW_H_ +#define _APP_RAW_H_ +#include "sdk_config.h" + +#include +#include "inv_imu_transport.h" +#include "inv_imu_defs.h" +#include "inv_imu_driver.h" + + +/*** 설정 매크로 ***/ + +/* + * MCU와 IMU 간 통신 인터페이스 선택 + * UI_I2C: I2C 통신 사용 (기본) + */ +#define SERIF_TYPE UI_I2C + +/* + * 전원 모드 설정 + * 1: 저잡음 모드 — 800Hz ODR, 높은 정밀도, 높은 전력 소모 + * 0: 저전력 모드 — 100Hz ODR, 낮은 전력 소모 + * 주의: 12.5Hz 미만 ODR에서는 저잡음 모드 사용 불가 + */ +#define USE_LOW_NOISE_MODE 1 + +/* + * FIFO 해상도 모드 선택 + * 0: 저해상도 — 16비트 데이터 (기본) + * 1: 고해상도 — 20비트 데이터 (FSR이 16g/2000dps로 강제 고정됨) + */ +#define USE_HIGH_RES_MODE 0 + +/* + * 데이터 읽기 방식 선택 + * 0: 레지스터 직접 읽기 (현재 사용 중) + * 1: FIFO에서 읽기 + */ +#define USE_FIFO 0 + + +/** + * \brief IMU 디바이스를 리셋하고 초기화한다. WHOAMI 확인 포함. + * 다른 IMU 접근 함수 호출 전에 반드시 성공적으로 실행되어야 한다. + * + * \return 0=성공, 음수=에러 + */ +int setup_imu_device(struct inv_imu_serif *icm_serif); + +/** + * \brief 자이로 및 가속도계 출력을 위한 디바이스 설정을 수행한다. + * FSR, ODR, 전원 모드, FIFO 설정 등을 적용한다. + * \return 0=성공, 음수=에러 + */ +int configure_imu_device(void); + +/** + * \brief FIFO 또는 레지스터에서 IMU 데이터를 추출한다. + * 내부적으로 imu_callback()이 호출되어 데이터를 처리한다. + * \return 0=성공, 음수=에러 + */ +int get_imu_data(void); + +/** + * \brief 센서 데이터 수신 콜백. 마운팅 매트릭스 적용 후 + * info4/BLE/UART 모드에 따라 데이터를 출력한다. + * \param[in] event 하나의 센서 데이터 패킷을 담은 구조체 + */ +void imu_callback(inv_imu_sensor_event_t *event); + +/** + * \brief 드라이버 API를 우회한 직접 I2C 레지스터 읽기. + * DRDY 인터럽트 없이 즉시 센서 데이터를 읽어 BLE로 전송한다. + * 읽기 후 IMU를 슬립 모드로 전환하여 전력을 절감한다. + * \return 0=성공, 음수=에러 + */ +int imu_read_direct(void); + + +#endif /* !_APP_RAW_H_ */ diff --git a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/app_raw/app_raw_main.c b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/app_raw/app_raw_main.c similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/app_raw/app_raw_main.c rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/app_raw/app_raw_main.c index 08f7935..077d94d 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/app_raw/app_raw_main.c +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/app_raw/app_raw_main.c @@ -1,290 +1,290 @@ -/******************************************************************************* - * @file app_raw_main.c - * @author CandyPops Co. - * @version V1.0.0 - * @date 2022-09-05 - * @brief - ******************************************************************************/ - -/******************************************************************************* - * 2026.03.26 jhChun - * 현재 이 파일은 실제 런타임에 실행되지 않고 있음 - * 인터럽트 방식 대신 app_raw.c imu_read_direct()에서 직접 레지스터 읽는 방식 사용 중 - * 추후 필요 여부에 따라 정리 예정 - ******************************************************************************/ - -/******************************************************************************* - * [모듈 개요] ICM42670P 메인 초기화 및 폴링 루프 - * - * ICM42670P IMU 센서의 전체 초기화 시퀀스와 메인 루프를 담당한다. - * - * 초기화 흐름 (icm42670_init): - * 1) setup_mcu() - I2C 시리얼 인터페이스 구조체 설정 및 TWI 초기화 - * 2) setup_imu_device() - IMU 드라이버 초기화 + WHOAMI 확인 - * 3) configure_imu_device() - 센서 파라미터 설정 (FSR, ODR, 전원 모드) - * 4) inv_gpio_sensor_irq_init() - INT1(P1.13) GPIO 인터럽트 설정 - * - * 메인 루프 (icm42670_main): - * - INT1 인터럽트 발생 시 irq_from_device 플래그가 세팅됨 - * - 메인 루프에서 플래그를 확인하고, 세팅되어 있으면 센서 데이터를 읽음 - * - 인터럽트는 하강 에지(HITOLO)에서 발생 (INT1 핀 풀업 설정) - * - * 보조 함수: - * - inv_imu_sleep_us() - nrf_delay_us 래퍼 (IMU 드라이버가 사용) - * - inv_imu_get_time_us() - RTC1 카운터로 타임스탬프 제공 - ******************************************************************************/ -#include "sdk_config.h" -#include "app_raw.h" -#include "app_raw_main.h" -#include "RingBuffer.h" -#include "inv_imu_driver.h" - -#include "system_interface.h" - -/* std */ -#include -#include "nrf.h" -#include "app_error.h" -#include "boards.h" -#include "nrfx_gpiote.h" -#include "nrf_delay.h" - -#include "app_util_platform.h" -#include "main.h" /* 2026-03-17: cmd_parse.h 삭제 → main.h */ -#include "i2c_manager.h" -/* -------------------------------------------------------------------------------------- - * Global variables - * -------------------------------------------------------------------------------------- */ - -/* -------------------------------------------------------------------------------------- - * Static variables - * -------------------------------------------------------------------------------------- */ - -/* - * IMU 인터럽트 플래그 - * INT1 핀의 하강 에지 인터럽트 발생 시 1로 세팅된다. - * 메인 루프에서 이 플래그를 확인 후 데이터를 읽고 0으로 클리어한다. - * volatile: ISR에서 변경되므로 컴파일러 최적화 방지 - */ -static volatile int irq_from_device; - - -/* -------------------------------------------------------------------------------------- - * Forward declaration - * -------------------------------------------------------------------------------------- */ -static int setup_mcu(struct inv_imu_serif *icm_serif); - -/*! -* @brief Sensor general interrupt handler, calls specific handlers. -* -* This function is called when an external interrupt is triggered by the sensor, -* checks interrupt registers of InvenSense Sensor to determine the source and type of interrupt -* and calls the specific interrupt handler accordingly. -* -* @param[in] NULL -* -* @param[out] NULL -* -* @return NULL -* -*/ -/* - * inv_gpio_sensor_interrupt_handler() - * INT1 핀 인터럽트 핸들러 (ISR). - * 센서가 새 데이터를 준비했을 때 호출되며, 플래그만 세팅하고 즉시 반환한다. - * 실제 데이터 처리는 메인 루프(icm42670_main)에서 수행한다. - */ -static void inv_gpio_sensor_interrupt_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action) -{ - irq_from_device = 1; -} - - -/* - * inv_gpio_sensor_irq_init() - * INT1(P1.13) GPIO 인터럽트를 초기화한다. - * - * 설정: - * - 트리거: 하강 에지 (HITOLO) — 센서가 INT를 Low로 끌어내릴 때 - * - 풀업 저항: 내부 풀업 활성화 - * - 핸들러: inv_gpio_sensor_interrupt_handler - * - GPIOTE 모듈이 미초기화 상태이면 먼저 초기화 - */ -void inv_gpio_sensor_irq_init(void) -{ - ret_code_t err_code; - - /* GPIOTE 모듈 초기화 (이미 초기화되어 있으면 건너뜀) */ - if (!nrfx_gpiote_is_init()) - { - err_code = nrfx_gpiote_init(); - APP_ERROR_CHECK(err_code); - } - - /* 하강 에지 인터럽트 설정: High→Low 전환 시 트리거, 내부 풀업 사용 */ - nrfx_gpiote_in_config_t in_config = NRFX_GPIOTE_CONFIG_IN_SENSE_HITOLO(true); - in_config.pull = NRF_GPIO_PIN_PULLUP; - - /* INT1 핀에 인터럽트 핸들러 등록 */ - err_code = nrfx_gpiote_in_init(ICM42670_INT1_PIN, &in_config, inv_gpio_sensor_interrupt_handler); - APP_ERROR_CHECK(err_code); - - /* 인터럽트 이벤트 활성화 */ - nrfx_gpiote_in_event_enable(ICM42670_INT1_PIN, true); -} - - -/* - * inv_gpio_sensor_irq_uninit() - * INT1 GPIO 인터럽트를 비활성화하고 해제한다. - * 센서 비활성화 시 또는 재초기화 전에 호출된다. - */ -void inv_gpio_sensor_irq_uninit(void) -{ - /* 인터럽트 이벤트 비활성화 */ - nrfx_gpiote_in_event_disable(ICM42670_INT1_PIN); - - /* INT1 핀 인터럽트 설정 해제 */ - nrfx_gpiote_in_uninit(ICM42670_INT1_PIN); - - /* GPIOTE 모듈 해제 (초기화된 경우에만) */ - if (nrfx_gpiote_is_init()) - { - nrfx_gpiote_uninit(); - - } -} - -/* -------------------------------------------------------------------------------------- - * Main - * -------------------------------------------------------------------------------------- */ - -/* - * icm42670_init() - * ICM42670P 전체 초기화 시퀀스를 수행한다. - * - * 초기화 순서: - * 1) setup_mcu() - I2C 인터페이스 구조체 설정 및 TWI 하드웨어 초기화 - * 2) setup_imu_device() - IMU 드라이버 초기화, WHOAMI(0x67) 확인 - * 3) configure_imu_device() - FSR, ODR, 전원 모드 설정 - * 4) inv_gpio_sensor_irq_init() - INT1 인터럽트 활성화 (데이터 준비 알림) - * - * 반환값: 0=성공, -1=초기화 실패 - */ -int icm42670_init(void) -{ - int rc = 0; - struct inv_imu_serif icm_serif; - - rc |= setup_mcu(&icm_serif); - rc |= setup_imu_device(&icm_serif); - rc |= configure_imu_device(); - - if(rc != 0){ - printf("!!!error during initialization\r\n"); - return -1; - } - - /* 초기화 성공 후 INT1 인터럽트 활성화 — 이후 데이터 준비 시 ISR이 호출됨 */ - inv_gpio_sensor_irq_init(); - - return rc; -} - - -/* - * icm42670_main() - * ICM42670P 메인 폴링 루프. - * 메인 애플리케이션 루프에서 주기적으로 호출되어야 한다. - * - * 동작: - * 1) I2C 하드웨어가 초기화되었는지 확인 (hw_i2c_init_once) - * 2) irq_from_device 플래그 확인 (ISR에서 세팅됨) - * 3) 플래그가 세팅되어 있으면 센서 데이터 읽기 (get_imu_data) - * 4) 데이터 읽기 완료 후 플래그 클리어 - * - * 참고: 인터럽트 기반 폴링 방식으로, ISR에서는 플래그만 세팅하고 실제 I2C 통신은 메인 컨텍스트에서 수행한다. - */ -void icm42670_main(void) -{ - int rc = 0; - hw_i2c_init_once(); - /* 인터럽트 발생 여부 확인 후 데이터 읽기 */ - - if (irq_from_device) { - rc = get_imu_data(); - - if(rc < 0) { - printf("error while getting data\r\n"); - } - - /* 플래그 클리어 — 다음 인터럽트까지 대기 */ - irq_from_device = 0; - } - -} - - -/* -------------------------------------------------------------------------------------- - * Functions definitions - * -------------------------------------------------------------------------------------- */ - -/* - * setup_mcu() - * MCU 측 시리얼 인터페이스를 설정한다. - * - * inv_imu_serif 구조체에 다음을 등록: - * - read_reg / write_reg : I2C 읽기/쓰기 콜백 함수 (system_interface.c에서 구현) - * - max_read / max_write : 최대 전송 크기 (32KB) - * - serif_type : 통신 타입 (UI_I2C) - * - * 설정 후 inv_io_hal_init()을 호출하여 실제 TWI 하드웨어를 초기화한다. - */ -static int setup_mcu(struct inv_imu_serif *icm_serif) -{ - int rc = 0; - - /* IMU 드라이버용 시리얼 인터페이스 구조체 설정 */ - icm_serif->context = 0; /* 컨텍스트 미사용 */ - icm_serif->read_reg = inv_io_hal_read_reg; /* 레지스터 읽기 콜백 */ - icm_serif->write_reg = inv_io_hal_write_reg; /* 레지스터 쓰기 콜백 */ - icm_serif->max_read = 1024*32; /* 1회 읽기 최대 바이트 수 */ - icm_serif->max_write = 1024*32; /* 1회 쓰기 최대 바이트 수 */ - icm_serif->serif_type = SERIF_TYPE; /* UI_I2C (app_raw.h에서 정의) */ - - /* TWI 하드웨어 초기화 */ - rc |= inv_io_hal_init(icm_serif); - - return rc; -} - - -/* -------------------------------------------------------------------------------------- - * Extern functions definition - * -------------------------------------------------------------------------------------- */ - -/* - * inv_imu_sleep_us() - * IMU 드라이버가 사용하는 마이크로초 단위 슬립 함수. - * nrf_delay_us()를 래핑하여 플랫폼 독립적 인터페이스를 제공한다. - * 예: 자이로 스타트업 대기(GYR_STARTUP_TIME_US) 시 사용 - */ -void inv_imu_sleep_us(uint32_t us) -{ - nrf_delay_us(us); -} - - -/* - * inv_imu_get_time_us() - * IMU 드라이버가 사용하는 타임스탬프 함수. - * nRF52840의 RTC1 카운터 값을 반환한다. - * - * 주의: RTC1은 32.768kHz로 동작하므로, 반환값의 단위는 엄밀히 - * 마이크로초가 아닌 RTC 틱(약 30.5us/tick)이다. - * 드라이버 내부에서 상대적 시간 비교 용도로 사용된다. - */ -uint64_t inv_imu_get_time_us(void) -{ - return NRF_RTC1->COUNTER; -} +/******************************************************************************* + * @file app_raw_main.c + * @author CandyPops Co. + * @version V1.0.0 + * @date 2022-09-05 + * @brief + ******************************************************************************/ + +/******************************************************************************* + * 2026.03.26 jhChun + * 현재 이 파일은 실제 런타임에 실행되지 않고 있음 + * 인터럽트 방식 대신 app_raw.c imu_read_direct()에서 직접 레지스터 읽는 방식 사용 중 + * 추후 필요 여부에 따라 정리 예정 + ******************************************************************************/ + +/******************************************************************************* + * [모듈 개요] ICM42670P 메인 초기화 및 폴링 루프 + * + * ICM42670P IMU 센서의 전체 초기화 시퀀스와 메인 루프를 담당한다. + * + * 초기화 흐름 (icm42670_init): + * 1) setup_mcu() - I2C 시리얼 인터페이스 구조체 설정 및 TWI 초기화 + * 2) setup_imu_device() - IMU 드라이버 초기화 + WHOAMI 확인 + * 3) configure_imu_device() - 센서 파라미터 설정 (FSR, ODR, 전원 모드) + * 4) inv_gpio_sensor_irq_init() - INT1(P1.13) GPIO 인터럽트 설정 + * + * 메인 루프 (icm42670_main): + * - INT1 인터럽트 발생 시 irq_from_device 플래그가 세팅됨 + * - 메인 루프에서 플래그를 확인하고, 세팅되어 있으면 센서 데이터를 읽음 + * - 인터럽트는 하강 에지(HITOLO)에서 발생 (INT1 핀 풀업 설정) + * + * 보조 함수: + * - inv_imu_sleep_us() - nrf_delay_us 래퍼 (IMU 드라이버가 사용) + * - inv_imu_get_time_us() - RTC1 카운터로 타임스탬프 제공 + ******************************************************************************/ +#include "sdk_config.h" +#include "app_raw.h" +#include "app_raw_main.h" +#include "RingBuffer.h" +#include "inv_imu_driver.h" + +#include "system_interface.h" + +/* std */ +#include +#include "nrf.h" +#include "app_error.h" +#include "boards.h" +#include "nrfx_gpiote.h" +#include "nrf_delay.h" + +#include "app_util_platform.h" +#include "main.h" /* 2026-03-17: cmd_parse.h 삭제 → main.h */ +#include "i2c_manager.h" +/* -------------------------------------------------------------------------------------- + * Global variables + * -------------------------------------------------------------------------------------- */ + +/* -------------------------------------------------------------------------------------- + * Static variables + * -------------------------------------------------------------------------------------- */ + +/* + * IMU 인터럽트 플래그 + * INT1 핀의 하강 에지 인터럽트 발생 시 1로 세팅된다. + * 메인 루프에서 이 플래그를 확인 후 데이터를 읽고 0으로 클리어한다. + * volatile: ISR에서 변경되므로 컴파일러 최적화 방지 + */ +static volatile int irq_from_device; + + +/* -------------------------------------------------------------------------------------- + * Forward declaration + * -------------------------------------------------------------------------------------- */ +static int setup_mcu(struct inv_imu_serif *icm_serif); + +/*! +* @brief Sensor general interrupt handler, calls specific handlers. +* +* This function is called when an external interrupt is triggered by the sensor, +* checks interrupt registers of InvenSense Sensor to determine the source and type of interrupt +* and calls the specific interrupt handler accordingly. +* +* @param[in] NULL +* +* @param[out] NULL +* +* @return NULL +* +*/ +/* + * inv_gpio_sensor_interrupt_handler() + * INT1 핀 인터럽트 핸들러 (ISR). + * 센서가 새 데이터를 준비했을 때 호출되며, 플래그만 세팅하고 즉시 반환한다. + * 실제 데이터 처리는 메인 루프(icm42670_main)에서 수행한다. + */ +static void inv_gpio_sensor_interrupt_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action) +{ + irq_from_device = 1; +} + + +/* + * inv_gpio_sensor_irq_init() + * INT1(P1.13) GPIO 인터럽트를 초기화한다. + * + * 설정: + * - 트리거: 하강 에지 (HITOLO) — 센서가 INT를 Low로 끌어내릴 때 + * - 풀업 저항: 내부 풀업 활성화 + * - 핸들러: inv_gpio_sensor_interrupt_handler + * - GPIOTE 모듈이 미초기화 상태이면 먼저 초기화 + */ +void inv_gpio_sensor_irq_init(void) +{ + ret_code_t err_code; + + /* GPIOTE 모듈 초기화 (이미 초기화되어 있으면 건너뜀) */ + if (!nrfx_gpiote_is_init()) + { + err_code = nrfx_gpiote_init(); + APP_ERROR_CHECK(err_code); + } + + /* 하강 에지 인터럽트 설정: High→Low 전환 시 트리거, 내부 풀업 사용 */ + nrfx_gpiote_in_config_t in_config = NRFX_GPIOTE_CONFIG_IN_SENSE_HITOLO(true); + in_config.pull = NRF_GPIO_PIN_PULLUP; + + /* INT1 핀에 인터럽트 핸들러 등록 */ + err_code = nrfx_gpiote_in_init(ICM42670_INT1_PIN, &in_config, inv_gpio_sensor_interrupt_handler); + APP_ERROR_CHECK(err_code); + + /* 인터럽트 이벤트 활성화 */ + nrfx_gpiote_in_event_enable(ICM42670_INT1_PIN, true); +} + + +/* + * inv_gpio_sensor_irq_uninit() + * INT1 GPIO 인터럽트를 비활성화하고 해제한다. + * 센서 비활성화 시 또는 재초기화 전에 호출된다. + */ +void inv_gpio_sensor_irq_uninit(void) +{ + /* 인터럽트 이벤트 비활성화 */ + nrfx_gpiote_in_event_disable(ICM42670_INT1_PIN); + + /* INT1 핀 인터럽트 설정 해제 */ + nrfx_gpiote_in_uninit(ICM42670_INT1_PIN); + + /* GPIOTE 모듈 해제 (초기화된 경우에만) */ + if (nrfx_gpiote_is_init()) + { + nrfx_gpiote_uninit(); + + } +} + +/* -------------------------------------------------------------------------------------- + * Main + * -------------------------------------------------------------------------------------- */ + +/* + * icm42670_init() + * ICM42670P 전체 초기화 시퀀스를 수행한다. + * + * 초기화 순서: + * 1) setup_mcu() - I2C 인터페이스 구조체 설정 및 TWI 하드웨어 초기화 + * 2) setup_imu_device() - IMU 드라이버 초기화, WHOAMI(0x67) 확인 + * 3) configure_imu_device() - FSR, ODR, 전원 모드 설정 + * 4) inv_gpio_sensor_irq_init() - INT1 인터럽트 활성화 (데이터 준비 알림) + * + * 반환값: 0=성공, -1=초기화 실패 + */ +int icm42670_init(void) +{ + int rc = 0; + struct inv_imu_serif icm_serif; + + rc |= setup_mcu(&icm_serif); + rc |= setup_imu_device(&icm_serif); + rc |= configure_imu_device(); + + if(rc != 0){ + printf("!!!error during initialization\r\n"); + return -1; + } + + /* 초기화 성공 후 INT1 인터럽트 활성화 — 이후 데이터 준비 시 ISR이 호출됨 */ + inv_gpio_sensor_irq_init(); + + return rc; +} + + +/* + * icm42670_main() + * ICM42670P 메인 폴링 루프. + * 메인 애플리케이션 루프에서 주기적으로 호출되어야 한다. + * + * 동작: + * 1) I2C 하드웨어가 초기화되었는지 확인 (hw_i2c_init_once) + * 2) irq_from_device 플래그 확인 (ISR에서 세팅됨) + * 3) 플래그가 세팅되어 있으면 센서 데이터 읽기 (get_imu_data) + * 4) 데이터 읽기 완료 후 플래그 클리어 + * + * 참고: 인터럽트 기반 폴링 방식으로, ISR에서는 플래그만 세팅하고 실제 I2C 통신은 메인 컨텍스트에서 수행한다. + */ +void icm42670_main(void) +{ + int rc = 0; + hw_i2c_init_once(); + /* 인터럽트 발생 여부 확인 후 데이터 읽기 */ + + if (irq_from_device) { + rc = get_imu_data(); + + if(rc < 0) { + printf("error while getting data\r\n"); + } + + /* 플래그 클리어 — 다음 인터럽트까지 대기 */ + irq_from_device = 0; + } + +} + + +/* -------------------------------------------------------------------------------------- + * Functions definitions + * -------------------------------------------------------------------------------------- */ + +/* + * setup_mcu() + * MCU 측 시리얼 인터페이스를 설정한다. + * + * inv_imu_serif 구조체에 다음을 등록: + * - read_reg / write_reg : I2C 읽기/쓰기 콜백 함수 (system_interface.c에서 구현) + * - max_read / max_write : 최대 전송 크기 (32KB) + * - serif_type : 통신 타입 (UI_I2C) + * + * 설정 후 inv_io_hal_init()을 호출하여 실제 TWI 하드웨어를 초기화한다. + */ +static int setup_mcu(struct inv_imu_serif *icm_serif) +{ + int rc = 0; + + /* IMU 드라이버용 시리얼 인터페이스 구조체 설정 */ + icm_serif->context = 0; /* 컨텍스트 미사용 */ + icm_serif->read_reg = inv_io_hal_read_reg; /* 레지스터 읽기 콜백 */ + icm_serif->write_reg = inv_io_hal_write_reg; /* 레지스터 쓰기 콜백 */ + icm_serif->max_read = 1024*32; /* 1회 읽기 최대 바이트 수 */ + icm_serif->max_write = 1024*32; /* 1회 쓰기 최대 바이트 수 */ + icm_serif->serif_type = SERIF_TYPE; /* UI_I2C (app_raw.h에서 정의) */ + + /* TWI 하드웨어 초기화 */ + rc |= inv_io_hal_init(icm_serif); + + return rc; +} + + +/* -------------------------------------------------------------------------------------- + * Extern functions definition + * -------------------------------------------------------------------------------------- */ + +/* + * inv_imu_sleep_us() + * IMU 드라이버가 사용하는 마이크로초 단위 슬립 함수. + * nrf_delay_us()를 래핑하여 플랫폼 독립적 인터페이스를 제공한다. + * 예: 자이로 스타트업 대기(GYR_STARTUP_TIME_US) 시 사용 + */ +void inv_imu_sleep_us(uint32_t us) +{ + nrf_delay_us(us); +} + + +/* + * inv_imu_get_time_us() + * IMU 드라이버가 사용하는 타임스탬프 함수. + * nRF52840의 RTC1 카운터 값을 반환한다. + * + * 주의: RTC1은 32.768kHz로 동작하므로, 반환값의 단위는 엄밀히 + * 마이크로초가 아닌 RTC 틱(약 30.5us/tick)이다. + * 드라이버 내부에서 상대적 시간 비교 용도로 사용된다. + */ +uint64_t inv_imu_get_time_us(void) +{ + return NRF_RTC1->COUNTER; +} diff --git a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/app_raw/app_raw_main.h b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/app_raw/app_raw_main.h similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/app_raw/app_raw_main.h rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/app_raw/app_raw_main.h index b7127be..f725804 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/app_raw/app_raw_main.h +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/app_raw/app_raw_main.h @@ -1,31 +1,31 @@ -/******************************************************************************* - * @file app_raw_main.h - * @author CandyPops Co. - * @version V1.0.0 - * @date 2022-09-05 - * @brief - ******************************************************************************/ - -/******************************************************************************* - * [헤더 개요] ICM42670P 메인 초기화/폴링 루프 선언 - * - * ICM42670P IMU 센서의 전체 초기화 및 메인 루프 함수를 선언한다. - * - icm42670_init() : 전체 초기화 (MCU설정 → IMU초기화 → 센서설정 → 인터럽트 활성화) - * - icm42670_main() : 메인 폴링 루프 (INT1 인터럽트 확인 → 데이터 읽기) - * - icm42670_uninit() : 해제 (프로토타입만 선언, 구현은 별도) - ******************************************************************************/ - -#ifndef _APP_RAW_MAIN_H_ -#define _APP_RAW_MAIN_H_ -#include "sdk_config.h" - -/* ICM42670P 전체 초기화 — MCU I2C 설정 → IMU 드라이버 초기화 → 센서 설정 → 인터럽트 활성화 */ -int icm42670_init(void); - -/* ICM42670P 메인 폴링 루프 — INT1 인터럽트 플래그 확인 후 센서 데이터 읽기 */ -void icm42670_main(void); - -/* ICM42670P 해제 (프로토타입 선언) */ -int icm42670_uninit(void); - -#endif /* !_APP_RAW_MAIN_H_ */ +/******************************************************************************* + * @file app_raw_main.h + * @author CandyPops Co. + * @version V1.0.0 + * @date 2022-09-05 + * @brief + ******************************************************************************/ + +/******************************************************************************* + * [헤더 개요] ICM42670P 메인 초기화/폴링 루프 선언 + * + * ICM42670P IMU 센서의 전체 초기화 및 메인 루프 함수를 선언한다. + * - icm42670_init() : 전체 초기화 (MCU설정 → IMU초기화 → 센서설정 → 인터럽트 활성화) + * - icm42670_main() : 메인 폴링 루프 (INT1 인터럽트 확인 → 데이터 읽기) + * - icm42670_uninit() : 해제 (프로토타입만 선언, 구현은 별도) + ******************************************************************************/ + +#ifndef _APP_RAW_MAIN_H_ +#define _APP_RAW_MAIN_H_ +#include "sdk_config.h" + +/* ICM42670P 전체 초기화 — MCU I2C 설정 → IMU 드라이버 초기화 → 센서 설정 → 인터럽트 활성화 */ +int icm42670_init(void); + +/* ICM42670P 메인 폴링 루프 — INT1 인터럽트 플래그 확인 후 센서 데이터 읽기 */ +void icm42670_main(void); + +/* ICM42670P 해제 (프로토타입 선언) */ +int icm42670_uninit(void); + +#endif /* !_APP_RAW_MAIN_H_ */ diff --git a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/system_interface.c b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/system_interface.c similarity index 96% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/system_interface.c rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/system_interface.c index 0cec044..95a493e 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/system_interface.c +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/system_interface.c @@ -1,334 +1,334 @@ -/******************************************************************************* - * @file system_interface.c - * @author CandyPops Co. - * @version V1.0.0 - * @date 2022-09-05 - * @brief - ******************************************************************************/ - -/******************************************************************************* - * [모듈 개요] ICM42670P IMU 센서 I2C 통신 인터페이스 - * - * nRF52840의 TWI(I2C) 하드웨어를 사용하여 ICM42670P IMU 센서와 통신하는 - * 저수준 인터페이스 모듈이다. - * - * - I2C 슬레이브 주소: 0x68 (ICM42670P 기본 주소) - * - I2C 핀 설정: SCL=P1.14, SDA=P1.15 (system_interface.h에서 정의) - * - TWI 인스턴스: NRFX_TWI_INSTANCE(0) 사용 - * - 통신 속도: 100kHz (NRF_TWI_FREQ_100K) - * - * 주요 함수 흐름: - * inv_io_hal_init() → I2C 또는 SPI 초기화 (현재 I2C만 구현) - * inv_io_hal_read_reg() → 레지스터 읽기 (TX로 주소 전송 → RX로 데이터 수신) - * inv_io_hal_write_reg() → 레지스터 쓰기 (주소+데이터를 한번에 TX) - * - * 에러 처리: 모든 I2C 읽기/쓰기에서 실패 시 1회 재시도 후 에러 출력 - * - * 참고: SPI4 인터페이스 코드 경로도 존재하지만 현재 미구현 상태이며, - * 실제 운용에서는 I2C(UI_I2C)만 사용한다. - ******************************************************************************/ - -/* board driver */ -#include -#include -#include - -#include -#include "nrf.h" -#include "app_error.h" -#include "boards.h" -#include "nrfx_gpiote.h" -#include "nrfx_twi.h" - -#include "system_interface.h" -#include "nrf_delay.h" - -/* ICM42670P I2C 슬레이브 주소 및 직렬 쓰기 최대 바이트 수 */ -#define ICM_I2C_ADDR 0x68 -#define INV_MAX_SERIAL_WRITE 16 - -/* TWI(I2C) 인스턴스 생성 — system_interface.h의 ICM42670_I2C_INSTANCE(0)을 사용 */ -const nrfx_twi_t m_twi_icm42670 = NRFX_TWI_INSTANCE(ICM42670_I2C_INSTANCE); - -/* - * inv_i2c_master_uninitialize() - * I2C 버스를 비활성화하고 TWI 인스턴스를 해제한다. - * 슬립 모드 진입 전 또는 재초기화 전에 호출된다. - */ -void inv_i2c_master_uninitialize(void){ - nrfx_twi_disable(&m_twi_icm42670); - nrfx_twi_uninit(&m_twi_icm42670); -} - -/* - * inv_i2c_master_initialize() - * nRF52840 TWI 하드웨어를 초기화하고 활성화한다. - * - SCL: P1.14, SDA: P1.15 - * - 속도: 100kHz - * - 인터럽트 우선순위: 최고 (APP_IRQ_PRIORITY_HIGH) - * - 이벤트 핸들러 없음 (블로킹 모드로 동작) - */ -void inv_i2c_master_initialize(void){ - ret_code_t err_code; - - const nrfx_twi_config_t twi_icm42670_config = { - .scl = ICM42670_I2C_SCL_PIN, - .sda = ICM42670_I2C_SDA_PIN, - .frequency = NRF_TWI_FREQ_100K, - .interrupt_priority = APP_IRQ_PRIORITY_HIGH, - }; - - /* TWI 드라이버 초기화 (이벤트 핸들러=NULL → 블로킹 모드) */ - err_code = nrfx_twi_init(&m_twi_icm42670, &twi_icm42670_config, NULL, NULL); - APP_ERROR_CHECK(err_code); - - /* TWI 하드웨어 활성화 — 이후 tx/rx 가능 */ - nrfx_twi_enable(&m_twi_icm42670); -} - - -/* - * icm42670_twi_tx() - * I2C 전송 래퍼 함수. nrfx_twi_tx를 호출하여 데이터를 송신한다. - * no_stop=true이면 STOP 컨디션을 보내지 않음 (Repeated START를 위해 사용) - */ -uint32_t icm42670_twi_tx( uint8_t device_id, - uint8_t const * p_data, - uint8_t length, - bool no_stop) -{ - ret_code_t ret; - ret = nrfx_twi_tx(&m_twi_icm42670, device_id, p_data, length, no_stop); - return ret; -} - - -/* - * icm42670_twi_rx() - * I2C 수신 래퍼 함수. nrfx_twi_rx를 호출하여 데이터를 수신한다. - */ -uint32_t icm42670_twi_rx( uint8_t device_id, - uint8_t * p_data, - uint8_t length) -{ - ret_code_t ret; - ret = nrfx_twi_rx(&m_twi_icm42670, device_id, p_data, length); - return ret; -} - - -/* - * inv_i2c_master_read_register() - * ICM42670P의 특정 레지스터에서 데이터를 읽는다. - * - * 동작 순서: - * 1) TX: 레지스터 주소 1바이트 전송 (no_stop=true → Repeated START 준비) - * 2) RX: 지정된 길이만큼 데이터 수신 - * - * 에러 처리: TX, RX 각각 실패 시 1회 재시도한다. - */ -static unsigned long inv_i2c_master_read_register(unsigned char Address, unsigned char RegisterAddr, unsigned short RegisterLen, unsigned char *RegisterValue){ - //ret_code_t ret; - uint32_t ret; - uint8_t addr8 = (uint8_t)RegisterAddr; - - /* 1단계: 읽을 레지스터 주소를 전송 (STOP 없이 → Repeated START 사용) */ - ret = icm42670_twi_tx(Address, &addr8, 1, true); - if(ret != NRF_SUCCESS) { - /* 실패 시 1회 재시도 */ - ret = icm42670_twi_tx(Address, &addr8, 1, true); - if(ret != NRF_SUCCESS) { - printf("ERR! i2c read-1\r\n"); - } - } - - /* 2단계: 해당 레지스터에서 데이터 수신 */ - ret = icm42670_twi_rx(Address, RegisterValue, RegisterLen); - if(ret != NRF_SUCCESS) { - /* 실패 시 1회 재시도 */ - ret = icm42670_twi_rx(Address, RegisterValue, RegisterLen); - if(ret != NRF_SUCCESS) { - printf("ERR! i2c read-2\r\n"); - } - } - - return ret; -} - -/* - * inv_i2c_master_write_register() - * ICM42670P의 특정 레지스터에 데이터를 쓴다. - * - * 동작 순서: - * 1) 버퍼[0]에 레지스터 주소, 버퍼[1~N]에 쓸 데이터를 배치 - * 2) TX: 주소+데이터를 한번에 전송 (no_stop=false → STOP 컨디션 포함) - * - * 에러 처리: 실패 시 1회 재시도한다. - */ -static unsigned long inv_i2c_master_write_register(unsigned char Address, unsigned char RegisterAddr, unsigned short RegisterLen, const unsigned char *RegisterValue){ - uint32_t ret; - uint8_t buffer[1 + INV_MAX_SERIAL_WRITE]; /* 레지스터 주소(1) + 데이터(최대 16바이트) */ - - /* 버퍼 구성: [레지스터 주소][데이터 바이트들] */ - buffer[0] = (uint8_t)RegisterAddr; - memcpy(buffer+1, RegisterValue, RegisterLen); - - /* 주소+데이터를 한번에 전송 */ - ret = icm42670_twi_tx(Address, buffer, RegisterLen+1, false); - if(ret != NRF_SUCCESS) { - /* 실패 시 1회 재시도 */ - ret = icm42670_twi_tx(Address, buffer, RegisterLen+1, false); - if(ret != NRF_SUCCESS) { - printf("ERR! i2c write\r\n"); - } - } - - return ret; -} - - - -/* - * inv_io_hal_init() - * IMU 드라이버가 사용하는 시리얼 인터페이스(I2C 또는 SPI)를 초기화한다. - * serif->serif_type에 따라 분기하며, 현재는 I2C만 구현되어 있다. - * 반환값: 0=성공, -1=지원하지 않는 인터페이스 타입 - */ - -int inv_io_hal_init(struct inv_imu_serif *serif) -{ - - switch (serif->serif_type) { - case UI_SPI4: - { - /* SPI4 초기화 — 현재 미구현 (I2C만 사용) */ - break; - } - - case UI_I2C: - inv_i2c_master_initialize(); - break; - - default: - return -1; - } - - return 0; -} - - -/* - * inv_io_hal_read_reg() - * IMU 드라이버 콜백: 지정된 레지스터에서 데이터를 읽는다. - * 시리얼 타입에 따라 I2C 또는 SPI 읽기를 수행한다. - */ -int inv_io_hal_read_reg(struct inv_imu_serif *serif, uint8_t reg, uint8_t * rbuffer, uint32_t rlen) -{ - switch (serif->serif_type) { - case UI_SPI4: - return 0; - - case UI_I2C: - return inv_i2c_master_read_register(ICM_I2C_ADDR, reg, rlen, rbuffer); - - default: - return -1; - } -} - -/* - * inv_io_hal_write_reg() - * IMU 드라이버 콜백: 지정된 레지스터에 데이터를 쓴다. - * 시리얼 타입에 따라 I2C 또는 SPI 쓰기를 수행한다. - */ -int inv_io_hal_write_reg(struct inv_imu_serif *serif, uint8_t reg, const uint8_t * wbuffer, uint32_t wlen) -{ - switch (serif->serif_type) { - case UI_SPI4: - return 0; - - case UI_I2C: - return inv_i2c_master_write_register(ICM_I2C_ADDR, reg, wlen, wbuffer); - - default: - return -1; - } -} - -/* - * cat_read() - * 범용 I2C 읽기 함수 (디버그/레거시용). - * 8바이트를 읽어 첫 번째 바이트를 반환하고, 읽은 데이터를 콘솔에 출력한다. - * 참고: 현재 실제 운용에서는 사용되지 않으며, 디버그 목적으로 남아 있다. - */ -uint8_t cat_read(uint8_t device_id, uint8_t address, uint8_t *data) - { - - uint8_t read_data = 0; - char adata[8]; - ret_code_t err_code; - //address = 1|(address<<1); - address = (address & 0xFF); - - /* 레지스터 주소 전송 (STOP 없이, Repeated START 준비) */ - err_code = nrfx_twi_tx(&m_twi_icm42670, device_id, &address, 1, true); - if (err_code != NRF_SUCCESS) { - // Handle error - // return; - } - - /* 8바이트 데이터 수신 */ - err_code = nrfx_twi_rx(&m_twi_icm42670, device_id, data, 8); - if (err_code != NRF_SUCCESS) { - // Handle error - return 0; - } - read_data = data[0]; - memcpy(adata,data,8); - printf("Data %s . \r\n", adata); - return read_data; - - - - - - - - } - -/* - * cat_write() - * 범용 I2C 쓰기 함수 (디버그/레거시용). - * 주소 1바이트 + 데이터 1바이트를 전송한다. - * 참고: buffer에 6바이트를 복사하지만, 실제 전송은 2바이트만 수행한다. - */ -void cat_write(uint8_t device_id, uint8_t address, uint8_t *data){ - - uint8_t buffer[7]={0x00,0x00,0x00,0x00,0x00,0x00,0x00}; - - address = (address & 0xFF); - - buffer[0] = (address); - //buffer[1] =(data & 0xFF); - memcpy(buffer+1,data,6); - ret_code_t err_code; - //err_code = nrf_drv_twi_tx(&m_twi_ir, device_id, 0x00, 1, false); - - /* 주소(1바이트) + 데이터(1바이트) = 2바이트 전송 */ - err_code = nrfx_twi_tx(&m_twi_icm42670, device_id, buffer, 2, false); -// err_code = nrf_drv_twi_tx(&m_twi_ir, device_id, buffer, 2, false); -// nrfx_twi_rx(&m_twi_icm42670, device_id, p_data, length); -// nrfx_twi_tx(&m_twi_icm42670, device_id, p_data, length, no_stop); - printf("Data %x %x %x %x. \r\n", buffer[0], buffer[1], buffer[2], buffer[3]); - - //err_code = nrf_drv_twi_tx(&m_twi_ir, device_id, buffer, 6, false); - if (err_code != NRF_SUCCESS) { - - printf("TWI Error."); - - - - } - -} - +/******************************************************************************* + * @file system_interface.c + * @author CandyPops Co. + * @version V1.0.0 + * @date 2022-09-05 + * @brief + ******************************************************************************/ + +/******************************************************************************* + * [모듈 개요] ICM42670P IMU 센서 I2C 통신 인터페이스 + * + * nRF52840의 TWI(I2C) 하드웨어를 사용하여 ICM42670P IMU 센서와 통신하는 + * 저수준 인터페이스 모듈이다. + * + * - I2C 슬레이브 주소: 0x68 (ICM42670P 기본 주소) + * - I2C 핀 설정: SCL=P1.14, SDA=P1.15 (system_interface.h에서 정의) + * - TWI 인스턴스: NRFX_TWI_INSTANCE(0) 사용 + * - 통신 속도: 100kHz (NRF_TWI_FREQ_100K) + * + * 주요 함수 흐름: + * inv_io_hal_init() → I2C 또는 SPI 초기화 (현재 I2C만 구현) + * inv_io_hal_read_reg() → 레지스터 읽기 (TX로 주소 전송 → RX로 데이터 수신) + * inv_io_hal_write_reg() → 레지스터 쓰기 (주소+데이터를 한번에 TX) + * + * 에러 처리: 모든 I2C 읽기/쓰기에서 실패 시 1회 재시도 후 에러 출력 + * + * 참고: SPI4 인터페이스 코드 경로도 존재하지만 현재 미구현 상태이며, + * 실제 운용에서는 I2C(UI_I2C)만 사용한다. + ******************************************************************************/ + +/* board driver */ +#include +#include +#include + +#include +#include "nrf.h" +#include "app_error.h" +#include "boards.h" +#include "nrfx_gpiote.h" +#include "nrfx_twi.h" + +#include "system_interface.h" +#include "nrf_delay.h" + +/* ICM42670P I2C 슬레이브 주소 및 직렬 쓰기 최대 바이트 수 */ +#define ICM_I2C_ADDR 0x68 +#define INV_MAX_SERIAL_WRITE 16 + +/* TWI(I2C) 인스턴스 생성 — system_interface.h의 ICM42670_I2C_INSTANCE(0)을 사용 */ +const nrfx_twi_t m_twi_icm42670 = NRFX_TWI_INSTANCE(ICM42670_I2C_INSTANCE); + +/* + * inv_i2c_master_uninitialize() + * I2C 버스를 비활성화하고 TWI 인스턴스를 해제한다. + * 슬립 모드 진입 전 또는 재초기화 전에 호출된다. + */ +void inv_i2c_master_uninitialize(void){ + nrfx_twi_disable(&m_twi_icm42670); + nrfx_twi_uninit(&m_twi_icm42670); +} + +/* + * inv_i2c_master_initialize() + * nRF52840 TWI 하드웨어를 초기화하고 활성화한다. + * - SCL: P1.14, SDA: P1.15 + * - 속도: 100kHz + * - 인터럽트 우선순위: 최고 (APP_IRQ_PRIORITY_HIGH) + * - 이벤트 핸들러 없음 (블로킹 모드로 동작) + */ +void inv_i2c_master_initialize(void){ + ret_code_t err_code; + + const nrfx_twi_config_t twi_icm42670_config = { + .scl = ICM42670_I2C_SCL_PIN, + .sda = ICM42670_I2C_SDA_PIN, + .frequency = NRF_TWI_FREQ_100K, + .interrupt_priority = APP_IRQ_PRIORITY_HIGH, + }; + + /* TWI 드라이버 초기화 (이벤트 핸들러=NULL → 블로킹 모드) */ + err_code = nrfx_twi_init(&m_twi_icm42670, &twi_icm42670_config, NULL, NULL); + APP_ERROR_CHECK(err_code); + + /* TWI 하드웨어 활성화 — 이후 tx/rx 가능 */ + nrfx_twi_enable(&m_twi_icm42670); +} + + +/* + * icm42670_twi_tx() + * I2C 전송 래퍼 함수. nrfx_twi_tx를 호출하여 데이터를 송신한다. + * no_stop=true이면 STOP 컨디션을 보내지 않음 (Repeated START를 위해 사용) + */ +uint32_t icm42670_twi_tx( uint8_t device_id, + uint8_t const * p_data, + uint8_t length, + bool no_stop) +{ + ret_code_t ret; + ret = nrfx_twi_tx(&m_twi_icm42670, device_id, p_data, length, no_stop); + return ret; +} + + +/* + * icm42670_twi_rx() + * I2C 수신 래퍼 함수. nrfx_twi_rx를 호출하여 데이터를 수신한다. + */ +uint32_t icm42670_twi_rx( uint8_t device_id, + uint8_t * p_data, + uint8_t length) +{ + ret_code_t ret; + ret = nrfx_twi_rx(&m_twi_icm42670, device_id, p_data, length); + return ret; +} + + +/* + * inv_i2c_master_read_register() + * ICM42670P의 특정 레지스터에서 데이터를 읽는다. + * + * 동작 순서: + * 1) TX: 레지스터 주소 1바이트 전송 (no_stop=true → Repeated START 준비) + * 2) RX: 지정된 길이만큼 데이터 수신 + * + * 에러 처리: TX, RX 각각 실패 시 1회 재시도한다. + */ +static unsigned long inv_i2c_master_read_register(unsigned char Address, unsigned char RegisterAddr, unsigned short RegisterLen, unsigned char *RegisterValue){ + //ret_code_t ret; + uint32_t ret; + uint8_t addr8 = (uint8_t)RegisterAddr; + + /* 1단계: 읽을 레지스터 주소를 전송 (STOP 없이 → Repeated START 사용) */ + ret = icm42670_twi_tx(Address, &addr8, 1, true); + if(ret != NRF_SUCCESS) { + /* 실패 시 1회 재시도 */ + ret = icm42670_twi_tx(Address, &addr8, 1, true); + if(ret != NRF_SUCCESS) { + printf("ERR! i2c read-1\r\n"); + } + } + + /* 2단계: 해당 레지스터에서 데이터 수신 */ + ret = icm42670_twi_rx(Address, RegisterValue, RegisterLen); + if(ret != NRF_SUCCESS) { + /* 실패 시 1회 재시도 */ + ret = icm42670_twi_rx(Address, RegisterValue, RegisterLen); + if(ret != NRF_SUCCESS) { + printf("ERR! i2c read-2\r\n"); + } + } + + return ret; +} + +/* + * inv_i2c_master_write_register() + * ICM42670P의 특정 레지스터에 데이터를 쓴다. + * + * 동작 순서: + * 1) 버퍼[0]에 레지스터 주소, 버퍼[1~N]에 쓸 데이터를 배치 + * 2) TX: 주소+데이터를 한번에 전송 (no_stop=false → STOP 컨디션 포함) + * + * 에러 처리: 실패 시 1회 재시도한다. + */ +static unsigned long inv_i2c_master_write_register(unsigned char Address, unsigned char RegisterAddr, unsigned short RegisterLen, const unsigned char *RegisterValue){ + uint32_t ret; + uint8_t buffer[1 + INV_MAX_SERIAL_WRITE]; /* 레지스터 주소(1) + 데이터(최대 16바이트) */ + + /* 버퍼 구성: [레지스터 주소][데이터 바이트들] */ + buffer[0] = (uint8_t)RegisterAddr; + memcpy(buffer+1, RegisterValue, RegisterLen); + + /* 주소+데이터를 한번에 전송 */ + ret = icm42670_twi_tx(Address, buffer, RegisterLen+1, false); + if(ret != NRF_SUCCESS) { + /* 실패 시 1회 재시도 */ + ret = icm42670_twi_tx(Address, buffer, RegisterLen+1, false); + if(ret != NRF_SUCCESS) { + printf("ERR! i2c write\r\n"); + } + } + + return ret; +} + + + +/* + * inv_io_hal_init() + * IMU 드라이버가 사용하는 시리얼 인터페이스(I2C 또는 SPI)를 초기화한다. + * serif->serif_type에 따라 분기하며, 현재는 I2C만 구현되어 있다. + * 반환값: 0=성공, -1=지원하지 않는 인터페이스 타입 + */ + +int inv_io_hal_init(struct inv_imu_serif *serif) +{ + + switch (serif->serif_type) { + case UI_SPI4: + { + /* SPI4 초기화 — 현재 미구현 (I2C만 사용) */ + break; + } + + case UI_I2C: + inv_i2c_master_initialize(); + break; + + default: + return -1; + } + + return 0; +} + + +/* + * inv_io_hal_read_reg() + * IMU 드라이버 콜백: 지정된 레지스터에서 데이터를 읽는다. + * 시리얼 타입에 따라 I2C 또는 SPI 읽기를 수행한다. + */ +int inv_io_hal_read_reg(struct inv_imu_serif *serif, uint8_t reg, uint8_t * rbuffer, uint32_t rlen) +{ + switch (serif->serif_type) { + case UI_SPI4: + return 0; + + case UI_I2C: + return inv_i2c_master_read_register(ICM_I2C_ADDR, reg, rlen, rbuffer); + + default: + return -1; + } +} + +/* + * inv_io_hal_write_reg() + * IMU 드라이버 콜백: 지정된 레지스터에 데이터를 쓴다. + * 시리얼 타입에 따라 I2C 또는 SPI 쓰기를 수행한다. + */ +int inv_io_hal_write_reg(struct inv_imu_serif *serif, uint8_t reg, const uint8_t * wbuffer, uint32_t wlen) +{ + switch (serif->serif_type) { + case UI_SPI4: + return 0; + + case UI_I2C: + return inv_i2c_master_write_register(ICM_I2C_ADDR, reg, wlen, wbuffer); + + default: + return -1; + } +} + +/* + * cat_read() + * 범용 I2C 읽기 함수 (디버그/레거시용). + * 8바이트를 읽어 첫 번째 바이트를 반환하고, 읽은 데이터를 콘솔에 출력한다. + * 참고: 현재 실제 운용에서는 사용되지 않으며, 디버그 목적으로 남아 있다. + */ +uint8_t cat_read(uint8_t device_id, uint8_t address, uint8_t *data) + { + + uint8_t read_data = 0; + char adata[8]; + ret_code_t err_code; + //address = 1|(address<<1); + address = (address & 0xFF); + + /* 레지스터 주소 전송 (STOP 없이, Repeated START 준비) */ + err_code = nrfx_twi_tx(&m_twi_icm42670, device_id, &address, 1, true); + if (err_code != NRF_SUCCESS) { + // Handle error + // return; + } + + /* 8바이트 데이터 수신 */ + err_code = nrfx_twi_rx(&m_twi_icm42670, device_id, data, 8); + if (err_code != NRF_SUCCESS) { + // Handle error + return 0; + } + read_data = data[0]; + memcpy(adata,data,8); + printf("Data %s . \r\n", adata); + return read_data; + + + + + + + + } + +/* + * cat_write() + * 범용 I2C 쓰기 함수 (디버그/레거시용). + * 주소 1바이트 + 데이터 1바이트를 전송한다. + * 참고: buffer에 6바이트를 복사하지만, 실제 전송은 2바이트만 수행한다. + */ +void cat_write(uint8_t device_id, uint8_t address, uint8_t *data){ + + uint8_t buffer[7]={0x00,0x00,0x00,0x00,0x00,0x00,0x00}; + + address = (address & 0xFF); + + buffer[0] = (address); + //buffer[1] =(data & 0xFF); + memcpy(buffer+1,data,6); + ret_code_t err_code; + //err_code = nrf_drv_twi_tx(&m_twi_ir, device_id, 0x00, 1, false); + + /* 주소(1바이트) + 데이터(1바이트) = 2바이트 전송 */ + err_code = nrfx_twi_tx(&m_twi_icm42670, device_id, buffer, 2, false); +// err_code = nrf_drv_twi_tx(&m_twi_ir, device_id, buffer, 2, false); +// nrfx_twi_rx(&m_twi_icm42670, device_id, p_data, length); +// nrfx_twi_tx(&m_twi_icm42670, device_id, p_data, length, no_stop); + printf("Data %x %x %x %x. \r\n", buffer[0], buffer[1], buffer[2], buffer[3]); + + //err_code = nrf_drv_twi_tx(&m_twi_ir, device_id, buffer, 6, false); + if (err_code != NRF_SUCCESS) { + + printf("TWI Error."); + + + + } + +} + diff --git a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/system_interface.h b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/system_interface.h similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/icm42670p/system_interface.h rename to project/ble_peripheral/ble_app_bladder_patch/measurement/imu/system_interface.h index 29c2fb5..9d963a6 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/icm42670p/system_interface.h +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/imu/system_interface.h @@ -1,72 +1,72 @@ -/******************************************************************************* - * @file system_interface.h - * @author CandyPops Co. - * @version V1.0.0 - * @date 2022-09-05 - * @brief - ******************************************************************************/ - -/******************************************************************************* - * [헤더 개요] ICM42670P I2C 통신 인터페이스 선언 - * - * nRF52840 TWI 하드웨어를 통해 ICM42670P IMU 센서와 통신하기 위한 핀 정의, 함수 프로토타입 선언 - * - * 핀 배치: - * - I2C SCL : P1.14 - * - I2C SDA : P1.15 - * - INT1 : P1.13 (데이터 준비 인터럽트) - * - INT2 : P0.26 (보조 인터럽트, 현재 미사용) - * - * TWI 인스턴스: 0번 사용 - ******************************************************************************/ - -#ifndef _SYSTEM_INTERFACE_H_ -#define _SYSTEM_INTERFACE_H_ - -#include "inv_imu_transport.h" -#include -/* TODO: Move that somewhere else */ -#ifndef TO_MASK -#define TO_MASK(a) (1U << (unsigned)(a)) -#endif - - -#define ICM42670_I2C_INSTANCE 0 /**< I2C(TWI) 인스턴스 인덱스 */ -#define ICM42670_I2C_SDA_PIN NRF_GPIO_PIN_MAP(1,15) /**< SDA 핀: P1.15 */ -#define ICM42670_I2C_SCL_PIN NRF_GPIO_PIN_MAP(1,14) /**< SCL 핀: P1.14 */ -#define ICM42670_INT1_PIN NRF_GPIO_PIN_MAP(1,13) /**< INT1 핀: P1.13 (데이터 준비 인터럽트) */ -#define ICM42670_INT2_PIN NRF_GPIO_PIN_MAP(0,26) /**< INT2 핀: P0.26 (보조, 현재 미사용) */ - -/* I2C 전송 래퍼 — no_stop=true이면 Repeated START를 위해 STOP 컨디션 생략 */ -uint32_t icm42670_twi_tx( uint8_t device_id, - uint8_t const * p_data, - uint8_t length, - bool no_stop); - -/* I2C 수신 래퍼 */ -uint32_t icm42670_twi_rx( uint8_t device_id, - uint8_t * p_data, - uint8_t length); - -/* 범용 I2C 읽기 (디버그/레거시용) — 8바이트를 읽어 첫 바이트 반환 */ -uint8_t cat_read (uint8_t device_id, uint8_t address, uint8_t *data); - -/* 범용 I2C 쓰기 (디버그/레거시용) — 주소+데이터 2바이트 전송 */ -void cat_write (uint8_t device_id, uint8_t address, uint8_t *data); - -/* I2C 하드웨어 해제 (슬립 또는 재초기화 전 호출) */ -void inv_i2c_master_uninitialize(void); - -/* I2C 하드웨어 초기화 (100kHz, 블로킹 모드) */ -void inv_i2c_master_initialize(void); - -/* IMU 드라이버용 시리얼 인터페이스 초기화 (I2C/SPI 분기) */ -int inv_io_hal_init(struct inv_imu_serif *serif); - -/* IMU 드라이버 콜백: 레지스터 읽기 */ -int inv_io_hal_read_reg(struct inv_imu_serif *serif, uint8_t reg, uint8_t * rbuffer, uint32_t rlen); - -/* IMU 드라이버 콜백: 레지스터 쓰기 */ -int inv_io_hal_write_reg(struct inv_imu_serif *serif, uint8_t reg, const uint8_t * wbuffer, uint32_t wlen); - -#endif /* !_SYSTEM_INTERFACE_H_ */ +/******************************************************************************* + * @file system_interface.h + * @author CandyPops Co. + * @version V1.0.0 + * @date 2022-09-05 + * @brief + ******************************************************************************/ + +/******************************************************************************* + * [헤더 개요] ICM42670P I2C 통신 인터페이스 선언 + * + * nRF52840 TWI 하드웨어를 통해 ICM42670P IMU 센서와 통신하기 위한 핀 정의, 함수 프로토타입 선언 + * + * 핀 배치: + * - I2C SCL : P1.14 + * - I2C SDA : P1.15 + * - INT1 : P1.13 (데이터 준비 인터럽트) + * - INT2 : P0.26 (보조 인터럽트, 현재 미사용) + * + * TWI 인스턴스: 0번 사용 + ******************************************************************************/ + +#ifndef _SYSTEM_INTERFACE_H_ +#define _SYSTEM_INTERFACE_H_ + +#include "inv_imu_transport.h" +#include +/* TODO: Move that somewhere else */ +#ifndef TO_MASK +#define TO_MASK(a) (1U << (unsigned)(a)) +#endif + + +#define ICM42670_I2C_INSTANCE 0 /**< I2C(TWI) 인스턴스 인덱스 */ +#define ICM42670_I2C_SDA_PIN NRF_GPIO_PIN_MAP(1,15) /**< SDA 핀: P1.15 */ +#define ICM42670_I2C_SCL_PIN NRF_GPIO_PIN_MAP(1,14) /**< SCL 핀: P1.14 */ +#define ICM42670_INT1_PIN NRF_GPIO_PIN_MAP(1,13) /**< INT1 핀: P1.13 (데이터 준비 인터럽트) */ +#define ICM42670_INT2_PIN NRF_GPIO_PIN_MAP(0,26) /**< INT2 핀: P0.26 (보조, 현재 미사용) */ + +/* I2C 전송 래퍼 — no_stop=true이면 Repeated START를 위해 STOP 컨디션 생략 */ +uint32_t icm42670_twi_tx( uint8_t device_id, + uint8_t const * p_data, + uint8_t length, + bool no_stop); + +/* I2C 수신 래퍼 */ +uint32_t icm42670_twi_rx( uint8_t device_id, + uint8_t * p_data, + uint8_t length); + +/* 범용 I2C 읽기 (디버그/레거시용) — 8바이트를 읽어 첫 바이트 반환 */ +uint8_t cat_read (uint8_t device_id, uint8_t address, uint8_t *data); + +/* 범용 I2C 쓰기 (디버그/레거시용) — 주소+데이터 2바이트 전송 */ +void cat_write (uint8_t device_id, uint8_t address, uint8_t *data); + +/* I2C 하드웨어 해제 (슬립 또는 재초기화 전 호출) */ +void inv_i2c_master_uninitialize(void); + +/* I2C 하드웨어 초기화 (100kHz, 블로킹 모드) */ +void inv_i2c_master_initialize(void); + +/* IMU 드라이버용 시리얼 인터페이스 초기화 (I2C/SPI 분기) */ +int inv_io_hal_init(struct inv_imu_serif *serif); + +/* IMU 드라이버 콜백: 레지스터 읽기 */ +int inv_io_hal_read_reg(struct inv_imu_serif *serif, uint8_t reg, uint8_t * rbuffer, uint32_t rlen); + +/* IMU 드라이버 콜백: 레지스터 쓰기 */ +int inv_io_hal_write_reg(struct inv_imu_serif *serif, uint8_t reg, const uint8_t * wbuffer, uint32_t wlen); + +#endif /* !_SYSTEM_INTERFACE_H_ */ diff --git a/project/ble_peripheral/ble_app_bladder_patch/tmp235_q1.c b/project/ble_peripheral/ble_app_bladder_patch/measurement/temperature/tmp235_q1.c similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/tmp235_q1.c rename to project/ble_peripheral/ble_app_bladder_patch/measurement/temperature/tmp235_q1.c index b6bc40d..a9126f0 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/tmp235_q1.c +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/temperature/tmp235_q1.c @@ -1,217 +1,217 @@ -/******************************************************************************* - * @file tmp235_q1.c - * @author CandyPops Co. - * @version V1.0.0 - * @date 2022-09-05 - * @brief - ******************************************************************************/ - -/******************************************************************************* - * [모듈 개요] TMP235-Q1 아날로그 온도센서 드라이버 - * - * TMP235-Q1은 온도에 비례하는 아날로그 전압(Vout)을 출력하는 센서 - * nRF52840 SAADC의 AIN3 채널로 Vout을 읽고, mV로 변환한 뒤 온도(°C)로 계산 - * - * 온도 계산 공식 (구간별 선형 보간): - * - Vout <= 1500mV (0~100°C): Ta = (Vout - 500) / 10.0 - * - Vout <= 1750mV (100~125°C): Ta = (Vout - 1500) / 10.1 + 100 - * - Vout <= 2000mV (125~150°C): Ta = (Vout - 1752.5) / 10.6 + 125 - * - Vout > 2000mV: 오류 (150°C 초과) - * - * info4 모드(전체 센서 수집) 동작 순서: - * 배터리(go_batt) → 온도(go_temp) → IMU(motion_raw_data_enabled) - * 온도 측정 완료 시 go_temp=false, motion_raw_data_enabled=true 로 전환 - ******************************************************************************/ - -#include "sdk_common.h" - -#include -#include -#include -#include -#include "nrf.h" -#include "boards.h" -#include "app_error.h" -#include "nrf_drv_saadc.h" -#include "ble_nus.h" -#include "tmp235_q1.h" -#include "main.h" -/* 2026-03-17: cmd_parse.h 삭제 — main.h는 이미 포함됨 */ -#include "main_timer.h" -#include "debug_print.h" -/* SAADC 내부 기준전압 600mV (부동소수점) */ -#define TMP235_REF_VOLTAGE_IN_MILLIVOLTS 600.0f /**< Reference voltage (in milli volts) used by ADC while doing conversion. */ -/* 1/3 프리스케일링 보상 계수 x6 (부동소수점) */ -#define TMP235_PRE_SCALING_COMPENSATION 6.0f /**< The ADC is configured to use VDD with 1/3 prescaling as input. And hence the result of conversion is to be multiplied by 3 to get the actual value of the battery voltage.*/ -/* 12비트 ADC 최대값 4096 (부동소수점, 분해능 기준) */ -#define TMP235_ADC_RES_12BITS 4096.0f /**< Maximum digital value for 12-bit ADC conversion. */ - -/**@brief Macro to convert the result of ADC conversion in millivolts. - * - * @param[in] ADC_VALUE ADC result. - * - * @retval Result converted to millivolts. - */ -/* ADC 원시값 → TMP235 출력전압(mV) 변환 매크로: ADC x (600/4096) x 6 */ -#define TMP235_VOUT_IN_MILLI_VOLTS(ADC_VALUE)\ - ((((ADC_VALUE) * TMP235_REF_VOLTAGE_IN_MILLIVOLTS) / TMP235_ADC_RES_12BITS) * TMP235_PRE_SCALING_COMPENSATION) - -/* SAADC 변환 결과 저장 버퍼 (1채널) */ -static nrf_saadc_value_t adc_buf; -extern char ble_tx_buffer[BLE_NUS_MAX_DATA_LEN]; -extern uint8_t ble_bin_buffer[BLE_NUS_MAX_DATA_LEN] ; - -/* 현재 명령 소스: CMD_UART 또는 CMD_BLE */ -extern which_cmd_t cmd_type_t; - -/* info4: 전체 센서 데이터 수집 모드 플래그 */ -extern bool info4; // main.c - -/* 온도 측정 순서 제어 플래그 */ -extern bool go_temp; // main_timer.c - -/* info4 모드에서 온도값 임시 저장 (°C x 100, 정수 표현) */ -volatile uint16_t info_temp; //48_C -extern bool motion_raw_data_enabled; - -/* SAADC 완료 플래그 — all_sensors()에서 콜백 완료 대기용 */ -volatile bool tmp235_saadc_done = false; - -/**@brief Function for handling the ADC interrupt. - * - * @details This function will fetch the conversion result from the ADC, convert the value into - * percentage and send it to peer. - */ - -/** - * @brief TMP235 온도센서 ADC 완료 콜백 - * - * SAADC 변환 완료 시 호출된다. - * ADC값 → Vout(mV) → 온도(°C) 순으로 변환하고, 동작 모드에 따라: - * - info4 모드: info_temp에 저장 (°C x 100 정수), 이후 IMU 측정으로 전환 - * - 일반 모드: BLE("rso:" 바이너리) 또는 UART로 온도값 전송 - */ -void tmp235_voltage_handler(nrf_drv_saadc_evt_t const * p_event) /* TMP325 Vout reading */ -{ - float led_temp; /* 계산된 온도 (°C, 부동소수점) */ - float led_temp_16; /* BLE 전송용 온도 (°C x 100, 부동소수점) */ - - if (p_event->type == NRF_DRV_SAADC_EVT_DONE) - { - nrf_saadc_value_t adc_result; - float tmp235_voltage_in_milli_volts = 0; - - /* ADC 변환 결과 읽기 */ - adc_result = p_event->data.done.p_buffer[0]; - //DBG_PRINTF("[TMP] adc=%d\r\n", adc_result); - - /* SAADC 해제 — 배터리/압력센서 측정과 하드웨어 공유 */ - nrf_drv_saadc_channel_uninit(0); // 채널 먼저 해제 - nrf_drv_saadc_uninit(); - //nrf_drv_saadc_uninit(); // 이전: 드라이버 먼저 해제 - //nrf_drv_saadc_channel_uninit(0); - - /* ADC값 → TMP235 출력전압(mV) 변환 */ - tmp235_voltage_in_milli_volts = TMP235_VOUT_IN_MILLI_VOLTS(adc_result); - - /* - * Vout → 온도(°C) 변환 (구간별 선형 보간) - * TMP235 데이터시트 기반: - * 0~100°C 구간: 기울기 10.0 mV/°C, 오프셋 500mV - * 100~125°C 구간: 기울기 10.1 mV/°C - * 125~150°C 구간: 기울기 10.6 mV/°C - */ - if(tmp235_voltage_in_milli_volts <= 1500) - { - /* 0~100°C: Ta = (Vout - 500mV) / 10.0 mV/°C */ - led_temp = (tmp235_voltage_in_milli_volts - 500.0f) / 10.0f + 0.0f; - } - else if(tmp235_voltage_in_milli_volts <= 1750) - { - /* 100~125°C: 기울기가 10.1로 약간 증가 */ - led_temp = (tmp235_voltage_in_milli_volts - 1500.0f) / 10.1f + 100.0f; - } - else if(tmp235_voltage_in_milli_volts <= 2000) - { - /* 125~150°C: 기울기가 10.6으로 더 증가 */ - led_temp = (tmp235_voltage_in_milli_volts - 1752.5f) / 10.6f + 125.0f; - } - else - { - /* 150°C 초과 — 센서 측정 범위 벗어남 */ - DBG_PRINTF("ERR!!! Temprature is over 150c\r\n"); - } - - /* info4 모드: 온도값을 정수(°C x 100)로 저장 (예: 36.50°C → 3650) */ - if (info4 == true) - { - info_temp = (uint16_t)(led_temp * 100); - } - /* UART 모드: 소수점 2자리까지 텍스트로 출력 */ - else if(cmd_type_t == CMD_UART) - { - DBG_PRINTF("To%.2f\r\n\r\n",led_temp); - } - /* BLE 모드: °C x 100 정수를 "rso:" 헤더로 바이너리 전송 */ - else if(cmd_type_t == CMD_BLE) - { - led_temp_16 = led_temp * 100; - single_format_data(ble_bin_buffer, "rso:", (uint16_t)led_temp_16); - - dr_binary_tx_safe(ble_bin_buffer,3); - -// sprintf(ble_tx_buffer, "To%.2f\r\n",led_temp); -// data_tx_handler(ble_tx_buffer); - } - - DBG_PRINTF("7"); - tmp235_saadc_done = true; - } - -} - - -/** - * @brief TMP235 온도센서 SAADC 초기화 및 측정 시작 - * - * AIN3 채널을 싱글엔드 모드로 설정하고 즉시 샘플링을 트리거한다. - * 결과는 tmp235_voltage_handler 콜백에서 비동기로 처리된다. - */ -void tmp235_init(void) -{ - /* SAADC 드라이버 초기화 (4x 오버샘플링으로 노이즈 저감) */ - nrf_drv_saadc_config_t saadc_config = NRF_DRV_SAADC_DEFAULT_CONFIG; - saadc_config.resolution = NRF_SAADC_RESOLUTION_12BIT; - saadc_config.oversample = NRF_SAADC_OVERSAMPLE_4X; - ret_code_t err_code = nrf_drv_saadc_init(&saadc_config, tmp235_voltage_handler); - APP_ERROR_CHECK(err_code); - - /* AIN3 채널 설정: TMP235-Q1 Vout 핀 (싱글엔드 입력, burst 활성화) */ - nrf_saadc_channel_config_t config = NRF_DRV_SAADC_DEFAULT_CHANNEL_CONFIG_SE(NRF_SAADC_INPUT_AIN3); - config.burst = NRF_SAADC_BURST_ENABLED; - err_code = nrf_drv_saadc_channel_init(0, &config); - APP_ERROR_CHECK(err_code); - - /* ADC 버퍼 등록 (1채널, 1샘플) */ - err_code = nrf_drv_saadc_buffer_convert(&adc_buf, 1); - APP_ERROR_CHECK(err_code); - - /* 즉시 ADC 샘플링 시작 (비동기) */ - err_code = nrf_drv_saadc_sample(); - APP_ERROR_CHECK(err_code); -} - - -/* Ta = (Vout – Voffs ) / Tc + Tinfl */ -/** - * @brief 온도 측정 외부 호출 함수 - * - * tmp235_init()을 호출하여 SAADC 초기화 + 측정을 일괄 수행한다. - * 내부적으로 init 시 바로 샘플링이 시작되므로 별도 sample 호출 불필요. - */ -void tmp235_voltage_level_meas(void) -{ - tmp235_init(); // init 함수에 있는 걸 그냥 여기 넣어도 - //tmp235_uninit(); -} - +/******************************************************************************* + * @file tmp235_q1.c + * @author CandyPops Co. + * @version V1.0.0 + * @date 2022-09-05 + * @brief + ******************************************************************************/ + +/******************************************************************************* + * [모듈 개요] TMP235-Q1 아날로그 온도센서 드라이버 + * + * TMP235-Q1은 온도에 비례하는 아날로그 전압(Vout)을 출력하는 센서 + * nRF52840 SAADC의 AIN3 채널로 Vout을 읽고, mV로 변환한 뒤 온도(°C)로 계산 + * + * 온도 계산 공식 (구간별 선형 보간): + * - Vout <= 1500mV (0~100°C): Ta = (Vout - 500) / 10.0 + * - Vout <= 1750mV (100~125°C): Ta = (Vout - 1500) / 10.1 + 100 + * - Vout <= 2000mV (125~150°C): Ta = (Vout - 1752.5) / 10.6 + 125 + * - Vout > 2000mV: 오류 (150°C 초과) + * + * info4 모드(전체 센서 수집) 동작 순서: + * 배터리(go_batt) → 온도(go_temp) → IMU(motion_raw_data_enabled) + * 온도 측정 완료 시 go_temp=false, motion_raw_data_enabled=true 로 전환 + ******************************************************************************/ + +#include "sdk_common.h" + +#include +#include +#include +#include +#include "nrf.h" +#include "boards.h" +#include "app_error.h" +#include "nrf_drv_saadc.h" +#include "ble_nus.h" +#include "tmp235_q1.h" +#include "main.h" +/* 2026-03-17: cmd_parse.h 삭제 — main.h는 이미 포함됨 */ +#include "main_timer.h" +#include "debug_print.h" +/* SAADC 내부 기준전압 600mV (부동소수점) */ +#define TMP235_REF_VOLTAGE_IN_MILLIVOLTS 600.0f /**< Reference voltage (in milli volts) used by ADC while doing conversion. */ +/* 1/3 프리스케일링 보상 계수 x6 (부동소수점) */ +#define TMP235_PRE_SCALING_COMPENSATION 6.0f /**< The ADC is configured to use VDD with 1/3 prescaling as input. And hence the result of conversion is to be multiplied by 3 to get the actual value of the battery voltage.*/ +/* 12비트 ADC 최대값 4096 (부동소수점, 분해능 기준) */ +#define TMP235_ADC_RES_12BITS 4096.0f /**< Maximum digital value for 12-bit ADC conversion. */ + +/**@brief Macro to convert the result of ADC conversion in millivolts. + * + * @param[in] ADC_VALUE ADC result. + * + * @retval Result converted to millivolts. + */ +/* ADC 원시값 → TMP235 출력전압(mV) 변환 매크로: ADC x (600/4096) x 6 */ +#define TMP235_VOUT_IN_MILLI_VOLTS(ADC_VALUE)\ + ((((ADC_VALUE) * TMP235_REF_VOLTAGE_IN_MILLIVOLTS) / TMP235_ADC_RES_12BITS) * TMP235_PRE_SCALING_COMPENSATION) + +/* SAADC 변환 결과 저장 버퍼 (1채널) */ +static nrf_saadc_value_t adc_buf; +extern char ble_tx_buffer[BLE_NUS_MAX_DATA_LEN]; +extern uint8_t ble_bin_buffer[BLE_NUS_MAX_DATA_LEN] ; + +/* 현재 명령 소스: CMD_UART 또는 CMD_BLE */ +extern which_cmd_t cmd_type_t; + +/* info4: 전체 센서 데이터 수집 모드 플래그 */ +extern bool info4; // main.c + +/* 온도 측정 순서 제어 플래그 */ +extern bool go_temp; // main_timer.c + +/* info4 모드에서 온도값 임시 저장 (°C x 100, 정수 표현) */ +volatile uint16_t info_temp; //48_C +extern bool motion_raw_data_enabled; + +/* SAADC 완료 플래그 — all_sensors()에서 콜백 완료 대기용 */ +volatile bool tmp235_saadc_done = false; + +/**@brief Function for handling the ADC interrupt. + * + * @details This function will fetch the conversion result from the ADC, convert the value into + * percentage and send it to peer. + */ + +/** + * @brief TMP235 온도센서 ADC 완료 콜백 + * + * SAADC 변환 완료 시 호출된다. + * ADC값 → Vout(mV) → 온도(°C) 순으로 변환하고, 동작 모드에 따라: + * - info4 모드: info_temp에 저장 (°C x 100 정수), 이후 IMU 측정으로 전환 + * - 일반 모드: BLE("rso:" 바이너리) 또는 UART로 온도값 전송 + */ +void tmp235_voltage_handler(nrf_drv_saadc_evt_t const * p_event) /* TMP325 Vout reading */ +{ + float led_temp; /* 계산된 온도 (°C, 부동소수점) */ + float led_temp_16; /* BLE 전송용 온도 (°C x 100, 부동소수점) */ + + if (p_event->type == NRF_DRV_SAADC_EVT_DONE) + { + nrf_saadc_value_t adc_result; + float tmp235_voltage_in_milli_volts = 0; + + /* ADC 변환 결과 읽기 */ + adc_result = p_event->data.done.p_buffer[0]; + //DBG_PRINTF("[TMP] adc=%d\r\n", adc_result); + + /* SAADC 해제 — 배터리/압력센서 측정과 하드웨어 공유 */ + nrf_drv_saadc_channel_uninit(0); // 채널 먼저 해제 + nrf_drv_saadc_uninit(); + //nrf_drv_saadc_uninit(); // 이전: 드라이버 먼저 해제 + //nrf_drv_saadc_channel_uninit(0); + + /* ADC값 → TMP235 출력전압(mV) 변환 */ + tmp235_voltage_in_milli_volts = TMP235_VOUT_IN_MILLI_VOLTS(adc_result); + + /* + * Vout → 온도(°C) 변환 (구간별 선형 보간) + * TMP235 데이터시트 기반: + * 0~100°C 구간: 기울기 10.0 mV/°C, 오프셋 500mV + * 100~125°C 구간: 기울기 10.1 mV/°C + * 125~150°C 구간: 기울기 10.6 mV/°C + */ + if(tmp235_voltage_in_milli_volts <= 1500) + { + /* 0~100°C: Ta = (Vout - 500mV) / 10.0 mV/°C */ + led_temp = (tmp235_voltage_in_milli_volts - 500.0f) / 10.0f + 0.0f; + } + else if(tmp235_voltage_in_milli_volts <= 1750) + { + /* 100~125°C: 기울기가 10.1로 약간 증가 */ + led_temp = (tmp235_voltage_in_milli_volts - 1500.0f) / 10.1f + 100.0f; + } + else if(tmp235_voltage_in_milli_volts <= 2000) + { + /* 125~150°C: 기울기가 10.6으로 더 증가 */ + led_temp = (tmp235_voltage_in_milli_volts - 1752.5f) / 10.6f + 125.0f; + } + else + { + /* 150°C 초과 — 센서 측정 범위 벗어남 */ + DBG_PRINTF("ERR!!! Temprature is over 150c\r\n"); + } + + /* info4 모드: 온도값을 정수(°C x 100)로 저장 (예: 36.50°C → 3650) */ + if (info4 == true) + { + info_temp = (uint16_t)(led_temp * 100); + } + /* UART 모드: 소수점 2자리까지 텍스트로 출력 */ + else if(cmd_type_t == CMD_UART) + { + DBG_PRINTF("To%.2f\r\n\r\n",led_temp); + } + /* BLE 모드: °C x 100 정수를 "rso:" 헤더로 바이너리 전송 */ + else if(cmd_type_t == CMD_BLE) + { + led_temp_16 = led_temp * 100; + single_format_data(ble_bin_buffer, "rso:", (uint16_t)led_temp_16); + + dr_binary_tx_safe(ble_bin_buffer,3); + +// sprintf(ble_tx_buffer, "To%.2f\r\n",led_temp); +// data_tx_handler(ble_tx_buffer); + } + + DBG_PRINTF("7"); + tmp235_saadc_done = true; + } + +} + + +/** + * @brief TMP235 온도센서 SAADC 초기화 및 측정 시작 + * + * AIN3 채널을 싱글엔드 모드로 설정하고 즉시 샘플링을 트리거한다. + * 결과는 tmp235_voltage_handler 콜백에서 비동기로 처리된다. + */ +void tmp235_init(void) +{ + /* SAADC 드라이버 초기화 (4x 오버샘플링으로 노이즈 저감) */ + nrf_drv_saadc_config_t saadc_config = NRF_DRV_SAADC_DEFAULT_CONFIG; + saadc_config.resolution = NRF_SAADC_RESOLUTION_12BIT; + saadc_config.oversample = NRF_SAADC_OVERSAMPLE_4X; + ret_code_t err_code = nrf_drv_saadc_init(&saadc_config, tmp235_voltage_handler); + APP_ERROR_CHECK(err_code); + + /* AIN3 채널 설정: TMP235-Q1 Vout 핀 (싱글엔드 입력, burst 활성화) */ + nrf_saadc_channel_config_t config = NRF_DRV_SAADC_DEFAULT_CHANNEL_CONFIG_SE(NRF_SAADC_INPUT_AIN3); + config.burst = NRF_SAADC_BURST_ENABLED; + err_code = nrf_drv_saadc_channel_init(0, &config); + APP_ERROR_CHECK(err_code); + + /* ADC 버퍼 등록 (1채널, 1샘플) */ + err_code = nrf_drv_saadc_buffer_convert(&adc_buf, 1); + APP_ERROR_CHECK(err_code); + + /* 즉시 ADC 샘플링 시작 (비동기) */ + err_code = nrf_drv_saadc_sample(); + APP_ERROR_CHECK(err_code); +} + + +/* Ta = (Vout – Voffs ) / Tc + Tinfl */ +/** + * @brief 온도 측정 외부 호출 함수 + * + * tmp235_init()을 호출하여 SAADC 초기화 + 측정을 일괄 수행한다. + * 내부적으로 init 시 바로 샘플링이 시작되므로 별도 sample 호출 불필요. + */ +void tmp235_voltage_level_meas(void) +{ + tmp235_init(); // init 함수에 있는 걸 그냥 여기 넣어도 + //tmp235_uninit(); +} + diff --git a/project/ble_peripheral/ble_app_bladder_patch/tmp235_q1.h b/project/ble_peripheral/ble_app_bladder_patch/measurement/temperature/tmp235_q1.h similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/tmp235_q1.h rename to project/ble_peripheral/ble_app_bladder_patch/measurement/temperature/tmp235_q1.h index 536c118..7cbd238 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/tmp235_q1.h +++ b/project/ble_peripheral/ble_app_bladder_patch/measurement/temperature/tmp235_q1.h @@ -1,31 +1,31 @@ -/******************************************************************************* - * @file tmp235_q1.h - * @author CandyPops Co. - * @version V1.0.0 - * @date 2022-09-05 - * @brief - ******************************************************************************/ - -/******************************************************************************* - * [헤더 개요] TMP235-Q1 아날로그 온도센서 드라이버 인터페이스 - * - * TMP235-Q1의 아날로그 전압 출력을 SAADC(AIN3)로 읽어 - * 온도(°C)로 변환하는 기능의 외부 호출용 API를 선언한다. - * - * 주요 API: - * - tmp235_init() : SAADC 초기화 + 즉시 측정 시작 (내부 사용) - * - tmp235_voltage_level_meas() : 온도 1회 측정 (외부 호출용 래퍼) - * - * 온도 변환: Vout(mV) → Ta(°C) = (Vout - 500) / 10.0 (0~100°C 구간) - ******************************************************************************/ - -#ifndef _TMP235_Q1_H_ -#define _TMP235_Q1_H_ - -/** @brief TMP235 SAADC 초기화 및 측정 시작 (AIN3 채널) */ -void tmp235_init(void); -/** @brief 온도 1회 측정 외부 호출 함수 (내부적으로 tmp235_init 호출) */ -void tmp235_voltage_level_meas(void); - -#endif /* !_TMP235_Q1_H_ */ - +/******************************************************************************* + * @file tmp235_q1.h + * @author CandyPops Co. + * @version V1.0.0 + * @date 2022-09-05 + * @brief + ******************************************************************************/ + +/******************************************************************************* + * [헤더 개요] TMP235-Q1 아날로그 온도센서 드라이버 인터페이스 + * + * TMP235-Q1의 아날로그 전압 출력을 SAADC(AIN3)로 읽어 + * 온도(°C)로 변환하는 기능의 외부 호출용 API를 선언한다. + * + * 주요 API: + * - tmp235_init() : SAADC 초기화 + 즉시 측정 시작 (내부 사용) + * - tmp235_voltage_level_meas() : 온도 1회 측정 (외부 호출용 래퍼) + * + * 온도 변환: Vout(mV) → Ta(°C) = (Vout - 500) / 10.0 (0~100°C 구간) + ******************************************************************************/ + +#ifndef _TMP235_Q1_H_ +#define _TMP235_Q1_H_ + +/** @brief TMP235 SAADC 초기화 및 측정 시작 (AIN3 채널) */ +void tmp235_init(void); +/** @brief 온도 1회 측정 외부 호출 함수 (내부적으로 tmp235_init 호출) */ +void tmp235_voltage_level_meas(void); + +#endif /* !_TMP235_Q1_H_ */ + diff --git a/project/ble_peripheral/ble_app_bladder_patch/pca10056/s140/arm5_no_packs/ble_app_bladder_patch_s140.uvoptx b/project/ble_peripheral/ble_app_bladder_patch/pca10056/s140/arm5_no_packs/ble_app_bladder_patch_s140.uvoptx index 2ba9817..7b2092e 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/pca10056/s140/arm5_no_packs/ble_app_bladder_patch_s140.uvoptx +++ b/project/ble_peripheral/ble_app_bladder_patch/pca10056/s140/arm5_no_packs/ble_app_bladder_patch_s140.uvoptx @@ -209,7 +209,7 @@ 0 0 0 - ..\..\..\power_control.c + C:\jhChun\VesiScan-Basic\project\ble_peripheral\ble_app_bladder_patch\power_control.c @@ -225,7 +225,7 @@ 0 0 0 - ..\..\..\power_control.c + C:\jhChun\VesiScan-Basic\project\ble_peripheral\ble_app_bladder_patch\power_control.c @@ -545,7 +545,7 @@ 0 0 0 - ..\..\..\power_control.c + C:\jhChun\VesiScan-Basic\project\ble_peripheral\ble_app_bladder_patch\power_control.c @@ -561,7 +561,7 @@ 0 0 0 - ..\..\..\power_control.c + C:\jhChun\VesiScan-Basic\project\ble_peripheral\ble_app_bladder_patch\power_control.c @@ -609,7 +609,7 @@ 0 0 0 - ..\..\..\power_control.c + C:\jhChun\VesiScan-Basic\project\ble_peripheral\ble_app_bladder_patch\power_control.c @@ -721,7 +721,7 @@ 0 0 0 - ..\..\..\power_control.c + C:\jhChun\VesiScan-Basic\project\ble_peripheral\ble_app_bladder_patch\power_control.c @@ -737,7 +737,7 @@ 0 0 0 - ..\..\..\power_control.c + C:\jhChun\VesiScan-Basic\project\ble_peripheral\ble_app_bladder_patch\power_control.c @@ -753,7 +753,7 @@ 0 0 0 - ..\..\..\power_control.c + C:\jhChun\VesiScan-Basic\project\ble_peripheral\ble_app_bladder_patch\power_control.c @@ -769,7 +769,7 @@ 0 0 0 - ..\..\..\power_control.c + C:\jhChun\VesiScan-Basic\project\ble_peripheral\ble_app_bladder_patch\power_control.c @@ -785,7 +785,7 @@ 0 0 0 - ..\..\..\power_control.c + C:\jhChun\VesiScan-Basic\project\ble_peripheral\ble_app_bladder_patch\power_control.c @@ -929,7 +929,7 @@ 0 0 0 - ..\..\..\fstorage.c + C:\jhChun\VesiScan-Basic\project\ble_peripheral\ble_app_bladder_patch\fstorage.c @@ -1183,7 +1183,7 @@ 0 0 0 - ..\..\..\main_timer.c + ..\..\..\system\main_timer.c main_timer.c 0 0 @@ -1195,7 +1195,7 @@ 0 0 0 - ..\..\..\battery_saadc.c + ..\..\..\sensors\battery\battery_saadc.c battery_saadc.c 0 0 @@ -1207,7 +1207,7 @@ 0 0 0 - ..\..\..\power_control.c + ..\..\..\io\power\power_control.c power_control.c 0 0 @@ -1219,7 +1219,7 @@ 0 0 0 - ..\..\..\tmp235_q1.c + ..\..\..\sensors\temperature\tmp235_q1.c tmp235_q1.c 0 0 @@ -1231,7 +1231,7 @@ 0 0 0 - ..\..\..\fstorage.c + ..\..\..\hal\fds\fstorage.c fstorage.c 0 0 @@ -1243,7 +1243,7 @@ 0 0 0 - ..\..\..\debug_print.h + ..\..\..\system\debug_print.h debug_print.h 0 0 @@ -1255,7 +1255,7 @@ 0 0 0 - ..\..\..\i2c_manager.c + ..\..\..\hal\i2c\i2c_manager.c i2c_manager.c 0 0 @@ -1375,7 +1375,7 @@ 0 0 0 - ..\..\..\led_control.c + ..\..\..\io\led\led_control.c led_control.c 0 0 @@ -3111,7 +3111,7 @@ 0 0 0 - ..\..\..\icm42670p\system_interface.c + ..\..\..\sensors\imu\system_interface.c system_interface.c 0 0 @@ -3123,7 +3123,7 @@ 0 0 0 - ..\..\..\icm42670p\Invn\EmbUtils\DataConverter.c + ..\..\..\sensors\imu\Invn\EmbUtils\DataConverter.c DataConverter.c 0 0 @@ -3135,7 +3135,7 @@ 0 0 0 - ..\..\..\icm42670p\Invn\EmbUtils\ErrorHelper.c + ..\..\..\sensors\imu\Invn\EmbUtils\ErrorHelper.c ErrorHelper.c 0 0 @@ -3147,7 +3147,7 @@ 0 0 0 - ..\..\..\icm42670p\Invn\EmbUtils\InvBasicMath.c + ..\..\..\sensors\imu\Invn\EmbUtils\InvBasicMath.c InvBasicMath.c 0 0 @@ -3159,7 +3159,7 @@ 0 0 0 - ..\..\..\icm42670p\Invn\imu\inv_imu_apex.c + ..\..\..\sensors\imu\Invn\imu\inv_imu_apex.c inv_imu_apex.c 0 0 @@ -3171,7 +3171,7 @@ 0 0 0 - ..\..\..\icm42670p\Invn\imu\inv_imu_driver.c + ..\..\..\sensors\imu\Invn\imu\inv_imu_driver.c inv_imu_driver.c 0 0 @@ -3183,7 +3183,7 @@ 0 0 0 - ..\..\..\icm42670p\Invn\imu\inv_imu_selftest.c + ..\..\..\sensors\imu\Invn\imu\inv_imu_selftest.c inv_imu_selftest.c 0 0 @@ -3195,7 +3195,7 @@ 0 0 0 - ..\..\..\icm42670p\Invn\imu\inv_imu_transport.c + ..\..\..\sensors\imu\Invn\imu\inv_imu_transport.c inv_imu_transport.c 0 0 @@ -3207,7 +3207,7 @@ 0 0 0 - ..\..\..\icm42670p\app_raw\app_raw.c + ..\..\..\sensors\imu\app_raw\app_raw.c app_raw.c 0 0 @@ -3219,7 +3219,7 @@ 0 0 0 - ..\..\..\icm42670p\app_raw\app_raw_main.c + ..\..\..\sensors\imu\app_raw\app_raw_main.c app_raw_main.c 0 0 diff --git a/project/ble_peripheral/ble_app_bladder_patch/pca10056/s140/arm5_no_packs/ble_app_bladder_patch_s140.uvprojx b/project/ble_peripheral/ble_app_bladder_patch/pca10056/s140/arm5_no_packs/ble_app_bladder_patch_s140.uvprojx index da00718..3e5d082 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/pca10056/s140/arm5_no_packs/ble_app_bladder_patch_s140.uvprojx +++ b/project/ble_peripheral/ble_app_bladder_patch/pca10056/s140/arm5_no_packs/ble_app_bladder_patch_s140.uvprojx @@ -339,7 +339,7 @@ --reduce_paths --diag_suppress 188 APP_TIMER_V2 APP_TIMER_V2_RTC1_ENABLED BOARD_PCA10056 FLOAT_ABI_HARD NRF52840_XXAA NRF_SD_BLE_API_VERSION=7 S140 SOFTDEVICE_PRESENT __HEAP_SIZE=8192 __STACK_SIZE=8192 NRF_DFU_SVCI_ENABLED NRF_DFU_TRANSPORT_BLE=1 ICM42670P CONFIG_NFCT_PINS_AS_GPIOS MBEDTLS_CONFIG_FILE=<nrf_crypto_mbedtls_config.h> NRF_APP_VERSION=0x00000001 NRF_APP_VERSION_ADDR=0x1D000 NRF_CRYPTO_MAX_INSTANCE_COUN=1 - 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ver\ble_pair_lib;..\..\..\..\..\..\components\nfc\ndef\connection_handover\ble_pair_msg;..\..\..\..\..\..\components\nfc\ndef\connection_handover\common;..\..\..\..\..\..\components\nfc\ndef\connection_handover\ep_oob_rec;..\..\..\..\..\..\components\nfc\ndef\connection_handover\hs_rec;..\..\..\..\..\..\components\nfc\ndef\connection_handover\le_oob_rec;..\..\..\..\..\..\components\nfc\ndef\generic\message;..\..\..\..\..\..\components\nfc\ndef\generic\record;..\..\..\..\..\..\components\nfc\ndef\launchapp;..\..\..\..\..\..\components\nfc\ndef\parser\message;..\..\..\..\..\..\components\nfc\ndef\parser\record;..\..\..\..\..\..\components\nfc\ndef\text;..\..\..\..\..\..\components\nfc\ndef\uri;..\..\..\..\..\..\components\nfc\platform;..\..\..\..\..\..\components\nfc\t2t_lib;..\..\..\..\..\..\components\nfc\t2t_parser;..\..\..\..\..\..\components\nfc\t4t_lib;..\..\..\..\..\..\components\nfc\t4t_parser\apdu;..\..\..\..\..\..\components\nfc\t4t_parser\cc_file;..\..\..\..\..\..\components\nfc\t4t_parser\hl_detection_procedure;..\..\..\..\..\..\components\nfc\t4t_parser\tlv;..\..\..\..\..\..\components\softdevice\common;..\..\..\..\..\..\components\softdevice\s140\headers;..\..\..\..\..\..\components\softdevice\s140\headers\nrf52;..\..\..\..\..\..\external\fprintf;..\..\..\..\..\..\external\segger_rtt;..\..\..\..\..\..\external\utf_converter;..\..\..\..\..\..\integration\nrfx;..\..\..\..\..\..\integration\nrfx\legacy;..\..\..\..\..\..\modules\nrfx;..\..\..\..\..\..\modules\nrfx\drivers\include;..\..\..\..\..\..\modules\nrfx\hal;..\config;..\..\..\..\ble_app_bladder_patch;..\..\..\..\..\..\components\libraries\bootloader\dfu;..\..\..\..\..\..\components\libraries\bootloader;..\..\..\..\..\..\modules\nrfx\drivers\src;..\..\..\icm42670p;..\..\..\icm42670p\Invn;..\..\..\icm42670p\Invn\EmbUtils;..\..\..\icm42670p\Invn\imu;..\..\..\icm42670p\Invn\lib_agm;..\..\..\icm42670p\Invn\lib_agm\invn\common;..\..\..\icm42670p\Invn\lib_agm\test_vector;..\..\..\..\..\..\integration\nrfx\legacy;..\..\..\icm42670p\app_raw;..\..\..\..\..\..\components\libraries\crypto\backend\cc310;..\..\..\..\..\..\components\libraries\crypto\backend\cc310_bl;..\..\..\..\..\..\components\libraries\crypto\backend\cifra;..\..\..\..\..\..\components\libraries\crypto\backend\mbedtls;..\..\..\..\..\..\components\libraries\crypto\backend\micro_ecc;..\..\..\..\..\..\components\libraries\crypto\backend\nrf_hw;..\..\..\..\..\..\components\libraries\crypto\backend\nrf_sw;..\..\..\..\..\..\components\libraries\crypto\backend\oberon;..\..\..\..\..\..\components\libraries\crypto\backend\optiga;..\..\..\..\..\..\external\nrf_cc310\include;..\..\..\..\..\..\external\mbedtls\include;..\..\..\..\..\..\external\nrf_oberon;..\..\..\..\..\..\external\nrf_oberon\include;..\..\..\..\..\..\external\nrf_tls\mbedtls\nrf_crypto\config;..\..\..\..\..\..\components\libraries\stack_info;..\..\..\..\..\..\pc_firm\ble_security;..\..\..\..\..\..\pc_firm;..\..\..\..\dr_piezo;..\..\..\..\..\..\pc_firm\dr_util;..\..\..\..\..\..\pc_firm\dr_adc121s051 + ..\..\..\config;..\..\..\..\..\..\components;..\..\..\..\..\..\components\ble\ble_advertising;..\..\..\..\..\..\components\ble\ble_dtm;..\..\..\..\..\..\components\ble\ble_link_ctx_manager;..\..\..\..\..\..\components\ble\ble_racp;..\..\..\..\..\..\components\ble\ble_services\ble_ancs_c;..\..\..\..\..\..\components\ble\ble_services\ble_ans_c;..\..\..\..\..\..\components\ble\ble_services\ble_bas;..\..\..\..\..\..\components\ble\ble_services\ble_bas_c;..\..\..\..\..\..\components\ble\ble_services\ble_cscs;..\..\..\..\..\..\components\ble\ble_services\ble_cts_c;..\..\..\..\..\..\components\ble\ble_services\ble_dfu;..\..\..\..\..\..\components\ble\ble_services\ble_dis;..\..\..\..\..\..\components\ble\ble_services\ble_gls;..\..\..\..\..\..\components\ble\ble_services\ble_hids;..\..\..\..\..\..\components\ble\ble_services\ble_hrs;..\..\..\..\..\..\components\ble\ble_services\ble_hrs_c;..\..\..\..\..\..\components\ble\ble_services\ble_hts;..\..\..\..\..\..\components\ble\ble_services\ble_ias;..\..\..\..\..\..\components\ble\ble_services\ble_ias_c;..\..\..\..\..\..\components\ble\ble_services\ble_lbs;..\..\..\..\..\..\components\ble\ble_services\ble_lbs_c;..\..\..\..\..\..\components\ble\ble_services\ble_lls;..\..\..\..\..\..\components\ble\ble_services\ble_nus;..\..\..\..\..\..\components\ble\ble_services\ble_nus_c;..\..\..\..\..\..\components\ble\ble_services\ble_rscs;..\..\..\..\..\..\components\ble\ble_services\ble_rscs_c;..\..\..\..\..\..\components\ble\ble_services\ble_tps;..\..\..\..\..\..\components\ble\common;..\..\..\..\..\..\components\ble\nrf_ble_gatt;..\..\..\..\..\..\components\ble\nrf_ble_qwr;..\..\..\..\..\..\components\ble\peer_manager;..\..\..\..\..\..\components\boards;..\..\..\..\..\..\components\libraries\atomic;..\..\..\..\..\..\components\libraries\atomic_fifo;..\..\..\..\..\..\components\libraries\atomic_flags;..\..\..\..\..\..\components\libraries\balloc;..\..\..\..\..\..\components\libraries\bootloader\ble_dfu;..\..\..\..\..\..\components\libraries\bsp;..\..\..\..\..\..\components\libraries\button;..\..\..\..\..\..\components\libraries\cli;..\..\..\..\..\..\components\libraries\crc16;..\..\..\..\..\..\components\libraries\crc32;..\..\..\..\..\..\components\libraries\crypto;..\..\..\..\..\..\components\libraries\csense;..\..\..\..\..\..\components\libraries\csense_drv;..\..\..\..\..\..\components\libraries\delay;..\..\..\..\..\..\components\libraries\ecc;..\..\..\..\..\..\components\libraries\experimental_section_vars;..\..\..\..\..\..\components\libraries\experimental_task_manager;..\..\..\..\..\..\components\libraries\fds;..\..\..\..\..\..\components\libraries\fifo;..\..\..\..\..\..\components\libraries\fstorage;..\..\..\..\..\..\components\libraries\gfx;..\..\..\..\..\..\components\libraries\gpiote;..\..\..\..\..\..\components\libraries\hardfault;..\..\..\..\..\..\components\libraries\hci;..\..\..\..\..\..\components\libraries\led_softblink;..\..\..\..\..\..\components\libraries\log;..\..\..\..\..\..\components\libraries\log\src;..\..\..\..\..\..\components\libraries\low_power_pwm;..\..\..\..\..\..\components\libraries\mem_manager;..\..\..\..\..\..\components\libraries\memobj;..\..\..\..\..\..\components\libraries\mpu;..\..\..\..\..\..\components\libraries\mutex;..\..\..\..\..\..\components\libraries\pwm;..\..\..\..\..\..\components\libraries\pwr_mgmt;..\..\..\..\..\..\components\libraries\queue;..\..\..\..\..\..\components\libraries\ringbuf;..\..\..\..\..\..\components\libraries\scheduler;..\..\..\..\..\..\components\libraries\sdcard;..\..\..\..\..\..\components\libraries\slip;..\..\..\..\..\..\components\libraries\sortlist;..\..\..\..\..\..\components\libraries\spi_mngr;..\..\..\..\..\..\components\libraries\stack_guard;..\..\..\..\..\..\components\libraries\strerror;..\..\..\..\..\..\components\libraries\svc;..\..\..\..\..\..\components\libraries\timer;..\..\..\..\..\..\components\libraries\twi_mngr;..\..\..\..\..\..\components\libraries\twi_sensor;..\..\..\..\..\..\components\libraries\uart;..\..\..\..\..\..\components\libraries\usbd;..\..\..\..\..\..\components\libraries\usbd\class\audio;..\..\..\..\..\..\components\libraries\usbd\class\cdc;..\..\..\..\..\..\components\libraries\usbd\class\cdc\acm;..\..\..\..\..\..\components\libraries\usbd\class\hid;..\..\..\..\..\..\components\libraries\usbd\class\hid\generic;..\..\..\..\..\..\components\libraries\usbd\class\hid\kbd;..\..\..\..\..\..\components\libraries\usbd\class\hid\mouse;..\..\..\..\..\..\components\libraries\usbd\class\msc;..\..\..\..\..\..\components\libraries\util;..\..\..\..\..\..\components\nfc\ndef\conn_hand_parser;..\..\..\..\..\..\components\nfc\ndef\conn_hand_parser\ac_rec_parser;..\..\..\..\..\..\components\nfc\ndef\conn_hand_parser\ble_oob_advdata_parser;..\..\..\..\..\..\components\nfc\ndef\conn_hand_parser\le_oob_rec_parser;..\..\..\..\..\..\components\nfc\ndef\connection_handover\ac_rec;..\..\..\..\..\..\components\nfc\ndef\connection_handover\ble_oob_advdata;..\..\..\..\..\..\components\nfc\ndef\connection_handover\ble_pair_lib;..\..\..\..\..\..\components\nfc\ndef\connection_handover\ble_pair_msg;..\..\..\..\..\..\components\nfc\ndef\connection_handover\common;..\..\..\..\..\..\components\nfc\ndef\connection_handover\ep_oob_rec;..\..\..\..\..\..\components\nfc\ndef\connection_handover\hs_rec;..\..\..\..\..\..\components\nfc\ndef\connection_handover\le_oob_rec;..\..\..\..\..\..\components\nfc\ndef\generic\message;..\..\..\..\..\..\components\nfc\ndef\generic\record;..\..\..\..\..\..\components\nfc\ndef\launchapp;..\..\..\..\..\..\components\nfc\ndef\parser\message;..\..\..\..\..\..\components\nfc\ndef\parser\record;..\..\..\..\..\..\components\nfc\ndef\text;..\..\..\..\..\..\components\nfc\ndef\uri;..\..\..\..\..\..\components\nfc\platform;..\..\..\..\..\..\components\nfc\t2t_lib;..\..\..\..\..\..\components\nfc\t2t_parser;..\..\..\..\..\..\components\nfc\t4t_lib;..\..\..\..\..\..\components\nfc\t4t_parser\apdu;..\..\..\..\..\..\components\nfc\t4t_parser\cc_file;..\..\..\..\..\..\components\nfc\t4t_parser\hl_detection_procedure;..\..\..\..\..\..\components\nfc\t4t_parser\tlv;..\..\..\..\..\..\components\softdevice\common;..\..\..\..\..\..\components\softdevice\s140\headers;..\..\..\..\..\..\components\softdevice\s140\headers\nrf52;..\..\..\..\..\..\external\fprintf;..\..\..\..\..\..\external\segger_rtt;..\..\..\..\..\..\external\utf_converter;..\..\..\..\..\..\integration\nrfx;..\..\..\..\..\..\integration\nrfx\legacy;..\..\..\..\..\..\modules\nrfx;..\..\..\..\..\..\modules\nrfx\drivers\include;..\..\..\..\..\..\modules\nrfx\hal;..\config;..\..\..\..\ble_app_bladder_patch;..\..\..\..\..\..\components\libraries\bootloader\dfu;..\..\..\..\..\..\components\libraries\bootloader;..\..\..\..\..\..\modules\nrfx\drivers\src;..\..\..\measurement\imu;..\..\..\measurement\imu\Invn;..\..\..\measurement\imu\Invn\EmbUtils;..\..\..\measurement\imu\Invn\imu;..\..\..\measurement\imu\Invn\lib_agm;..\..\..\measurement\imu\Invn\lib_agm\invn\common;..\..\..\measurement\imu\Invn\lib_agm\test_vector;..\..\..\..\..\..\integration\nrfx\legacy;..\..\..\measurement\imu\app_raw;..\..\..\..\..\..\components\libraries\crypto\backend\cc310;..\..\..\..\..\..\components\libraries\crypto\backend\cc310_bl;..\..\..\..\..\..\components\libraries\crypto\backend\cifra;..\..\..\..\..\..\components\libraries\crypto\backend\mbedtls;..\..\..\..\..\..\components\libraries\crypto\backend\micro_ecc;..\..\..\..\..\..\components\libraries\crypto\backend\nrf_hw;..\..\..\..\..\..\components\libraries\crypto\backend\nrf_sw;..\..\..\..\..\..\components\libraries\crypto\backend\oberon;..\..\..\..\..\..\components\libraries\crypto\backend\optiga;..\..\..\..\..\..\external\nrf_cc310\include;..\..\..\..\..\..\external\mbedtls\include;..\..\..\..\..\..\external\nrf_oberon;..\..\..\..\..\..\external\nrf_oberon\include;..\..\..\..\..\..\external\nrf_tls\mbedtls\nrf_crypto\config;..\..\..\..\..\..\components\libraries\stack_info;..\..\..\..\..\..\pc_firm\ble_security;..\..\..\..\..\..\pc_firm;..\..\..\..\dr_piezo;..\..\..\..\..\..\pc_firm\dr_util;..\..\..\..\..\..\pc_firm\dr_adc121s051;..\..\..\measurement\battery;..\..\..\measurement\temperature;..\..\..\system\led;..\..\..\system\power;..\..\..\hal\i2c;..\..\..\hal\fds;..\..\..\system @@ -396,37 +396,37 @@ main_timer.c 1 - ..\..\..\main_timer.c + ..\..\..\system\main_timer.c battery_saadc.c 1 - ..\..\..\battery_saadc.c + ..\..\..\measurement\battery\battery_saadc.c power_control.c 1 - ..\..\..\power_control.c + ..\..\..\system\power\power_control.c tmp235_q1.c 1 - ..\..\..\tmp235_q1.c + ..\..\..\measurement\temperature\tmp235_q1.c fstorage.c 1 - ..\..\..\fstorage.c + ..\..\..\hal\fds\fstorage.c debug_print.h 5 - ..\..\..\debug_print.h + ..\..\..\system\debug_print.h i2c_manager.c 1 - ..\..\..\i2c_manager.c + ..\..\..\hal\i2c\i2c_manager.c parser.h @@ -476,7 +476,7 @@ led_control.c 1 - ..\..\..\led_control.c + ..\..\..\system\led\led_control.c @@ -4138,52 +4138,52 @@ system_interface.c 1 - ..\..\..\icm42670p\system_interface.c + ..\..\..\measurement\imu\system_interface.c DataConverter.c 1 - ..\..\..\icm42670p\Invn\EmbUtils\DataConverter.c + ..\..\..\measurement\imu\Invn\EmbUtils\DataConverter.c ErrorHelper.c 1 - ..\..\..\icm42670p\Invn\EmbUtils\ErrorHelper.c + ..\..\..\measurement\imu\Invn\EmbUtils\ErrorHelper.c InvBasicMath.c 1 - ..\..\..\icm42670p\Invn\EmbUtils\InvBasicMath.c + ..\..\..\measurement\imu\Invn\EmbUtils\InvBasicMath.c inv_imu_apex.c 1 - ..\..\..\icm42670p\Invn\imu\inv_imu_apex.c + ..\..\..\measurement\imu\Invn\imu\inv_imu_apex.c inv_imu_driver.c 1 - ..\..\..\icm42670p\Invn\imu\inv_imu_driver.c + ..\..\..\measurement\imu\Invn\imu\inv_imu_driver.c inv_imu_selftest.c 1 - ..\..\..\icm42670p\Invn\imu\inv_imu_selftest.c + ..\..\..\measurement\imu\Invn\imu\inv_imu_selftest.c inv_imu_transport.c 1 - ..\..\..\icm42670p\Invn\imu\inv_imu_transport.c + ..\..\..\measurement\imu\Invn\imu\inv_imu_transport.c app_raw.c 1 - ..\..\..\icm42670p\app_raw\app_raw.c + ..\..\..\measurement\imu\app_raw\app_raw.c app_raw_main.c 1 - ..\..\..\icm42670p\app_raw\app_raw_main.c + ..\..\..\measurement\imu\app_raw\app_raw_main.c @@ -4584,37 +4584,37 @@ main_timer.c 1 - ..\..\..\main_timer.c + ..\..\..\system\main_timer.c battery_saadc.c 1 - ..\..\..\battery_saadc.c + ..\..\..\measurement\battery\battery_saadc.c power_control.c 1 - ..\..\..\power_control.c + ..\..\..\system\power\power_control.c tmp235_q1.c 1 - ..\..\..\tmp235_q1.c + ..\..\..\measurement\temperature\tmp235_q1.c fstorage.c 1 - ..\..\..\fstorage.c + ..\..\..\hal\fds\fstorage.c debug_print.h 5 - ..\..\..\debug_print.h + ..\..\..\system\debug_print.h i2c_manager.c 1 - ..\..\..\i2c_manager.c + ..\..\..\hal\i2c\i2c_manager.c parser.h @@ -4664,7 +4664,7 @@ led_control.c 1 - ..\..\..\led_control.c + ..\..\..\system\led\led_control.c @@ -8326,52 +8326,52 @@ system_interface.c 1 - ..\..\..\icm42670p\system_interface.c + ..\..\..\measurement\imu\system_interface.c DataConverter.c 1 - ..\..\..\icm42670p\Invn\EmbUtils\DataConverter.c + ..\..\..\measurement\imu\Invn\EmbUtils\DataConverter.c ErrorHelper.c 1 - ..\..\..\icm42670p\Invn\EmbUtils\ErrorHelper.c + ..\..\..\measurement\imu\Invn\EmbUtils\ErrorHelper.c InvBasicMath.c 1 - ..\..\..\icm42670p\Invn\EmbUtils\InvBasicMath.c + ..\..\..\measurement\imu\Invn\EmbUtils\InvBasicMath.c inv_imu_apex.c 1 - ..\..\..\icm42670p\Invn\imu\inv_imu_apex.c + ..\..\..\measurement\imu\Invn\imu\inv_imu_apex.c inv_imu_driver.c 1 - ..\..\..\icm42670p\Invn\imu\inv_imu_driver.c + ..\..\..\measurement\imu\Invn\imu\inv_imu_driver.c inv_imu_selftest.c 1 - ..\..\..\icm42670p\Invn\imu\inv_imu_selftest.c + ..\..\..\measurement\imu\Invn\imu\inv_imu_selftest.c inv_imu_transport.c 1 - ..\..\..\icm42670p\Invn\imu\inv_imu_transport.c + ..\..\..\measurement\imu\Invn\imu\inv_imu_transport.c app_raw.c 1 - ..\..\..\icm42670p\app_raw\app_raw.c + ..\..\..\measurement\imu\app_raw\app_raw.c app_raw_main.c 1 - ..\..\..\icm42670p\app_raw\app_raw_main.c + ..\..\..\measurement\imu\app_raw\app_raw_main.c diff --git a/project/ble_peripheral/ble_app_bladder_patch/debug_print.h b/project/ble_peripheral/ble_app_bladder_patch/system/debug_print.h similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/debug_print.h rename to project/ble_peripheral/ble_app_bladder_patch/system/debug_print.h index 886cc96..f2519fe 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/debug_print.h +++ b/project/ble_peripheral/ble_app_bladder_patch/system/debug_print.h @@ -1,33 +1,33 @@ -// file: debug_print.h -/******************************************************************************* - * [한국어 설명] 디버그 출력 매크로 (조건부 컴파일) - * - * SEGGER RTT(Real Time Transfer)를 이용한 디버그 출력 매크로. - * J-Link 디버거를 통해 실시간으로 로그를 PC에 전송한다. - * UART를 사용하지 않으므로 시스템 타이밍에 미치는 영향이 적다. - * - * === 조건부 컴파일 === - * ENABLE_PRINTF = 1: DBG_PRINTF가 SEGGER_RTT_printf(채널0)로 치환됨 - * -> 실제 로그 출력 (디버깅 시 사용) - * ENABLE_PRINTF = 0: DBG_PRINTF가 빈 매크로로 치환됨 - * -> 코드에서 완전히 제거 (릴리스 빌드 시 사용) - * - * === 사용법 === - * DBG_PRINTF("값: %d\r\n", value); // printf와 동일한 포맷 문자열 - * 출력은 SEGGER RTT Viewer 또는 J-Link RTT Client에서 확인. - ******************************************************************************/ -#ifndef DEBUG_PRINT_H -#define DEBUG_PRINT_H - -#define ENABLE_PRINTF 1 /* 1=디버그 출력 활성화, 0=전역 비활성화 */ - -#if ENABLE_PRINTF - #include "SEGGER_RTT.h" - /* SEGGER RTT 채널 0으로 포맷 문자열 출력 */ - #define DBG_PRINTF(...) SEGGER_RTT_printf(0, __VA_ARGS__) -#else - /* 빈 매크로: 컴파일러가 호출 코드를 완전히 제거 */ - #define DBG_PRINTF(...) // Do nothing -#endif - -#endif // DEBUG_PRINT_H +// file: debug_print.h +/******************************************************************************* + * [한국어 설명] 디버그 출력 매크로 (조건부 컴파일) + * + * SEGGER RTT(Real Time Transfer)를 이용한 디버그 출력 매크로. + * J-Link 디버거를 통해 실시간으로 로그를 PC에 전송한다. + * UART를 사용하지 않으므로 시스템 타이밍에 미치는 영향이 적다. + * + * === 조건부 컴파일 === + * ENABLE_PRINTF = 1: DBG_PRINTF가 SEGGER_RTT_printf(채널0)로 치환됨 + * -> 실제 로그 출력 (디버깅 시 사용) + * ENABLE_PRINTF = 0: DBG_PRINTF가 빈 매크로로 치환됨 + * -> 코드에서 완전히 제거 (릴리스 빌드 시 사용) + * + * === 사용법 === + * DBG_PRINTF("값: %d\r\n", value); // printf와 동일한 포맷 문자열 + * 출력은 SEGGER RTT Viewer 또는 J-Link RTT Client에서 확인. + ******************************************************************************/ +#ifndef DEBUG_PRINT_H +#define DEBUG_PRINT_H + +#define ENABLE_PRINTF 1 /* 1=디버그 출력 활성화, 0=전역 비활성화 */ + +#if ENABLE_PRINTF + #include "SEGGER_RTT.h" + /* SEGGER RTT 채널 0으로 포맷 문자열 출력 */ + #define DBG_PRINTF(...) SEGGER_RTT_printf(0, __VA_ARGS__) +#else + /* 빈 매크로: 컴파일러가 호출 코드를 완전히 제거 */ + #define DBG_PRINTF(...) // Do nothing +#endif + +#endif // DEBUG_PRINT_H diff --git a/project/ble_peripheral/ble_app_bladder_patch/led_control.c b/project/ble_peripheral/ble_app_bladder_patch/system/led/led_control.c similarity index 100% rename from project/ble_peripheral/ble_app_bladder_patch/led_control.c rename to project/ble_peripheral/ble_app_bladder_patch/system/led/led_control.c diff --git a/project/ble_peripheral/ble_app_bladder_patch/led_control.h b/project/ble_peripheral/ble_app_bladder_patch/system/led/led_control.h similarity index 100% rename from project/ble_peripheral/ble_app_bladder_patch/led_control.h rename to project/ble_peripheral/ble_app_bladder_patch/system/led/led_control.h diff --git a/project/ble_peripheral/ble_app_bladder_patch/main_timer.c b/project/ble_peripheral/ble_app_bladder_patch/system/main_timer.c similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/main_timer.c rename to project/ble_peripheral/ble_app_bladder_patch/system/main_timer.c index fbf1e92..1859128 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/main_timer.c +++ b/project/ble_peripheral/ble_app_bladder_patch/system/main_timer.c @@ -1,280 +1,280 @@ -/******************************************************************************* - TEST medi50 Dec 23 - ******************************************************************************* - * - * [모듈 개요] - * 메인 이벤트 루프 타이머 모듈 (10ms 간격, 싱글샷 모드). - * - * 센서 데이터 수집 및 시스템 제어 이벤트를 플래그 기반으로 디스패치한다. - * app_timer 싱글샷 모드를 사용하므로, 이벤트 처리 완료 후 - * 필요 시 main_timer_start()로 수동 재시작해야 한다. - * - * [이벤트 플래그 및 처리 순서] - * motion_raw_data_enabled → IMU 데이터 읽기 (icm42670_main 호출) - * - motion_data_once == true: 단발성 읽기 (HW I2C 초기화 후 1회) - * - motion_data_once == false: 연속 읽기 (BLE 전송 대기 중이 아닐 때) - * go_batt → 배터리 전압 측정 (battery_level_meas) - * go_temp → 온도 측정 (tmp235_voltage_level_meas) - * go_device_power_off → 디바이스 전원 OFF (device_power_off) - * go_sleep_mode_enter → 슬립 모드 진입 (sleep_mode_enter) - * go_NVIC_SystemReset → NVIC 시스템 리셋 - * - * [info4 모드 측정 순서] - * IMU 연속 읽기 → go_batt(배터리) → go_temp(온도) → motion_data_once(IMU 단발) - * 온도 측정 완료 시 motion_data_once=true로 설정하여 다시 IMU로 돌아간다. - * - * [타이머 설정] - * - 일반 모드: 10ms 간격 (MAIN_LOOP_INTERVAL) - * - FEATURE_DETAIL_VALUE_FULL 모드: 80ms 간격 (디테일 프린트아웃용) - * - ******************************************************************************/ - -#include "sdk_common.h" - -#include -#include -#include -#include -#include "nrf.h" -#include "nrf_drv_saadc.h" -#include "nrf_drv_ppi.h" -#include "nrf_drv_timer.h" -#include "boards.h" -#include "app_error.h" -#include "nrf_delay.h" -#include "app_util_platform.h" -#include "nrf_pwr_mgmt.h" - -#include "nrf_log.h" -#include "nrf_drv_gpiote.h" -#include "battery_saadc.h" -#include "app_timer.h" - -#include "main.h" -#include "app_raw_main.h" -#include "main_timer.h" -#include "tmp235_q1.h" -//#include "fstorage.h" -#include "power_control.h" -#include "main.h" /* 2026-03-17: cmd_parse.h 삭제 → main.h */ -#include "debug_print.h" -#include "i2c_manager.h" //add cj - -/* 메인 루프 싱글샷 타이머 인스턴스 */ -APP_TIMER_DEF(m_main_loop_timer_id); - -#if FEATURE_DETAIL_VALUE_FULL -/* 디테일 프린트아웃 모드: 80ms 간격으로 메인 루프 실행 */ -#define MAIN_LOOP_INTERVAL 80 /* 디테일 프린트아웃이 있을경우 Full_Mode Main Prosessing 수행하는 타이머 */ - -//extern bool pd_adc_full_a_start; -//extern bool pd_adc_full_b_start; -//extern bool pd_adc_full_c_start; -//extern bool pd_adc_full_d_start; -//extern bool pd_adc_full_end; - -extern which_cmd_t cmd_type_t; -#else -/* 일반 모드: 10ms 간격으로 메인 루프 실행 */ -#define MAIN_LOOP_INTERVAL 10 -#endif - -/* ========================================================================== */ -/* 이벤트 플래그 (외부 모듈에서 설정, main_loop에서 처리) */ -/* ========================================================================== */ -bool go_batt= false; /* 배터리 측정 요청 플래그 */ -bool go_temp= false; /* 온도 측정 요청 플래그 */ -bool go_device_power_off = false; /* 디바이스 전원 OFF 요청 플래그 */ -bool go_sleep_mode_enter = false; /* 슬립 모드 진입 요청 플래그 */ -bool go_NVIC_SystemReset = false; /* 시스템 리셋 요청 플래그 */ -bool motion_raw_data_enabled = false; /* IMU 모션 데이터 읽기 활성화 플래그 */ -bool ble_got_new_data = false; /* BLE로 새 데이터 전송 완료 여부 */ -bool motion_data_once = false; /* IMU 단발성 읽기 모드 (true: 1회만 읽기) */ - -/** - * @brief 메인 이벤트 루프 (싱글샷 타이머 콜백) - * - * 플래그 기반 이벤트 디스패처로, 설정된 플래그에 따라 해당 처리를 수행한다. - * 싱글샷 타이머이므로 연속 실행이 필요한 경우 처리 내부에서 main_timer_start()를 - * 다시 호출하여 타이머를 재시작해야 한다. - * - * [처리 우선순위] (코드 순서대로 검사) - * 1. IMU 모션 데이터 (motion_raw_data_enabled) - * 2. 배터리 측정 (go_batt) - * 3. 온도 측정 (go_temp) - * 4. 전원 OFF (go_device_power_off) - * 5. 슬립 모드 (go_sleep_mode_enter) - * 6. 시스템 리셋 (go_NVIC_SystemReset) - */ -void main_loop(void * p_context) /* For x ms */ -{ - UNUSED_PARAMETER(p_context); - -#if FEATURE_DETAIL_VALUE_FULL -// if(pd_adc_full_a_start == true) { // A mode -// main_timer_stop(); -// printf("main_loop_A\r\n"); -// full_adc_start(); -// }else if(pd_adc_full_b_start == true) { // B mode -// main_timer_stop(); -// printf("main_loop_B\r\n"); -// full_adc_start(); -// }else if(pd_adc_full_c_start == true) { // C mode -// main_timer_stop(); -// printf("main_loop_C\r\n"); -// full_adc_start(); -// }else if(pd_adc_full_d_start == true) { // D mode -// main_timer_stop(); -// printf("main_loop_D\r\n"); -// full_adc_start(); -// }else if(pd_adc_full_end == true) { // Completed -// pd_adc_full_end = false; -// main_timer_stop(); -// printf("main_loop_END\r\n"); - -// if(cmd_type_t == CMD_BLE) { -// full_send_timer_start(); -// } -// } -#endif - - // For Motion Data Sampling - - /* ---- IMU 모션 데이터 읽기 ---- */ - /* - * motion_raw_data_enabled가 true이면 IMU(ICM42670P) 데이터를 읽는다. - * - * motion_data_once == true: - * 단발성 읽기 모드. HW I2C를 초기화한 후 icm42670_main()을 1회 호출. - * info4 모드에서 배터리/온도 측정 후 다시 IMU로 돌아올 때 사용. - * - * motion_data_once == false: - * 연속 읽기 모드. BLE 전송 대기 중(ble_got_new_data==false)이면 - * icm42670_main()을 호출하고 10ms 후 타이머를 재시작하여 반복 실행. - */ - if(motion_raw_data_enabled == true) { - main_timer_stop(); /* 타이머 정지 (재진입 방지) */ - if(motion_data_once == true) - { - /* 단발성 모드: HW I2C 초기화 후 IMU 데이터 1회 읽기 */ - hw_i2c_init_once(); /* HW TWI 모드로 전환 (400kHz) */ - icm42670_main(); /* IMU 데이터 읽기 및 처리 */ - } - else{ - /* 연속 모드: BLE 전송 대기 중이 아니면 반복 읽기 */ - if(ble_got_new_data==false){ - //for(uint16_t i=0 ; i<60 ;i++) - //{ - DBG_PRINTF("IMU \r\n"); - - icm42670_main(); /* IMU 데이터 읽기 */ - motion_raw_data_enabled = true; /* 플래그 유지 (연속 읽기) */ - main_timer_start_ms(1000); /* 1초 후 다음 IMU 읽기 */ - } -// else if(ble_got_new_data==true){ -// motion_data_once = true; -// } - } - } - - - /* ---- 배터리 전압 측정 ---- */ - /* - * go_batt 플래그가 true이면 배터리 레벨을 측정한다. - * info4 모드에서 IMU 연속 읽기 이후 호출되는 단계. - * 측정 완료 후 타이머가 정지된 상태로 유지된다. - */ - if(go_batt == true) { - DBG_PRINTF("IMU BATT\r\n"); - main_timer_stop(); /* 타이머 정지 */ - go_batt = false; /* 플래그 소비 (1회 실행) */ -// go_temp = true; - battery_level_meas(); /* SAADC를 이용한 배터리 전압 측정 */ -// nrf_delay_ms(20); -// m48_adc_start_init(); -// main_timer_start(); - } - - - /* ---- 온도 측정 ---- */ - /* - * go_temp 플래그가 true이면 TMP235-Q1 센서로 온도를 측정한다. - * info4 모드에서 배터리 측정 이후 호출되는 단계. - * 측정 완료 후 motion_data_once=true로 설정하여 - * 다음 IMU 읽기는 단발성 모드(HW I2C 재초기화)로 전환된다. - */ - if(go_temp == true) { - DBG_PRINTF("IMU Temp\r\n"); - main_timer_stop(); /* 타이머 정지 */ -// go_batt = false; - go_temp = false; /* 플래그 소비 (1회 실행) */ - motion_data_once = true; /* 다음 IMU 읽기를 단발성 모드로 전환 */ - tmp235_voltage_level_meas(); /* TMP235-Q1 온도 센서 전압 측정 */ -// motion_raw_data_enabled = true; -// main_timer_start(); - - } - - /* ---- 시스템 제어 이벤트 처리 ---- */ - - /* 디바이스 전원 OFF 처리 */ - if(go_device_power_off == true){ - main_timer_stop(); /* 타이머 정지 */ - DBG_PRINTF("Off main_timer\r\n"); - device_power_off(); /* 디바이스 전원 OFF 실행 */ - } - - /* 슬립 모드 진입 처리 */ - if(go_sleep_mode_enter == true){ - main_timer_stop(); /* 타이머 정지 */ - DBG_PRINTF("sleep main timer\r\n"); - sleep_mode_enter(); /* 슬립 모드 진입 실행 */ - } - - /* NVIC 시스템 리셋 처리 */ - if(go_NVIC_SystemReset == true) { - main_timer_stop(); /* 타이머 정지 */ - NVIC_SystemReset(); /* ARM Cortex-M4 시스템 리셋 */ - } -} - - -/** - * @brief 메인 루프 타이머 시작 - * - * 싱글샷 모드로 MAIN_LOOP_INTERVAL(10ms 또는 80ms) 후 main_loop()를 호출 - */ -void main_timer_start(void) -{ - APP_ERROR_CHECK(app_timer_start(m_main_loop_timer_id, APP_TIMER_TICKS(MAIN_LOOP_INTERVAL), NULL)); -} - -/** - * @brief 지정된 간격(ms)으로 메인 루프 타이머 시작 - * - * IMU 연속 스트리밍 등 기본 간격과 다른 주기가 필요할 때 사용 - */ -void main_timer_start_ms(uint32_t interval_ms) -{ - APP_ERROR_CHECK(app_timer_start(m_main_loop_timer_id, APP_TIMER_TICKS(interval_ms), NULL)); -} - -/** - * @brief 메인 루프 타이머 정지 - */ -void main_timer_stop(void) -{ - APP_ERROR_CHECK(app_timer_stop(m_main_loop_timer_id)); -} - -/** - * @brief 메인 루프 타이머 초기화 (앱 시작 시 1회 호출) - * - * 싱글샷 모드 타이머를 생성하고, 콜백으로 main_loop()를 등록 - * 싱글샷이므로 매 호출마다 main_timer_start()로 수동 재시작해야 함 - */ -void main_timer_init(void) -{ - APP_ERROR_CHECK(app_timer_create(&m_main_loop_timer_id, APP_TIMER_MODE_SINGLE_SHOT, main_loop)); -} - +/******************************************************************************* + TEST medi50 Dec 23 + ******************************************************************************* + * + * [모듈 개요] + * 메인 이벤트 루프 타이머 모듈 (10ms 간격, 싱글샷 모드). + * + * 센서 데이터 수집 및 시스템 제어 이벤트를 플래그 기반으로 디스패치한다. + * app_timer 싱글샷 모드를 사용하므로, 이벤트 처리 완료 후 + * 필요 시 main_timer_start()로 수동 재시작해야 한다. + * + * [이벤트 플래그 및 처리 순서] + * motion_raw_data_enabled → IMU 데이터 읽기 (icm42670_main 호출) + * - motion_data_once == true: 단발성 읽기 (HW I2C 초기화 후 1회) + * - motion_data_once == false: 연속 읽기 (BLE 전송 대기 중이 아닐 때) + * go_batt → 배터리 전압 측정 (battery_level_meas) + * go_temp → 온도 측정 (tmp235_voltage_level_meas) + * go_device_power_off → 디바이스 전원 OFF (device_power_off) + * go_sleep_mode_enter → 슬립 모드 진입 (sleep_mode_enter) + * go_NVIC_SystemReset → NVIC 시스템 리셋 + * + * [info4 모드 측정 순서] + * IMU 연속 읽기 → go_batt(배터리) → go_temp(온도) → motion_data_once(IMU 단발) + * 온도 측정 완료 시 motion_data_once=true로 설정하여 다시 IMU로 돌아간다. + * + * [타이머 설정] + * - 일반 모드: 10ms 간격 (MAIN_LOOP_INTERVAL) + * - FEATURE_DETAIL_VALUE_FULL 모드: 80ms 간격 (디테일 프린트아웃용) + * + ******************************************************************************/ + +#include "sdk_common.h" + +#include +#include +#include +#include +#include "nrf.h" +#include "nrf_drv_saadc.h" +#include "nrf_drv_ppi.h" +#include "nrf_drv_timer.h" +#include "boards.h" +#include "app_error.h" +#include "nrf_delay.h" +#include "app_util_platform.h" +#include "nrf_pwr_mgmt.h" + +#include "nrf_log.h" +#include "nrf_drv_gpiote.h" +#include "battery_saadc.h" +#include "app_timer.h" + +#include "main.h" +#include "app_raw_main.h" +#include "main_timer.h" +#include "tmp235_q1.h" +//#include "fstorage.h" +#include "power_control.h" +#include "main.h" /* 2026-03-17: cmd_parse.h 삭제 → main.h */ +#include "debug_print.h" +#include "i2c_manager.h" //add cj + +/* 메인 루프 싱글샷 타이머 인스턴스 */ +APP_TIMER_DEF(m_main_loop_timer_id); + +#if FEATURE_DETAIL_VALUE_FULL +/* 디테일 프린트아웃 모드: 80ms 간격으로 메인 루프 실행 */ +#define MAIN_LOOP_INTERVAL 80 /* 디테일 프린트아웃이 있을경우 Full_Mode Main Prosessing 수행하는 타이머 */ + +//extern bool pd_adc_full_a_start; +//extern bool pd_adc_full_b_start; +//extern bool pd_adc_full_c_start; +//extern bool pd_adc_full_d_start; +//extern bool pd_adc_full_end; + +extern which_cmd_t cmd_type_t; +#else +/* 일반 모드: 10ms 간격으로 메인 루프 실행 */ +#define MAIN_LOOP_INTERVAL 10 +#endif + +/* ========================================================================== */ +/* 이벤트 플래그 (외부 모듈에서 설정, main_loop에서 처리) */ +/* ========================================================================== */ +bool go_batt= false; /* 배터리 측정 요청 플래그 */ +bool go_temp= false; /* 온도 측정 요청 플래그 */ +bool go_device_power_off = false; /* 디바이스 전원 OFF 요청 플래그 */ +bool go_sleep_mode_enter = false; /* 슬립 모드 진입 요청 플래그 */ +bool go_NVIC_SystemReset = false; /* 시스템 리셋 요청 플래그 */ +bool motion_raw_data_enabled = false; /* IMU 모션 데이터 읽기 활성화 플래그 */ +bool ble_got_new_data = false; /* BLE로 새 데이터 전송 완료 여부 */ +bool motion_data_once = false; /* IMU 단발성 읽기 모드 (true: 1회만 읽기) */ + +/** + * @brief 메인 이벤트 루프 (싱글샷 타이머 콜백) + * + * 플래그 기반 이벤트 디스패처로, 설정된 플래그에 따라 해당 처리를 수행한다. + * 싱글샷 타이머이므로 연속 실행이 필요한 경우 처리 내부에서 main_timer_start()를 + * 다시 호출하여 타이머를 재시작해야 한다. + * + * [처리 우선순위] (코드 순서대로 검사) + * 1. IMU 모션 데이터 (motion_raw_data_enabled) + * 2. 배터리 측정 (go_batt) + * 3. 온도 측정 (go_temp) + * 4. 전원 OFF (go_device_power_off) + * 5. 슬립 모드 (go_sleep_mode_enter) + * 6. 시스템 리셋 (go_NVIC_SystemReset) + */ +void main_loop(void * p_context) /* For x ms */ +{ + UNUSED_PARAMETER(p_context); + +#if FEATURE_DETAIL_VALUE_FULL +// if(pd_adc_full_a_start == true) { // A mode +// main_timer_stop(); +// printf("main_loop_A\r\n"); +// full_adc_start(); +// }else if(pd_adc_full_b_start == true) { // B mode +// main_timer_stop(); +// printf("main_loop_B\r\n"); +// full_adc_start(); +// }else if(pd_adc_full_c_start == true) { // C mode +// main_timer_stop(); +// printf("main_loop_C\r\n"); +// full_adc_start(); +// }else if(pd_adc_full_d_start == true) { // D mode +// main_timer_stop(); +// printf("main_loop_D\r\n"); +// full_adc_start(); +// }else if(pd_adc_full_end == true) { // Completed +// pd_adc_full_end = false; +// main_timer_stop(); +// printf("main_loop_END\r\n"); + +// if(cmd_type_t == CMD_BLE) { +// full_send_timer_start(); +// } +// } +#endif + + // For Motion Data Sampling + + /* ---- IMU 모션 데이터 읽기 ---- */ + /* + * motion_raw_data_enabled가 true이면 IMU(ICM42670P) 데이터를 읽는다. + * + * motion_data_once == true: + * 단발성 읽기 모드. HW I2C를 초기화한 후 icm42670_main()을 1회 호출. + * info4 모드에서 배터리/온도 측정 후 다시 IMU로 돌아올 때 사용. + * + * motion_data_once == false: + * 연속 읽기 모드. BLE 전송 대기 중(ble_got_new_data==false)이면 + * icm42670_main()을 호출하고 10ms 후 타이머를 재시작하여 반복 실행. + */ + if(motion_raw_data_enabled == true) { + main_timer_stop(); /* 타이머 정지 (재진입 방지) */ + if(motion_data_once == true) + { + /* 단발성 모드: HW I2C 초기화 후 IMU 데이터 1회 읽기 */ + hw_i2c_init_once(); /* HW TWI 모드로 전환 (400kHz) */ + icm42670_main(); /* IMU 데이터 읽기 및 처리 */ + } + else{ + /* 연속 모드: BLE 전송 대기 중이 아니면 반복 읽기 */ + if(ble_got_new_data==false){ + //for(uint16_t i=0 ; i<60 ;i++) + //{ + DBG_PRINTF("IMU \r\n"); + + icm42670_main(); /* IMU 데이터 읽기 */ + motion_raw_data_enabled = true; /* 플래그 유지 (연속 읽기) */ + main_timer_start_ms(1000); /* 1초 후 다음 IMU 읽기 */ + } +// else if(ble_got_new_data==true){ +// motion_data_once = true; +// } + } + } + + + /* ---- 배터리 전압 측정 ---- */ + /* + * go_batt 플래그가 true이면 배터리 레벨을 측정한다. + * info4 모드에서 IMU 연속 읽기 이후 호출되는 단계. + * 측정 완료 후 타이머가 정지된 상태로 유지된다. + */ + if(go_batt == true) { + DBG_PRINTF("IMU BATT\r\n"); + main_timer_stop(); /* 타이머 정지 */ + go_batt = false; /* 플래그 소비 (1회 실행) */ +// go_temp = true; + battery_level_meas(); /* SAADC를 이용한 배터리 전압 측정 */ +// nrf_delay_ms(20); +// m48_adc_start_init(); +// main_timer_start(); + } + + + /* ---- 온도 측정 ---- */ + /* + * go_temp 플래그가 true이면 TMP235-Q1 센서로 온도를 측정한다. + * info4 모드에서 배터리 측정 이후 호출되는 단계. + * 측정 완료 후 motion_data_once=true로 설정하여 + * 다음 IMU 읽기는 단발성 모드(HW I2C 재초기화)로 전환된다. + */ + if(go_temp == true) { + DBG_PRINTF("IMU Temp\r\n"); + main_timer_stop(); /* 타이머 정지 */ +// go_batt = false; + go_temp = false; /* 플래그 소비 (1회 실행) */ + motion_data_once = true; /* 다음 IMU 읽기를 단발성 모드로 전환 */ + tmp235_voltage_level_meas(); /* TMP235-Q1 온도 센서 전압 측정 */ +// motion_raw_data_enabled = true; +// main_timer_start(); + + } + + /* ---- 시스템 제어 이벤트 처리 ---- */ + + /* 디바이스 전원 OFF 처리 */ + if(go_device_power_off == true){ + main_timer_stop(); /* 타이머 정지 */ + DBG_PRINTF("Off main_timer\r\n"); + device_power_off(); /* 디바이스 전원 OFF 실행 */ + } + + /* 슬립 모드 진입 처리 */ + if(go_sleep_mode_enter == true){ + main_timer_stop(); /* 타이머 정지 */ + DBG_PRINTF("sleep main timer\r\n"); + sleep_mode_enter(); /* 슬립 모드 진입 실행 */ + } + + /* NVIC 시스템 리셋 처리 */ + if(go_NVIC_SystemReset == true) { + main_timer_stop(); /* 타이머 정지 */ + NVIC_SystemReset(); /* ARM Cortex-M4 시스템 리셋 */ + } +} + + +/** + * @brief 메인 루프 타이머 시작 + * + * 싱글샷 모드로 MAIN_LOOP_INTERVAL(10ms 또는 80ms) 후 main_loop()를 호출 + */ +void main_timer_start(void) +{ + APP_ERROR_CHECK(app_timer_start(m_main_loop_timer_id, APP_TIMER_TICKS(MAIN_LOOP_INTERVAL), NULL)); +} + +/** + * @brief 지정된 간격(ms)으로 메인 루프 타이머 시작 + * + * IMU 연속 스트리밍 등 기본 간격과 다른 주기가 필요할 때 사용 + */ +void main_timer_start_ms(uint32_t interval_ms) +{ + APP_ERROR_CHECK(app_timer_start(m_main_loop_timer_id, APP_TIMER_TICKS(interval_ms), NULL)); +} + +/** + * @brief 메인 루프 타이머 정지 + */ +void main_timer_stop(void) +{ + APP_ERROR_CHECK(app_timer_stop(m_main_loop_timer_id)); +} + +/** + * @brief 메인 루프 타이머 초기화 (앱 시작 시 1회 호출) + * + * 싱글샷 모드 타이머를 생성하고, 콜백으로 main_loop()를 등록 + * 싱글샷이므로 매 호출마다 main_timer_start()로 수동 재시작해야 함 + */ +void main_timer_init(void) +{ + APP_ERROR_CHECK(app_timer_create(&m_main_loop_timer_id, APP_TIMER_MODE_SINGLE_SHOT, main_loop)); +} + diff --git a/project/ble_peripheral/ble_app_bladder_patch/main_timer.h b/project/ble_peripheral/ble_app_bladder_patch/system/main_timer.h similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/main_timer.h rename to project/ble_peripheral/ble_app_bladder_patch/system/main_timer.h index e0a7e21..4192dfc 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/main_timer.h +++ b/project/ble_peripheral/ble_app_bladder_patch/system/main_timer.h @@ -1,37 +1,37 @@ -/******************************************************************************* - * @file timer_routine.h - * @author CandyPops Co. - * @version V1.0.0 - * @date 2022-09-05 - * @brief - ******************************************************************************* - * - * [헤더 개요] - * 메인 이벤트 루프 타이머의 공용 인터페이스 헤더. - * - * 10ms(일반) 또는 80ms(디테일) 간격의 싱글샷 타이머를 사용하여 - * main_loop() 콜백에서 센서 데이터 수집 및 시스템 제어를 수행한다. - * - * [주요 함수] - * main_timer_start() : 타이머 시작 (싱글샷, 수동 재시작 필요) - * main_timer_stop() : 타이머 정지 - * main_timer_init() : 타이머 초기화 (앱 시작 시 1회 호출) - * - ******************************************************************************/ - -#ifndef TIMER_ROUTINE_H__ -#define TIMER_ROUTINE_H__ - -/** @brief 메인 루프 타이머 시작 (싱글샷, MAIN_LOOP_INTERVAL 후 main_loop 호출) */ -void main_timer_start(void); - -/** @brief 지정된 간격(ms)으로 메인 루프 타이머 시작 */ -void main_timer_start_ms(uint32_t interval_ms); - -/** @brief 메인 루프 타이머 정지 */ -void main_timer_stop(void); - -/** @brief 메인 루프 타이머 초기화 (앱 시작 시 1회, 싱글샷 모드로 생성) */ -void main_timer_init(void); - -#endif //TIMER_ROUTINE_H__ +/******************************************************************************* + * @file timer_routine.h + * @author CandyPops Co. + * @version V1.0.0 + * @date 2022-09-05 + * @brief + ******************************************************************************* + * + * [헤더 개요] + * 메인 이벤트 루프 타이머의 공용 인터페이스 헤더. + * + * 10ms(일반) 또는 80ms(디테일) 간격의 싱글샷 타이머를 사용하여 + * main_loop() 콜백에서 센서 데이터 수집 및 시스템 제어를 수행한다. + * + * [주요 함수] + * main_timer_start() : 타이머 시작 (싱글샷, 수동 재시작 필요) + * main_timer_stop() : 타이머 정지 + * main_timer_init() : 타이머 초기화 (앱 시작 시 1회 호출) + * + ******************************************************************************/ + +#ifndef TIMER_ROUTINE_H__ +#define TIMER_ROUTINE_H__ + +/** @brief 메인 루프 타이머 시작 (싱글샷, MAIN_LOOP_INTERVAL 후 main_loop 호출) */ +void main_timer_start(void); + +/** @brief 지정된 간격(ms)으로 메인 루프 타이머 시작 */ +void main_timer_start_ms(uint32_t interval_ms); + +/** @brief 메인 루프 타이머 정지 */ +void main_timer_stop(void); + +/** @brief 메인 루프 타이머 초기화 (앱 시작 시 1회, 싱글샷 모드로 생성) */ +void main_timer_init(void); + +#endif //TIMER_ROUTINE_H__ diff --git a/project/ble_peripheral/ble_app_bladder_patch/power_control.c b/project/ble_peripheral/ble_app_bladder_patch/system/power/power_control.c similarity index 96% rename from project/ble_peripheral/ble_app_bladder_patch/power_control.c rename to project/ble_peripheral/ble_app_bladder_patch/system/power/power_control.c index de5115f..7a52cd3 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/power_control.c +++ b/project/ble_peripheral/ble_app_bladder_patch/system/power/power_control.c @@ -1,189 +1,189 @@ -/******************************************************************************* - TEST medi50 Dec 23 - //=========power_control.c==================== - ******************************************************************************* - * - * [모듈 개요] - * 디바이스 전원 시퀀스를 관리하는 모듈 (전원 켜기 / 끄기 / 슬립). - * - * [전원 켜기 흐름] - * device_activated() - * → power_loop 타이머 시작 → 즉시 완료 (센서 초기화 불필요) - * → 센서(IMU)는 측정 명령 시 imu_read_direct()가 자체 처리 - * - * [슬립 모드] - * device_sleep_mode() - * → processing 플래그 해제 - * - * [재활성화] - * device_reactivated() - * → I2C 재초기화 후 전원 시퀀스를 처음부터 다시 시작 - * - * [타이머] - * 싱글샷 모드 app_timer, 20ms 간격으로 power_loop 호출 - * - ******************************************************************************/ -#include -#include -#include -#include -#include "main.h" -#include "power_control.h" -#include "nrf_delay.h" - - -#include "nrf_log.h" -#include "app_timer.h" -#include "debug_print.h" -#include "i2c_manager.h" - - -/* 전원 시퀀스용 싱글샷 타이머 인스턴스 */ -APP_TIMER_DEF(m_power_timer_id); - -/* 전원 시퀀스 상태머신의 타이머 간격 (20ms) */ -// 2025-12-08 change to #define POWER_LOOP_INTERVAL 30 -> 20 -#define POWER_LOOP_INTERVAL 20 - -/* 전원 시퀀스 현재 단계 (0: I2C 초기화, 1: 예약, 2: 완료) */ -static uint8_t p_order; - -/* 데이터 처리 중 플래그 (외부 모듈에서 선언) */ -extern volatile bool processing; - -/* 전원 시퀀스 잠금 플래그 (true = 전원 시퀀스 진행 중) */ -bool lock_check = false; - -/** - * @brief 디바이스 슬립 모드 진입 - * - * 데이터 처리 플래그(processing)를 해제하여 - * 메인 루프가 더 이상 센서 데이터를 처리하지 않도록 한다. - * - * @return 0 (항상 성공) - */ -int device_sleep_mode(void){ - int rc = 0; - nrf_delay_ms(2); - DBG_PRINTF("Device_Sleep_Mode OK!\r\n"); - nrf_delay_ms(10); - processing = false; /* 데이터 처리 플래그 해제 → 센서 처리 중단 */ - return rc; -} - - -/** - * @brief 디바이스 전원 켜기 (전원 시퀀스 시작) - * - * 전원 시퀀스 단계를 0으로 초기화하고, 잠금 플래그를 설정한 뒤 - * 타이머를 시작하여 power_loop() 상태머신을 구동한다. - * - * @return 0 (항상 성공) - */ -int device_activated(void){ - int rc = 0; - p_order = 0; /* 상태머신 시작 단계 (Step 0: I2C 초기화) */ - lock_check =true; /* 전원 시퀀스 진행 중 잠금 */ - power_timer_start(); /* 20ms 후 power_loop() 첫 호출 */ - - return rc; -} - -/** - * @brief Power-up sequence state machine - * - * Executes hardware initialization steps - * Called by app_timer at POWER_LOOP_INTERVAL (20ms) - * - * Sequence: - * 0: I2C init - * 1: (reserved) - * 2: Complete - */ -/* - * 전원 시퀀스 상태머신 (20ms 싱글샷 타이머 콜백). - * - * [실행 흐름] - * 1) 타이머 콜백 진입 → 타이머 정지 (싱글샷이므로) - * 2) 현재 p_order에 해당하는 초기화 단계 실행 - * 3) p_order < 2이면 다음 단계로 진행하고 타이머 재시작 - * 4) p_order == 2이면 전원 시퀀스 완료 - * - * 센서 초기화 불필요 — imu_read_direct()가 매 측정 시 자체 처리 - */ -void power_loop(void *p_context) -{ - UNUSED_PARAMETER(p_context); - - power_timer_stop(); /* 현재 타이머 정지 (싱글샷 → 수동 재시작 필요) */ - - /* 센서 초기화 불필요 — imu_read_direct()가 매 측정 시 자체 처리 */ - /* 추후 전원 시퀀스 단계가 필요하면 여기에 switch(p_order) 추가 */ - p_order = 2; - - /* Advance to next step or finish */ - /* 다음 단계로 진행하거나, 시퀀스 완료 처리 */ - if (p_order < 2) { - p_order++; /* 다음 단계로 이동 */ - power_timer_start(); /* 20ms 후 다음 단계 실행 */ - } else { - /* 전원 시퀀스 전체 완료 */ - DBG_PRINTF("[PWR] Device Activated OK!\r\n"); - } -} - - -/** - * @brief 디바이스 재활성화 (슬립 복귀 시) - * - * I2C를 재초기화하고, 전원 시퀀스를 처음부터 다시 시작한다. - * 슬립 모드에서 깨어날 때 호출된다. - * - * @return 0 (항상 성공) - */ -int device_reactivated(void){ - int rc = 0; - sw_i2c_init_once(); /* I2C 버스 재초기화 */ - nrf_delay_ms(10); /* 안정화 대기 */ - lock_check = true; /* 전원 시퀀스 진행 중 잠금 */ - p_order = 0; /* 상태머신을 Step 0부터 재시작 */ - power_timer_start(); /* 20ms 후 power_loop() 시작 */ - return rc; -} - -/** - * @brief 전원 시퀀스 타이머 시작 - * - * 싱글샷 모드로 POWER_LOOP_INTERVAL(20ms) 후 power_loop()를 호출한다. - */ -void power_timer_start(void) -{ - APP_ERROR_CHECK(app_timer_start(m_power_timer_id, APP_TIMER_TICKS(POWER_LOOP_INTERVAL), NULL)); -} - - -/** - * @brief 전원 시퀀스 타이머 정지 - */ -void power_timer_stop(void) -{ - APP_ERROR_CHECK(app_timer_stop(m_power_timer_id)); - -} - - -/** - * @brief 전원 시퀀스 타이머 초기화 (앱 시작 시 1회 호출) - * - * 싱글샷 모드 타이머를 생성하고, 콜백으로 power_loop()를 등록한다. - * 싱글샷이므로 매 단계마다 power_timer_start()로 수동 재시작해야 한다. - */ -void power_timer_init(void) //active start -{ - APP_ERROR_CHECK(app_timer_create(&m_power_timer_id, APP_TIMER_MODE_SINGLE_SHOT, power_loop)); - - // 2025-12-08 change to APP_TIMER_MODE_REPEATED mode - //APP_ERROR_CHECK(app_timer_create(&m_power_timer_id, APP_TIMER_MODE_REPEATED, power_loop)); - - -} +/******************************************************************************* + TEST medi50 Dec 23 + //=========power_control.c==================== + ******************************************************************************* + * + * [모듈 개요] + * 디바이스 전원 시퀀스를 관리하는 모듈 (전원 켜기 / 끄기 / 슬립). + * + * [전원 켜기 흐름] + * device_activated() + * → power_loop 타이머 시작 → 즉시 완료 (센서 초기화 불필요) + * → 센서(IMU)는 측정 명령 시 imu_read_direct()가 자체 처리 + * + * [슬립 모드] + * device_sleep_mode() + * → processing 플래그 해제 + * + * [재활성화] + * device_reactivated() + * → I2C 재초기화 후 전원 시퀀스를 처음부터 다시 시작 + * + * [타이머] + * 싱글샷 모드 app_timer, 20ms 간격으로 power_loop 호출 + * + ******************************************************************************/ +#include +#include +#include +#include +#include "main.h" +#include "power_control.h" +#include "nrf_delay.h" + + +#include "nrf_log.h" +#include "app_timer.h" +#include "debug_print.h" +#include "i2c_manager.h" + + +/* 전원 시퀀스용 싱글샷 타이머 인스턴스 */ +APP_TIMER_DEF(m_power_timer_id); + +/* 전원 시퀀스 상태머신의 타이머 간격 (20ms) */ +// 2025-12-08 change to #define POWER_LOOP_INTERVAL 30 -> 20 +#define POWER_LOOP_INTERVAL 20 + +/* 전원 시퀀스 현재 단계 (0: I2C 초기화, 1: 예약, 2: 완료) */ +static uint8_t p_order; + +/* 데이터 처리 중 플래그 (외부 모듈에서 선언) */ +extern volatile bool processing; + +/* 전원 시퀀스 잠금 플래그 (true = 전원 시퀀스 진행 중) */ +bool lock_check = false; + +/** + * @brief 디바이스 슬립 모드 진입 + * + * 데이터 처리 플래그(processing)를 해제하여 + * 메인 루프가 더 이상 센서 데이터를 처리하지 않도록 한다. + * + * @return 0 (항상 성공) + */ +int device_sleep_mode(void){ + int rc = 0; + nrf_delay_ms(2); + DBG_PRINTF("Device_Sleep_Mode OK!\r\n"); + nrf_delay_ms(10); + processing = false; /* 데이터 처리 플래그 해제 → 센서 처리 중단 */ + return rc; +} + + +/** + * @brief 디바이스 전원 켜기 (전원 시퀀스 시작) + * + * 전원 시퀀스 단계를 0으로 초기화하고, 잠금 플래그를 설정한 뒤 + * 타이머를 시작하여 power_loop() 상태머신을 구동한다. + * + * @return 0 (항상 성공) + */ +int device_activated(void){ + int rc = 0; + p_order = 0; /* 상태머신 시작 단계 (Step 0: I2C 초기화) */ + lock_check =true; /* 전원 시퀀스 진행 중 잠금 */ + power_timer_start(); /* 20ms 후 power_loop() 첫 호출 */ + + return rc; +} + +/** + * @brief Power-up sequence state machine + * + * Executes hardware initialization steps + * Called by app_timer at POWER_LOOP_INTERVAL (20ms) + * + * Sequence: + * 0: I2C init + * 1: (reserved) + * 2: Complete + */ +/* + * 전원 시퀀스 상태머신 (20ms 싱글샷 타이머 콜백). + * + * [실행 흐름] + * 1) 타이머 콜백 진입 → 타이머 정지 (싱글샷이므로) + * 2) 현재 p_order에 해당하는 초기화 단계 실행 + * 3) p_order < 2이면 다음 단계로 진행하고 타이머 재시작 + * 4) p_order == 2이면 전원 시퀀스 완료 + * + * 센서 초기화 불필요 — imu_read_direct()가 매 측정 시 자체 처리 + */ +void power_loop(void *p_context) +{ + UNUSED_PARAMETER(p_context); + + power_timer_stop(); /* 현재 타이머 정지 (싱글샷 → 수동 재시작 필요) */ + + /* 센서 초기화 불필요 — imu_read_direct()가 매 측정 시 자체 처리 */ + /* 추후 전원 시퀀스 단계가 필요하면 여기에 switch(p_order) 추가 */ + p_order = 2; + + /* Advance to next step or finish */ + /* 다음 단계로 진행하거나, 시퀀스 완료 처리 */ + if (p_order < 2) { + p_order++; /* 다음 단계로 이동 */ + power_timer_start(); /* 20ms 후 다음 단계 실행 */ + } else { + /* 전원 시퀀스 전체 완료 */ + DBG_PRINTF("[PWR] Device Activated OK!\r\n"); + } +} + + +/** + * @brief 디바이스 재활성화 (슬립 복귀 시) + * + * I2C를 재초기화하고, 전원 시퀀스를 처음부터 다시 시작한다. + * 슬립 모드에서 깨어날 때 호출된다. + * + * @return 0 (항상 성공) + */ +int device_reactivated(void){ + int rc = 0; + sw_i2c_init_once(); /* I2C 버스 재초기화 */ + nrf_delay_ms(10); /* 안정화 대기 */ + lock_check = true; /* 전원 시퀀스 진행 중 잠금 */ + p_order = 0; /* 상태머신을 Step 0부터 재시작 */ + power_timer_start(); /* 20ms 후 power_loop() 시작 */ + return rc; +} + +/** + * @brief 전원 시퀀스 타이머 시작 + * + * 싱글샷 모드로 POWER_LOOP_INTERVAL(20ms) 후 power_loop()를 호출한다. + */ +void power_timer_start(void) +{ + APP_ERROR_CHECK(app_timer_start(m_power_timer_id, APP_TIMER_TICKS(POWER_LOOP_INTERVAL), NULL)); +} + + +/** + * @brief 전원 시퀀스 타이머 정지 + */ +void power_timer_stop(void) +{ + APP_ERROR_CHECK(app_timer_stop(m_power_timer_id)); + +} + + +/** + * @brief 전원 시퀀스 타이머 초기화 (앱 시작 시 1회 호출) + * + * 싱글샷 모드 타이머를 생성하고, 콜백으로 power_loop()를 등록한다. + * 싱글샷이므로 매 단계마다 power_timer_start()로 수동 재시작해야 한다. + */ +void power_timer_init(void) //active start +{ + APP_ERROR_CHECK(app_timer_create(&m_power_timer_id, APP_TIMER_MODE_SINGLE_SHOT, power_loop)); + + // 2025-12-08 change to APP_TIMER_MODE_REPEATED mode + //APP_ERROR_CHECK(app_timer_create(&m_power_timer_id, APP_TIMER_MODE_REPEATED, power_loop)); + + +} diff --git a/project/ble_peripheral/ble_app_bladder_patch/power_control.h b/project/ble_peripheral/ble_app_bladder_patch/system/power/power_control.h similarity index 97% rename from project/ble_peripheral/ble_app_bladder_patch/power_control.h rename to project/ble_peripheral/ble_app_bladder_patch/system/power/power_control.h index 441270c..eb47ac6 100644 --- a/project/ble_peripheral/ble_app_bladder_patch/power_control.h +++ b/project/ble_peripheral/ble_app_bladder_patch/system/power/power_control.h @@ -1,48 +1,48 @@ -/******************************************************************************* - * @file power_control.h - * @author CandyPops Co. - * @version V1.0.0 - * @date 2022-09-05 - * @brief - ******************************************************************************* - * - * [헤더 개요] - * 디바이스 전원 시퀀스 관리 모듈의 공용 인터페이스 헤더. - * - * [주요 함수 요약] - * device_activated() : 전원 켜기 → power_loop 상태머신 시작 - * device_sleep_mode() : 슬립 모드 진입 (처리 중단) - * device_reactivated() : 슬립 복귀 → 전원 시퀀스 재시작 - * power_loop() : 20ms 간격 전원 시퀀스 상태머신 콜백 - * power_timer_start/stop : 전원 시퀀스 타이머 제어 - * power_timer_init() : 전원 시퀀스 타이머 초기화 (앱 시작 시 1회) - * - ******************************************************************************/ - -#ifndef _POWER_CONTROL_H_ -#define _POWER_CONTROL_H_ - -#include "main.h" - -/** @brief 디바이스 슬립 모드 진입 (processing 해제) */ -int device_sleep_mode(void); - -/** @brief 디바이스 전원 켜기 (전원 시퀀스 상태머신 시작) */ -int device_activated(void); - -/** @brief 디바이스 재활성화 (슬립 복귀 시 I2C 재초기화 후 시퀀스 재시작) */ -int device_reactivated(void); - -/** @brief 전원 시퀀스 상태머신 (20ms 타이머 콜백, Step 0→1→2) */ -void power_loop(void * p_context); /* For x ms */ - -/** @brief 전원 시퀀스 타이머 시작 (20ms 싱글샷) */ -void power_timer_start(void); - -/** @brief 전원 시퀀스 타이머 정지 */ -void power_timer_stop(void);; - -/** @brief 전원 시퀀스 타이머 초기화 (앱 시작 시 1회 호출) */ -void power_timer_init(void); -#endif //_POWER_CONTROL_H_ - +/******************************************************************************* + * @file power_control.h + * @author CandyPops Co. + * @version V1.0.0 + * @date 2022-09-05 + * @brief + ******************************************************************************* + * + * [헤더 개요] + * 디바이스 전원 시퀀스 관리 모듈의 공용 인터페이스 헤더. + * + * [주요 함수 요약] + * device_activated() : 전원 켜기 → power_loop 상태머신 시작 + * device_sleep_mode() : 슬립 모드 진입 (처리 중단) + * device_reactivated() : 슬립 복귀 → 전원 시퀀스 재시작 + * power_loop() : 20ms 간격 전원 시퀀스 상태머신 콜백 + * power_timer_start/stop : 전원 시퀀스 타이머 제어 + * power_timer_init() : 전원 시퀀스 타이머 초기화 (앱 시작 시 1회) + * + ******************************************************************************/ + +#ifndef _POWER_CONTROL_H_ +#define _POWER_CONTROL_H_ + +#include "main.h" + +/** @brief 디바이스 슬립 모드 진입 (processing 해제) */ +int device_sleep_mode(void); + +/** @brief 디바이스 전원 켜기 (전원 시퀀스 상태머신 시작) */ +int device_activated(void); + +/** @brief 디바이스 재활성화 (슬립 복귀 시 I2C 재초기화 후 시퀀스 재시작) */ +int device_reactivated(void); + +/** @brief 전원 시퀀스 상태머신 (20ms 타이머 콜백, Step 0→1→2) */ +void power_loop(void * p_context); /* For x ms */ + +/** @brief 전원 시퀀스 타이머 시작 (20ms 싱글샷) */ +void power_timer_start(void); + +/** @brief 전원 시퀀스 타이머 정지 */ +void power_timer_stop(void);; + +/** @brief 전원 시퀀스 타이머 초기화 (앱 시작 시 1회 호출) */ +void power_timer_init(void); +#endif //_POWER_CONTROL_H_ +