- BLE peripheral applications - dr_piezo and bladder_patch projects Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
331 lines
12 KiB
C
331 lines
12 KiB
C
/**
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* Copyright (c) 2015 - 2021, Nordic Semiconductor ASA
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form, except as embedded into a Nordic
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* Semiconductor ASA integrated circuit in a product or a software update for
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* such product, must reproduce the above copyright notice, this list of
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* conditions and the following disclaimer in the documentation and/or other
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* materials provided with the distribution.
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*
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* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* 4. This software, with or without modification, must only be used with a
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* Nordic Semiconductor ASA integrated circuit.
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*
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* 5. Any software provided in binary form under this license must not be reverse
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* engineered, decompiled, modified and/or disassembled.
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*
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* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
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* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
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* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include <nrfx.h>
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#if NRFX_CHECK(NRFX_TIMER_ENABLED)
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#if !(NRFX_CHECK(NRFX_TIMER0_ENABLED) || NRFX_CHECK(NRFX_TIMER1_ENABLED) || \
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NRFX_CHECK(NRFX_TIMER2_ENABLED) || NRFX_CHECK(NRFX_TIMER3_ENABLED) || \
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NRFX_CHECK(NRFX_TIMER4_ENABLED))
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#error "No enabled TIMER instances. Check <nrfx_config.h>."
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#endif
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#include <nrfx_timer.h>
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#define NRFX_LOG_MODULE TIMER
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#include <nrfx_log.h>
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/**@brief Timer control block. */
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typedef struct
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{
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nrfx_timer_event_handler_t handler;
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void * context;
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nrfx_drv_state_t state;
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} timer_control_block_t;
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static timer_control_block_t m_cb[NRFX_TIMER_ENABLED_COUNT];
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nrfx_err_t nrfx_timer_init(nrfx_timer_t const * const p_instance,
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nrfx_timer_config_t const * p_config,
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nrfx_timer_event_handler_t timer_event_handler)
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{
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timer_control_block_t * p_cb = &m_cb[p_instance->instance_id];
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#ifdef SOFTDEVICE_PRESENT
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NRFX_ASSERT(p_instance->p_reg != NRF_TIMER0);
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#endif
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NRFX_ASSERT(p_config);
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NRFX_ASSERT(timer_event_handler);
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nrfx_err_t err_code;
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if (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED)
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{
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err_code = NRFX_ERROR_INVALID_STATE;
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NRFX_LOG_WARNING("Function: %s, error code: %s.",
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__func__,
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NRFX_LOG_ERROR_STRING_GET(err_code));
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return err_code;
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}
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/* Warning 685: Relational operator '<=' always evaluates to 'true'"
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* Warning in NRF_TIMER_IS_BIT_WIDTH_VALID macro. Macro validate timers resolution.
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* Not necessary in nRF52 based systems. Obligatory in nRF51 based systems.
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*/
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/*lint -save -e685 */
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NRFX_ASSERT(NRF_TIMER_IS_BIT_WIDTH_VALID(p_instance->p_reg, p_config->bit_width));
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//lint -restore
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p_cb->handler = timer_event_handler;
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p_cb->context = p_config->p_context;
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uint8_t i;
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for (i = 0; i < p_instance->cc_channel_count; ++i)
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{
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nrf_timer_event_clear(p_instance->p_reg,
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nrf_timer_compare_event_get(i));
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}
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NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number(p_instance->p_reg),
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p_config->interrupt_priority);
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NRFX_IRQ_ENABLE(nrfx_get_irq_number(p_instance->p_reg));
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nrf_timer_mode_set(p_instance->p_reg, p_config->mode);
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nrf_timer_bit_width_set(p_instance->p_reg, p_config->bit_width);
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nrf_timer_frequency_set(p_instance->p_reg, p_config->frequency);
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p_cb->state = NRFX_DRV_STATE_INITIALIZED;
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err_code = NRFX_SUCCESS;
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NRFX_LOG_INFO("Function: %s, error code: %s.",
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__func__,
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NRFX_LOG_ERROR_STRING_GET(err_code));
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return err_code;
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}
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void nrfx_timer_uninit(nrfx_timer_t const * const p_instance)
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{
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NRFX_IRQ_DISABLE(nrfx_get_irq_number(p_instance->p_reg));
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#define DISABLE_ALL UINT32_MAX
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nrf_timer_shorts_disable(p_instance->p_reg, DISABLE_ALL);
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nrf_timer_int_disable(p_instance->p_reg, DISABLE_ALL);
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#undef DISABLE_ALL
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nrfx_timer_disable(p_instance);
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m_cb[p_instance->instance_id].state = NRFX_DRV_STATE_UNINITIALIZED;
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NRFX_LOG_INFO("Uninitialized instance: %d.", p_instance->instance_id);
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}
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void nrfx_timer_enable(nrfx_timer_t const * const p_instance)
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{
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NRFX_ASSERT(m_cb[p_instance->instance_id].state == NRFX_DRV_STATE_INITIALIZED);
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nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_START);
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m_cb[p_instance->instance_id].state = NRFX_DRV_STATE_POWERED_ON;
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NRFX_LOG_INFO("Enabled instance: %d.", p_instance->instance_id);
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}
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void nrfx_timer_disable(nrfx_timer_t const * const p_instance)
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{
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NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
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nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_SHUTDOWN);
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m_cb[p_instance->instance_id].state = NRFX_DRV_STATE_INITIALIZED;
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NRFX_LOG_INFO("Disabled instance: %d.", p_instance->instance_id);
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}
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bool nrfx_timer_is_enabled(nrfx_timer_t const * const p_instance)
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{
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NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
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return (m_cb[p_instance->instance_id].state == NRFX_DRV_STATE_POWERED_ON);
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}
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void nrfx_timer_resume(nrfx_timer_t const * const p_instance)
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{
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NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
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nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_START);
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NRFX_LOG_INFO("Resumed instance: %d.", p_instance->instance_id);
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}
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void nrfx_timer_pause(nrfx_timer_t const * const p_instance)
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{
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NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
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nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_STOP);
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NRFX_LOG_INFO("Paused instance: %d.", p_instance->instance_id);
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}
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void nrfx_timer_clear(nrfx_timer_t const * const p_instance)
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{
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NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
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nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_CLEAR);
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}
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void nrfx_timer_increment(nrfx_timer_t const * const p_instance)
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{
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NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
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NRFX_ASSERT(nrf_timer_mode_get(p_instance->p_reg) != NRF_TIMER_MODE_TIMER);
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nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_COUNT);
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}
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uint32_t nrfx_timer_capture(nrfx_timer_t const * const p_instance,
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nrf_timer_cc_channel_t cc_channel)
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{
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NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
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NRFX_ASSERT(cc_channel < p_instance->cc_channel_count);
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nrf_timer_task_trigger(p_instance->p_reg,
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nrf_timer_capture_task_get(cc_channel));
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return nrf_timer_cc_read(p_instance->p_reg, cc_channel);
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}
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void nrfx_timer_compare(nrfx_timer_t const * const p_instance,
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nrf_timer_cc_channel_t cc_channel,
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uint32_t cc_value,
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bool enable_int)
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{
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nrf_timer_int_mask_t timer_int = nrf_timer_compare_int_get(cc_channel);
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if (enable_int)
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{
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nrf_timer_event_clear(p_instance->p_reg, nrf_timer_compare_event_get(cc_channel));
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nrf_timer_int_enable(p_instance->p_reg, timer_int);
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}
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else
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{
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nrf_timer_int_disable(p_instance->p_reg, timer_int);
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}
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nrf_timer_cc_write(p_instance->p_reg, cc_channel, cc_value);
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NRFX_LOG_INFO("Timer id: %d, capture value set: %lu, channel: %d.",
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p_instance->instance_id,
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cc_value,
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cc_channel);
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}
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void nrfx_timer_extended_compare(nrfx_timer_t const * const p_instance,
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nrf_timer_cc_channel_t cc_channel,
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uint32_t cc_value,
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nrf_timer_short_mask_t timer_short_mask,
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bool enable_int)
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{
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nrf_timer_shorts_disable(p_instance->p_reg,
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(TIMER_SHORTS_COMPARE0_STOP_Msk << cc_channel) |
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(TIMER_SHORTS_COMPARE0_CLEAR_Msk << cc_channel));
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nrf_timer_shorts_enable(p_instance->p_reg, timer_short_mask);
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nrfx_timer_compare(p_instance,
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cc_channel,
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cc_value,
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enable_int);
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NRFX_LOG_INFO("Timer id: %d, capture value set: %lu, channel: %d.",
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p_instance->instance_id,
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cc_value,
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cc_channel);
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}
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void nrfx_timer_compare_int_enable(nrfx_timer_t const * const p_instance,
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uint32_t channel)
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{
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NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
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NRFX_ASSERT(channel < p_instance->cc_channel_count);
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nrf_timer_event_clear(p_instance->p_reg,
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nrf_timer_compare_event_get(channel));
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nrf_timer_int_enable(p_instance->p_reg,
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nrf_timer_compare_int_get(channel));
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}
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void nrfx_timer_compare_int_disable(nrfx_timer_t const * const p_instance,
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uint32_t channel)
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{
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NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
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NRFX_ASSERT(channel < p_instance->cc_channel_count);
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nrf_timer_int_disable(p_instance->p_reg,
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nrf_timer_compare_int_get(channel));
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}
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static void irq_handler(NRF_TIMER_Type * p_reg,
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timer_control_block_t * p_cb,
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uint8_t channel_count)
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{
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uint8_t i;
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for (i = 0; i < channel_count; ++i)
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{
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nrf_timer_event_t event = nrf_timer_compare_event_get(i);
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nrf_timer_int_mask_t int_mask = nrf_timer_compare_int_get(i);
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if (nrf_timer_event_check(p_reg, event) &&
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nrf_timer_int_enable_check(p_reg, int_mask))
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{
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nrf_timer_event_clear(p_reg, event);
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NRFX_LOG_DEBUG("Compare event, channel: %d.", i);
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p_cb->handler(event, p_cb->context);
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}
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}
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}
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#if NRFX_CHECK(NRFX_TIMER0_ENABLED)
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void nrfx_timer_0_irq_handler(void)
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{
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irq_handler(NRF_TIMER0, &m_cb[NRFX_TIMER0_INST_IDX],
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NRF_TIMER_CC_CHANNEL_COUNT(0));
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}
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#endif
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#if NRFX_CHECK(NRFX_TIMER1_ENABLED)
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void nrfx_timer_1_irq_handler(void)
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{
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irq_handler(NRF_TIMER1, &m_cb[NRFX_TIMER1_INST_IDX],
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NRF_TIMER_CC_CHANNEL_COUNT(1));
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}
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#endif
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#if NRFX_CHECK(NRFX_TIMER2_ENABLED)
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void nrfx_timer_2_irq_handler(void)
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{
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irq_handler(NRF_TIMER2, &m_cb[NRFX_TIMER2_INST_IDX],
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NRF_TIMER_CC_CHANNEL_COUNT(2));
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}
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#endif
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#if NRFX_CHECK(NRFX_TIMER3_ENABLED)
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void nrfx_timer_3_irq_handler(void)
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{
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irq_handler(NRF_TIMER3, &m_cb[NRFX_TIMER3_INST_IDX],
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NRF_TIMER_CC_CHANNEL_COUNT(3));
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}
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#endif
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#if NRFX_CHECK(NRFX_TIMER4_ENABLED)
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void nrfx_timer_4_irq_handler(void)
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{
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irq_handler(NRF_TIMER4, &m_cb[NRFX_TIMER4_INST_IDX],
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NRF_TIMER_CC_CHANNEL_COUNT(4));
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}
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#endif
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#endif // NRFX_CHECK(NRFX_TIMER_ENABLED)
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