initial commit
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jhChun
183
project/ble_peripheral/ble_app_vivaMayo/spi2_bus.c
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183
project/ble_peripheral/ble_app_vivaMayo/spi2_bus.c
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/*******************************************************************************
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* @file spi2_bus.c
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* @brief Shared SPI2 Bus - nrfx_spim driver (SoftDevice safe)
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* @author Charles KWON <charleskwon@medithings.co.kr>
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* @date 2025-02-03
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*
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* @note Uses nrfx_spim with APP_IRQ_PRIORITY_LOWEST for SoftDevice compatibility
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******************************************************************************/
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#include "spi2_bus.h"
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#include "nrfx_spim.h"
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#include "nrf_gpio.h"
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#include "nrf_delay.h"
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#include "app_error.h"
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#include "app_util_platform.h" /* For APP_IRQ_PRIORITY_LOWEST */
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#include "debug_print.h"
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#include <stdio.h>
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/* Define instance index if not provided by nrfx (SDK version dependent) */
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#ifndef NRFX_SPIM2_INST_IDX
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#define NRFX_SPIM2_INST_IDX 0
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#endif
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/*==============================================================================
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* PRIVATE VARIABLES
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*============================================================================*/
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static bool m_initialized = false;
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static nrfx_spim_t m_spi = NRFX_SPIM_INSTANCE(SPI2_BUS_INSTANCE);
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/*==============================================================================
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* PUBLIC FUNCTIONS
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*============================================================================*/
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ret_code_t spi2_bus_init(void)
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{
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if (m_initialized)
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{
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return NRF_SUCCESS;
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}
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DBG_PRINTF("[SPI2] nrfx init...\r\n");
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nrfx_spim_config_t cfg = NRFX_SPIM_DEFAULT_CONFIG;
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cfg.sck_pin = SPI2_SCK_PIN;
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cfg.mosi_pin = SPI2_MOSI_PIN;
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cfg.miso_pin = SPI2_MISO_PIN;
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cfg.ss_pin = NRFX_SPIM_PIN_NOT_USED; /* Manual CS control */
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cfg.frequency = NRF_SPIM_FREQ_1M; /* Try slower for debugging */
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cfg.mode = NRF_SPIM_MODE_0;
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cfg.bit_order = NRF_SPIM_BIT_ORDER_MSB_FIRST;
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cfg.irq_priority = APP_IRQ_PRIORITY_LOWEST; /* SoftDevice safe! */
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/* Use NULL handler for blocking mode (no IRQ needed) */
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nrfx_err_t err = nrfx_spim_init(&m_spi, &cfg, NULL, NULL);
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DBG_PRINTF("[SPI2] init err=%d (blocking)\r\n", err);
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if (err != NRFX_SUCCESS && err != NRFX_ERROR_INVALID_STATE) {
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DBG_PRINTF("[SPI2] FAIL!\r\n");
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return err;
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}
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/* Configure CS pins as outputs, deasserted (high) */
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nrf_gpio_cfg_output(SPI2_CS_ADA2200);
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nrf_gpio_cfg_output(SPI2_CS_FLASH);
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nrf_gpio_pin_set(SPI2_CS_ADA2200);
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nrf_gpio_pin_set(SPI2_CS_FLASH);
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m_initialized = true;
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DBG_PRINTF("[SPI2] OK\r\n");
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return NRF_SUCCESS;
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}
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void spi2_bus_uninit(void)
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{
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if (!m_initialized) return;
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nrfx_spim_uninit(&m_spi);
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nrf_gpio_cfg_default(SPI2_SCK_PIN);
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nrf_gpio_cfg_default(SPI2_MISO_PIN);
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nrf_gpio_cfg_default(SPI2_MOSI_PIN);
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nrf_gpio_cfg_default(SPI2_CS_ADA2200);
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nrf_gpio_cfg_default(SPI2_CS_FLASH);
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m_initialized = false;
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}
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bool spi2_bus_is_initialized(void)
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{
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return m_initialized;
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}
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const nrf_drv_spi_t* spi2_bus_get_instance(void)
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{
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/* Using nrfx_spim now - return NULL for legacy compatibility */
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return NULL;
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}
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/* Debug: count transfers for selective logging */
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static uint32_t s_xfer_count = 0;
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ret_code_t spi2_bus_transfer(const uint8_t *tx_buf, uint8_t tx_len,
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uint8_t *rx_buf, uint8_t rx_len)
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{
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if (!m_initialized)
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{
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DBG_PRINTF("[SPI2] ERROR: not init!\r\n");
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return NRF_ERROR_INVALID_STATE;
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}
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s_xfer_count++;
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bool debug = (s_xfer_count <= 10);
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nrfx_spim_xfer_desc_t xfer;
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nrfx_err_t err;
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/* Blocking mode: nrfx_spim_xfer() waits for completion internally */
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/* Full-duplex mode: TX and RX simultaneously */
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if (tx_len > 0 && rx_len > 0) {
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DBG_PRINTF("[SPI2] FD TX[%d] RX[%d]\r\n", tx_len, rx_len);
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xfer.p_tx_buffer = tx_buf;
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xfer.tx_length = tx_len;
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xfer.p_rx_buffer = rx_buf;
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xfer.rx_length = rx_len;
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DBG_PRINTF("[SPI2] xfer...\r\n");
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err = nrfx_spim_xfer(&m_spi, &xfer, 0);
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DBG_PRINTF("[SPI2] xfer done err=%d\r\n", err);
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if (err != NRFX_SUCCESS) {
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DBG_PRINTF("[SPI2] FD err=%d\r\n", err);
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return err;
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}
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DBG_PRINTF("[SPI2] RX: %02X %02X %02X %02X\r\n",
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rx_buf[0],
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rx_len > 1 ? rx_buf[1] : 0,
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rx_len > 2 ? rx_buf[2] : 0,
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rx_len > 3 ? rx_buf[3] : 0);
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}
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/* TX only mode */
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else if (tx_len > 0) {
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if (debug) {
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DBG_PRINTF("[SPI2] TX[%d]: %02X\r\n", tx_len, tx_buf[0]);
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}
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xfer.p_tx_buffer = tx_buf;
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xfer.tx_length = tx_len;
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xfer.p_rx_buffer = NULL;
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xfer.rx_length = 0;
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err = nrfx_spim_xfer(&m_spi, &xfer, 0);
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if (err != NRFX_SUCCESS) {
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DBG_PRINTF("[SPI2] TX err=%d\r\n", err);
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return err;
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}
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}
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/* RX only mode */
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else if (rx_len > 0) {
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xfer.p_tx_buffer = NULL;
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xfer.tx_length = 0;
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xfer.p_rx_buffer = rx_buf;
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xfer.rx_length = rx_len;
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err = nrfx_spim_xfer(&m_spi, &xfer, 0);
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if (err != NRFX_SUCCESS) {
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DBG_PRINTF("[SPI2] RX err=%d\r\n", err);
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return err;
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}
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if (debug) {
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DBG_PRINTF("[SPI2] RX[%d]: %02X %02X %02X\r\n",
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rx_len, rx_buf[0],
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rx_len > 1 ? rx_buf[1] : 0,
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rx_len > 2 ? rx_buf[2] : 0);
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}
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}
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return NRF_SUCCESS;
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}
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