Files
firmware-test/project/ble_peripheral/ble_app_bladder_patch/ada2200_spi.c
Charles Kwon a8ba31871e Initial commit: MT firmware project
- BLE peripheral applications
- dr_piezo and bladder_patch projects

Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
2026-01-25 17:26:39 +09:00

113 lines
4.0 KiB
C

/*******************************************************************************
* @file ada2200_spi.c
* @author CandyPops Co.
* @version V1.0.0
* @date 2022-09-05
* @brief
******************************************************************************/
#include "sdk_common.h"
#include <stdbool.h>
#include "nrf.h"
#include "nrf_drv_gpiote.h"
#include "app_error.h"
#include "boards.h"
#include "nrf_drv_spi.h"
#include "nrf_delay.h"
#include "nrf_log.h"
#include "ada2200_spi.h"
static const nrf_drv_spi_t spi_ada2200 = NRF_DRV_SPI_INSTANCE(SPI_INSTANCE); /**< SPI instance. */
//static uint8_t ada2200_startR[] ={ 0x00, 0x00, 0x81 }; /* {addr 16bit, data}, Reset for Defaults */
static uint8_t ada2200_start0[] ={ 0x00, 0x00, 0x18 }; /* {addr 16bit, data}, Set SDIO input only, Activate SDO */
static uint8_t ada2200_start1[] ={ 0x00, 0x2B, 0x06 }; /* {addr 16bit, data}, Clock Configuration */
static uint8_t ada2200_start2[] ={ 0x00, 0x2A, 0x18 }; /* {addr 16bit, data}, Enable Mixer, Select SDO output for Pin 13, OFF RCLK. */
static uint8_t ada2200_start3[] ={ 0x00, 0x29, 0x23 }; /* 0x27 {addr 16bit, data}, Disable SYNCO output, Select SYNCO edge location (Sync timing adjustment) */
static uint8_t ada2200_start4[] ={ 0x00, 0x2C, 0x01 }; /* {addr 16bit, data}, Enable RCLK output */
static uint8_t ada2200_stop0[] ={ 0x00, 0x00, 0x18 }; /* {addr 16bit, data}, Set SDIO input only, Activate SDO */
static uint8_t ada2200_stop1[] ={ 0x00, 0x2B, 0x06 }; /* {addr 16bit, data}, Clock Configuration */
static uint8_t ada2200_stop2[] ={ 0x00, 0x2A, 0x10 }; /* {addr 16bit, data}, Enable Mixer, Select SDO output for Pin 13, OFF RCLK. */
static uint8_t ada2200_stop3[] ={ 0x00, 0x29, 0x01 }; /* 0x07 {addr 16bit, data}, Disable SYNCO output, Select SYNCO edge location (Sync timing adjustment) */
static uint8_t ada2200_stop4[] ={ 0x00, 0x2C, 0x00 }; /* {addr 16bit, data}, Enable RCLK output */
static uint8_t m_tx_buf[3]; /**< TX buffer. */
static uint8_t m_length = sizeof(m_tx_buf); /**< Transfer length. */
void ada2200_spi_write(const void * data, size_t size)
{
memcpy(m_tx_buf, data, size);
APP_ERROR_CHECK(nrf_drv_spi_transfer(&spi_ada2200, m_tx_buf, size, NULL, 0));
}
extern void ada2200_start(void)
{
//ada2200_spi_write(ada2200_startR, m_length);
ada2200_spi_write(ada2200_start0, m_length);
nrf_delay_us(2);
ada2200_spi_write(ada2200_start1, m_length);
nrf_delay_us(2);
ada2200_spi_write(ada2200_start2, m_length);
nrf_delay_us(2);
ada2200_spi_write(ada2200_start3, m_length);
nrf_delay_us(2);
ada2200_spi_write(ada2200_start4, m_length);
nrf_delay_us(2);
}
extern void ada2200_stop(void)
{
ada2200_spi_write(ada2200_stop0, m_length);
nrf_delay_us(2);
ada2200_spi_write(ada2200_stop1, m_length);
nrf_delay_us(2);
ada2200_spi_write(ada2200_stop2, m_length);
nrf_delay_us(2);
ada2200_spi_write(ada2200_stop3, m_length);
nrf_delay_us(2);
ada2200_spi_write(ada2200_stop4, m_length);
nrf_delay_us(2);
}
extern void ada2200_init(void)
{
nrf_drv_spi_config_t spi_config = NRF_DRV_SPI_DEFAULT_CONFIG;
spi_config.ss_pin = SPI_CS_PIN;
spi_config.miso_pin = SPI_MISO_PIN; /* Not USed */
spi_config.mosi_pin = SPI_MOSI_PIN;
spi_config.sck_pin = SPI_SCLK_PIN;
spi_config.frequency = NRF_DRV_SPI_FREQ_1M;
spi_config.mode = NRF_DRV_SPI_MODE_0;
spi_config.bit_order = NRF_DRV_SPI_BIT_ORDER_MSB_FIRST;
APP_ERROR_CHECK(nrf_drv_spi_init(&spi_ada2200, &spi_config, NULL, NULL));
}
extern void ada2200_uninit(void)
{
nrf_drv_spi_uninit(&spi_ada2200);
/* If SPIM2 is used: */
*(volatile uint32_t *)0x40023FFC = 0;
*(volatile uint32_t *)0x40023FFC;
*(volatile uint32_t *)0x40023FFC = 1;
nrf_gpio_cfg_default(SPI_CS_PIN);
nrf_gpio_cfg_default(SPI_MISO_PIN);
nrf_gpio_cfg_default(SPI_MOSI_PIN);
nrf_gpio_cfg_default(SPI_SCLK_PIN);
}