jh.chun/VesiScan-Basic-firmware-test
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jhChun
2026-03-23 16:22:25 +09:00
parent 310ca152cf
commit 1cf688a296
16 changed files with 252 additions and 395 deletions
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22
project/ble_peripheral/dr_piezo/dr_piezo.h
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@@ -68,9 +68,6 @@
* 전원 제어 핀 (DC/DC 컨버터 +/-20V)
* DR_PIEZO_PWR_EN: HIGH로 설정 시 DC/DC 컨버터가 +/-20V 고전압 생성
*============================================================================*/
//#define DR_PIEZO_PWR_SHDN NRF_GPIO_PIN_MAP(0, 21) /**< SHDN_VPP/VNN (LT3463) */ // P0.21 : PZT_EN_MUXA jhChun 0128
//#define DR_PIEZO_PWR_EN_10V NRF_GPIO_PIN_MAP(0, 22) /**< EN_+10V (MCP1804) */ // P0.22 : NIRS PIN
#define DR_PIEZO_PWR_EN NRF_GPIO_PIN_MAP(1, 9) /** Power Enable jhChun 0128 */
/*==============================================================================
@@ -81,15 +78,10 @@
* N_OUT: Negative Output - 피에조 음극 구동 (P_OUT과 역상)
* 주의: 이전 핀 할당(주석 처리)에서 새 보드 레이아웃으로 변경됨 (jhChun 0128)
*============================================================================*/
//#define DR_PIEZO_PIN_PE NRF_GPIO_PIN_MAP(1, 5) /**< Pulse Enable */
//#define DR_PIEZO_PIN_DMP NRF_GPIO_PIN_MAP(1, 9) /**< Dump control */
//#define DR_PIEZO_PIN_P_OUT NRF_GPIO_PIN_MAP(1, 3) /**< Positive output */
//#define DR_PIEZO_PIN_N_OUT NRF_GPIO_PIN_MAP(1, 2) /**< Negative output */
#define DR_PIEZO_PIN_PE NRF_GPIO_PIN_MAP(0, 25) /**< Pulse Enable */ // P1.05 -> P0.25
#define DR_PIEZO_PIN_DMP NRF_GPIO_PIN_MAP(1, 0) /**< Dump control */ // P1.9 -> P1.0
#define DR_PIEZO_PIN_P_OUT NRF_GPIO_PIN_MAP(1, 7) /**< Positive output */ // P1.3 -> P1.7
#define DR_PIEZO_PIN_N_OUT NRF_GPIO_PIN_MAP(1, 6) /**< Negative output */ // P1.2 -> P1.6 jhChun 0128
#define DR_PIEZO_PIN_DMP NRF_GPIO_PIN_MAP(1, 0) /**< Dump control */ // P1.9 -> P1.0
#define DR_PIEZO_PIN_P_OUT NRF_GPIO_PIN_MAP(1, 7) /**< Positive output */ // P1.3 -> P1.7
#define DR_PIEZO_PIN_N_OUT NRF_GPIO_PIN_MAP(1, 6) /**< Negative output */ // P1.2 -> P1.6 jhChun 0128
/*==============================================================================
* MUX 제어 핀 (에코 신호 경로 선택)
@@ -98,10 +90,6 @@
* EN_MUXA/EN_MUXB: 각 MUX 활성화 (동시에 하나만 HIGH)
* SEL0/SEL1: MUX 내부 4채널 중 하나를 선택하는 주소 비트
*============================================================================*/
//#define DR_PIEZO_MUX_SEL1 NRF_GPIO_PIN_MAP(1, 13) /**< MUX Select 1 (HIGH) */
//#define DR_PIEZO_MUX_SEL2 NRF_GPIO_PIN_MAP(1, 12) /**< MUX Select 2 (LOW) */
//#define DR_PIEZO_MUX_SEL3 NRF_GPIO_PIN_MAP(1, 11) /**< MUX Select 3 (LOW) */
/* Piezo MUX pins (8ch) jhChun 0129 */
#define DR_PIEZO_EN_MUXA NRF_GPIO_PIN_MAP(0, 21) /**< MUXA Enable */
#define DR_PIEZO_EN_MUXB NRF_GPIO_PIN_MAP(0, 23) /**< MUXB Enable */
@@ -123,8 +111,8 @@
#define DR_PIEZO_FREQ_HZ 2100000 /**< Target frequency (set PIEZO_FREQ_MHZ in .c) */
#define DR_PIEZO_DEFAULT_CYCLES 5 /**< Default burst cycles (3~5) */
#define DR_PIEZO_MIN_CYCLES 3
#define DR_PIEZO_MAX_CYCLES 7 /* 3 -> 7 jhChun 26.03.12 */
#define DR_PIEZO_MUX_SETTLING_US 1300 /**< MUX settling delay (us) */
#define DR_PIEZO_MAX_CYCLES 7
#define DR_PIEZO_MUX_SETTLING_US 1300 /**< MUX settling delay (us) */
/*==============================================================================
* 전원 제어 함수